llvm/test/MC/AArch64/SVE/st1h.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
  10 // RUN:   | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12 st1h    z0.h, p0, [x0]
  13 // CHECK-INST: st1h    { z0.h }, p0, [x0]
  14 // CHECK-ENCODING: [0x00,0xe0,0xa0,0xe4]
  15 // CHECK-ERROR: instruction requires: sve or sme
  16 // CHECK-UNKNOWN: e4a0e000 <unknown>
  17
  18 st1h    z0.s, p0, [x0]
  19 // CHECK-INST: st1h    { z0.s }, p0, [x0]
  20 // CHECK-ENCODING: [0x00,0xe0,0xc0,0xe4]
  21 // CHECK-ERROR: instruction requires: sve or sme
  22 // CHECK-UNKNOWN: e4c0e000 <unknown>
  23
  24 st1h    z0.d, p0, [x0]
  25 // CHECK-INST: st1h    { z0.d }, p0, [x0]
  26 // CHECK-ENCODING: [0x00,0xe0,0xe0,0xe4]
  27 // CHECK-ERROR: instruction requires: sve or sme
  28 // CHECK-UNKNOWN: e4e0e000 <unknown>
  29
  30 st1h    { z0.h }, p0, [x0]
  31 // CHECK-INST: st1h    { z0.h }, p0, [x0]
  32 // CHECK-ENCODING: [0x00,0xe0,0xa0,0xe4]
  33 // CHECK-ERROR: instruction requires: sve or sme
  34 // CHECK-UNKNOWN: e4a0e000 <unknown>
  35
  36 st1h    { z0.s }, p0, [x0]
  37 // CHECK-INST: st1h    { z0.s }, p0, [x0]
  38 // CHECK-ENCODING: [0x00,0xe0,0xc0,0xe4]
  39 // CHECK-ERROR: instruction requires: sve or sme
  40 // CHECK-UNKNOWN: e4c0e000 <unknown>
  41
  42 st1h    { z0.d }, p0, [x0]
  43 // CHECK-INST: st1h    { z0.d }, p0, [x0]
  44 // CHECK-ENCODING: [0x00,0xe0,0xe0,0xe4]
  45 // CHECK-ERROR: instruction requires: sve or sme
  46 // CHECK-UNKNOWN: e4e0e000 <unknown>
  47
  48 st1h    { z31.h }, p7, [sp, #-1, mul vl]
  49 // CHECK-INST: st1h    { z31.h }, p7, [sp, #-1, mul vl]
  50 // CHECK-ENCODING: [0xff,0xff,0xaf,0xe4]
  51 // CHECK-ERROR: instruction requires: sve or sme
  52 // CHECK-UNKNOWN: e4afffff <unknown>
  53
  54 st1h    { z21.h }, p5, [x10, #5, mul vl]
  55 // CHECK-INST: st1h    { z21.h }, p5, [x10, #5, mul vl]
  56 // CHECK-ENCODING: [0x55,0xf5,0xa5,0xe4]
  57 // CHECK-ERROR: instruction requires: sve or sme
  58 // CHECK-UNKNOWN: e4a5f555 <unknown>
  59
  60 st1h    { z31.s }, p7, [sp, #-1, mul vl]
  61 // CHECK-INST: st1h    { z31.s }, p7, [sp, #-1, mul vl]
  62 // CHECK-ENCODING: [0xff,0xff,0xcf,0xe4]
  63 // CHECK-ERROR: instruction requires: sve or sme
  64 // CHECK-UNKNOWN: e4cfffff <unknown>
  65
  66 st1h    { z21.s }, p5, [x10, #5, mul vl]
  67 // CHECK-INST: st1h    { z21.s }, p5, [x10, #5, mul vl]
  68 // CHECK-ENCODING: [0x55,0xf5,0xc5,0xe4]
  69 // CHECK-ERROR: instruction requires: sve or sme
  70 // CHECK-UNKNOWN: e4c5f555 <unknown>
  71
  72 st1h    { z21.d }, p5, [x10, #5, mul vl]
  73 // CHECK-INST: st1h    { z21.d }, p5, [x10, #5, mul vl]
  74 // CHECK-ENCODING: [0x55,0xf5,0xe5,0xe4]
  75 // CHECK-ERROR: instruction requires: sve or sme
  76 // CHECK-UNKNOWN: e4e5f555 <unknown>
  77
  78 st1h    { z31.d }, p7, [sp, #-1, mul vl]
  79 // CHECK-INST: st1h    { z31.d }, p7, [sp, #-1, mul vl]
  80 // CHECK-ENCODING: [0xff,0xff,0xef,0xe4]
  81 // CHECK-ERROR: instruction requires: sve or sme
  82 // CHECK-UNKNOWN: e4efffff <unknown>
  83
  84 st1h    { z0.h }, p0, [x0, x0, lsl #1]
  85 // CHECK-INST: st1h    { z0.h }, p0, [x0, x0, lsl #1]
  86 // CHECK-ENCODING: [0x00,0x40,0xa0,0xe4]
  87 // CHECK-ERROR: instruction requires: sve or sme
  88 // CHECK-UNKNOWN: e4a04000 <unknown>
  89
  90 st1h    { z0.s }, p0, [x0, x0, lsl #1]
  91 // CHECK-INST: st1h    { z0.s }, p0, [x0, x0, lsl #1]
  92 // CHECK-ENCODING: [0x00,0x40,0xc0,0xe4]
  93 // CHECK-ERROR: instruction requires: sve or sme
  94 // CHECK-UNKNOWN: e4c04000 <unknown>
  95
  96 st1h    { z0.d }, p0, [x0, x0, lsl #1]
  97 // CHECK-INST: st1h    { z0.d }, p0, [x0, x0, lsl #1]
  98 // CHECK-ENCODING: [0x00,0x40,0xe0,0xe4]
  99 // CHECK-ERROR: instruction requires: sve or sme
 100 // CHECK-UNKNOWN: e4e04000 <unknown>