llvm/test/MC/AArch64/SVE2/fcvtx.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
   8 // RUN:        | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
  10 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12
  13 fcvtx    z0.s, p0/m, z0.d
  14 // CHECK-INST: fcvtx    z0.s, p0/m, z0.d
  15 // CHECK-ENCODING: [0x00,0xa0,0x0a,0x65]
  16 // CHECK-ERROR: instruction requires: sve2 or sme
  17 // CHECK-UNKNOWN: 650aa000 <unknown>
  18
  19 fcvtx    z30.s, p7/m, z31.d
  20 // CHECK-INST: fcvtx    z30.s, p7/m, z31.d
  21 // CHECK-ENCODING: [0xfe,0xbf,0x0a,0x65]
  22 // CHECK-ERROR: instruction requires: sve2 or sme
  23 // CHECK-UNKNOWN: 650abffe <unknown>
  24
  25
  26
  27 // --------------------------------------------------------------------------//
  28 // Test compatibility with MOVPRFX instruction.
  29
  30 movprfx z5.d, p0/z, z7.d
  31 // CHECK-INST: movprfx  z5.d, p0/z, z7.d
  32 // CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
  33 // CHECK-ERROR: instruction requires: sve or sme
  34 // CHECK-UNKNOWN: 04d020e5 <unknown>
  35
  36 fcvtx    z5.s, p0/m, z0.d
  37 // CHECK-INST: fcvtx    z5.s, p0/m, z0.d
  38 // CHECK-ENCODING: [0x05,0xa0,0x0a,0x65]
  39 // CHECK-ERROR: instruction requires: sve2 or sme
  40 // CHECK-UNKNOWN: 650aa005 <unknown>
  41
  42 movprfx z5, z7
  43 // CHECK-INST: movprfx  z5, z7
  44 // CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
  45 // CHECK-ERROR: instruction requires: sve or sme
  46 // CHECK-UNKNOWN: 0420bce5 <unknown>
  47
  48 fcvtx    z5.s, p0/m, z0.d
  49 // CHECK-INST: fcvtx    z5.s, p0/m, z0.d
  50 // CHECK-ENCODING: [0x05,0xa0,0x0a,0x65]
  51 // CHECK-ERROR: instruction requires: sve2 or sme
  52 // CHECK-UNKNOWN: 650aa005 <unknown>