llvm/test/MC/AMDGPU/gfx11_asm_err.s

   1 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
   2
   3 s_delay_alu
   4 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
   5
   6 s_delay_alu instid9(VALU_DEP_1)
   7 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid field name instid9
   8
   9 s_delay_alu instid0(VALU_DEP_9)
  10 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid value name VALU_DEP_9
  11
  12 s_delay_alu instid0(1)
  13 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a value name
  14
  15 s_delay_alu instid0(VALU_DEP_9|)
  16 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a right parenthesis
  17
  18 s_delay_alu instid0(VALU_DEP_1) | (SALU_CYCLE_1)
  19 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a field name
  20
  21 s_delay_alu instid0(VALU_DEP_1) | SALU_CYCLE_1)
  22 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a left parenthesis
  23
  24 lds_direct_load v15 wait_vdst:16
  25 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid wait_vdst value.
  26
  27 lds_direct_load v15 wait_vdst
  28 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  29
  30 v_interp_p10_f32 v0, v1, v2, v3 wait_exp:8
  31 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid wait_exp value.
  32
  33 v_interp_p2_f32 v0, -v1, v2, v3 wait_exp
  34 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  35
  36 global_atomic_cmpswap_x2 v[1:4], v3, v[5:8], off offset:2047 glc
  37 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  38
  39 // s_waitcnt_depctr is called s_wait_alu on GFX12, but its semantics and
  40 // encoding are identical. Even so, the new name should be rejected on GFX11
  41 s_wait_alu 0xfffe
  42 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
  43
  44 v_cubesc_f32_e64_dpp v5, v1, v2, 12345678 row_shr:4 row_mask:0xf bank_mask:0xf
  45 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  46
  47 v_add3_u32_e64_dpp v5, v1, v2, 49812340 dpp8:[7,6,5,4,3,2,1,0]
  48 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  49
  50 v_add3_u32_e64_dpp v5, v1, s1, v0 dpp8:[7,6,5,4,3,2,1,0]
  51 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  52
  53 v_add3_u32_e64_dpp v5, v1, 42, v0 dpp8:[7,6,5,4,3,2,1,0]
  54 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src1 immediate operand invalid for instruction
  55
  56 v_add3_u32_e64_dpp v5, v1, s2, v3 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
  57 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  58
  59 v_add3_u32_e64_dpp v5, v1, 42, v3 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
  60 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src1 immediate operand invalid for instruction
  61
  62 v_cvt_f32_i32_e64_dpp v5, s1 dpp8:[7,6,5,4,3,2,1,0]
  63 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  64
  65 v_cvt_f32_i32_e64_dpp v5, s1 row_shl:15 row_mask:0xf bank_mask:0xf
  66 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  67
  68 v_cvt_f16_u16_e64_dpp v5, s1 dpp8:[7,6,5,4,3,2,1,0]
  69 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  70
  71 v_cvt_f16_u16_e64_dpp v5, s1 row_shl:1 row_mask:0xf bank_mask:0xf
  72 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  73
  74 ; disallow space between colons
  75 v_dual_mul_f32 v0, v0, v2 : : v_dual_mul_f32 v1, v1, v3
  76 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: unknown token in expression
  77
  78 // On GFX11, v_dot8_i32_i4 is a valid SP3 alias for v_dot8_i32_iu4.
  79 // However, we intentionally leave it unimplemented because on other
  80 // processors v_dot8_i32_i4 denotes an instruction of a different
  81 // behaviour, which is considered potentially dangerous.
  82 v_dot8_i32_i4 v0, v1, v2, v3
  83 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
  84
  85 // On GFX11, v_dot4_i32_i8 is a valid SP3 alias for v_dot4_i32_iu8.
  86 // However, we intentionally leave it unimplemented because on other
  87 // processors v_dot4_i32_i8 denotes an instruction of a different
  88 // behaviour, which is considered potentially dangerous.
  89 v_dot4_i32_i8 v0, v1, v2, v3
  90 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
  91
  92 v_dot4c_i32_i8 v0, v1, v2
  93 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
  94
  95 v_cmp_class_f16_e64_dpp s105, s2, v2 row_ror:15
  96 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  97
  98 v_cmpx_class_f32_e64_dpp s1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
  99 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 100
 101 v_fma_mix_f32_e64_dpp v5, s1, v3, v4 quad_perm:[3,2,1,0]
 102 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 103
 104 v_fma_mix_f32_e64_dpp v5, v1, s3, v4 quad_perm:[3,2,1,0]
 105 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 106
 107 v_fma_mix_f32_e64_dpp v5, s1, v3, v4 dpp8:[7,6,5,4,3,2,1,0]
 108 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 109
 110 v_fma_mix_f32_e64_dpp v5, v1, s3, v4 dpp8:[7,6,5,4,3,2,1,0]
 111 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 112
 113 v_fma_mixhi_f16_e64_dpp v5, v1, 0, v4 quad_perm:[3,2,1,0]
 114 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 115
 116 v_fma_mixlo_f16_e64_dpp v5, v1, 1, v4 dpp8:[7,6,5,4,3,2,1,0]
 117 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 118
 119 buffer_store_d16_hi_format_x v[1:2], off, s[12:15], s4 offset:4095 glc slc dlc tfe
 120 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: TFE modifier has no meaning for store instructions
 121
 122 v_fmac_f16_e64_dpp v5, -16, v3 dpp8:[7,6,5,4,3,2,1,0]
 123 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 124
 125 v_fmac_f16_e64_dpp v5, v2, s3 dpp8:[7,6,5,4,3,2,1,0]
 126 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 127
 128 v_fmac_f16_e64_dpp v5, v2, 0x1234 dpp8:[7,6,5,4,3,2,1,0]
 129 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 130
 131 v_fmac_f16_e64_dpp v5, 0x1234, v3 quad_perm:[3,2,1,0]
 132 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 133
 134 v_fmac_f16_e64_dpp v5, s2, v3 quad_perm:[3,2,1,0]
 135 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 136
 137 v_fmac_f16_e64_dpp v5, v2, 1.0 quad_perm:[3,2,1,0]
 138 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src1 immediate operand invalid for instruction
 139
 140 v_fmac_f32_e64_dpp v5, s2, v3 dpp8:[7,6,5,4,3,2,1,0]
 141 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 142
 143 v_fmac_f32_e64_dpp v5, 0x1234, v3 dpp8:[7,6,5,4,3,2,1,0]
 144 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 145
 146 v_fmac_f32_e64_dpp v5, v2, 1 dpp8:[7,6,5,4,3,2,1,0]
 147 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src1 immediate operand invalid for instruction
 148
 149 v_fmac_f32_e64_dpp v5, -1.0, v3 quad_perm:[3,2,1,0]
 150 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 151
 152 v_fmac_f32_e64_dpp v5, v2, s3 quad_perm:[3,2,1,0]
 153 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 154
 155 v_fmac_f32_e64_dpp v5, v2, 0x1234 quad_perm:[3,2,1,0]
 156 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 157
 158 s_load_dword s1, s[2:3], s0 0x1
 159 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 160
 161 scratch_store_b128 off, v[2:5], s0 offset:8000000
 162 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a 13-bit signed offset
 163
 164 flat_atomic_add_f32 v1, v[0:1], v2 offset:-1
 165 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: expected a 12-bit unsigned offset
 166
 167 s_load_b96 s[20:22], s[2:3], s0
 168 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
 169
 170 s_buffer_load_b96 s[20:22], s[4:7], s0
 171 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU