[Frontend] Remove unused includes (NFC) (#116927)
[llvm-project.git] / llvm / test / MC / AMDGPU / gfx12_asm_sopk.s
blob5ce6847b9dcad029425f764d72c07322dbc15985
1 // RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1200 %s | FileCheck --check-prefix=GFX12 %s
3 s_movk_i32 s0, 0x1234
4 // GFX12: encoding: [0x34,0x12,0x00,0xb0]
6 s_movk_i32 s0, 0xc1d1
7 // GFX12: encoding: [0xd1,0xc1,0x00,0xb0]
9 s_movk_i32 s105, 0x1234
10 // GFX12: encoding: [0x34,0x12,0x69,0xb0]
12 s_movk_i32 exec_lo, 0x1234
13 // GFX12: encoding: [0x34,0x12,0x7e,0xb0]
15 s_movk_i32 exec_hi, 0x1234
16 // GFX12: encoding: [0x34,0x12,0x7f,0xb0]
18 s_movk_i32 vcc_lo, 0x1234
19 // GFX12: encoding: [0x34,0x12,0x6a,0xb0]
21 s_movk_i32 vcc_hi, 0x1234
22 // GFX12: encoding: [0x34,0x12,0x6b,0xb0]
24 s_movk_i32 m0, 0x1234
25 // GFX12: encoding: [0x34,0x12,0x7d,0xb0]
27 s_version 0x1234
28 // GFX12: encoding: [0x34,0x12,0x80,0xb0]
30 s_version 0xc1d1
31 // GFX12: encoding: [0xd1,0xc1,0x80,0xb0]
33 s_version UC_VERSION_GFX12
34 // GFX12: encoding: [0x09,0x00,0x80,0xb0]
36 s_version UC_VERSION_GFX12 | UC_VERSION_W32_BIT
37 // GFX12: encoding: [0x09,0x40,0x80,0xb0]
39 s_version UC_VERSION_GFX12 | UC_VERSION_W64_BIT
40 // GFX12: encoding: [0x09,0x20,0x80,0xb0]
42 s_version UC_VERSION_GFX12 | UC_VERSION_MDP_BIT
43 // GFX12: encoding: [0x09,0x80,0x80,0xb0]
45 s_version UC_VERSION_GFX12 | UC_VERSION_W64_BIT | UC_VERSION_MDP_BIT
46 // GFX12: encoding: [0x09,0xa0,0x80,0xb0]
48 s_cmovk_i32 s0, 0x1234
49 // GFX12: encoding: [0x34,0x12,0x00,0xb1]
51 s_cmovk_i32 s0, 0xc1d1
52 // GFX12: encoding: [0xd1,0xc1,0x00,0xb1]
54 s_cmovk_i32 s105, 0x1234
55 // GFX12: encoding: [0x34,0x12,0x69,0xb1]
57 s_cmovk_i32 exec_lo, 0x1234
58 // GFX12: encoding: [0x34,0x12,0x7e,0xb1]
60 s_cmovk_i32 exec_hi, 0x1234
61 // GFX12: encoding: [0x34,0x12,0x7f,0xb1]
63 s_cmovk_i32 vcc_lo, 0x1234
64 // GFX12: encoding: [0x34,0x12,0x6a,0xb1]
66 s_cmovk_i32 vcc_hi, 0x1234
67 // GFX12: encoding: [0x34,0x12,0x6b,0xb1]
69 s_cmovk_i32 m0, 0x1234
70 // GFX12: encoding: [0x34,0x12,0x7d,0xb1]
72 s_addk_co_i32 s0, 0x1234
73 // GFX12: encoding: [0x34,0x12,0x80,0xb7]
75 s_addk_co_i32 s0, 0xc1d1
76 // GFX12: encoding: [0xd1,0xc1,0x80,0xb7]
78 s_addk_co_i32 s105, 0x1234
79 // GFX12: encoding: [0x34,0x12,0xe9,0xb7]
81 s_addk_co_i32 exec_lo, 0x1234
82 // GFX12: encoding: [0x34,0x12,0xfe,0xb7]
84 s_addk_co_i32 exec_hi, 0x1234
85 // GFX12: encoding: [0x34,0x12,0xff,0xb7]
87 s_addk_co_i32 vcc_lo, 0x1234
88 // GFX12: encoding: [0x34,0x12,0xea,0xb7]
90 s_addk_co_i32 vcc_hi, 0x1234
91 // GFX12: encoding: [0x34,0x12,0xeb,0xb7]
93 s_addk_co_i32 m0, 0x1234
94 // GFX12: encoding: [0x34,0x12,0xfd,0xb7]
96 s_mulk_i32 s0, 0x1234
97 // GFX12: encoding: [0x34,0x12,0x00,0xb8]
99 s_mulk_i32 s0, 0xc1d1
100 // GFX12: encoding: [0xd1,0xc1,0x00,0xb8]
102 s_mulk_i32 s105, 0x1234
103 // GFX12: encoding: [0x34,0x12,0x69,0xb8]
105 s_mulk_i32 exec_lo, 0x1234
106 // GFX12: encoding: [0x34,0x12,0x7e,0xb8]
108 s_mulk_i32 exec_hi, 0x1234
109 // GFX12: encoding: [0x34,0x12,0x7f,0xb8]
111 s_mulk_i32 vcc_lo, 0x1234
112 // GFX12: encoding: [0x34,0x12,0x6a,0xb8]
114 s_mulk_i32 vcc_hi, 0x1234
115 // GFX12: encoding: [0x34,0x12,0x6b,0xb8]
117 s_mulk_i32 m0, 0x1234
118 // GFX12: encoding: [0x34,0x12,0x7d,0xb8]
120 s_getreg_b32 s0, 0x1234
121 // GFX12: encoding: [0x34,0x12,0x80,0xb8]
123 s_getreg_b32 s0, 0xc1d1
124 // GFX12: encoding: [0xd1,0xc1,0x80,0xb8]
126 s_getreg_b32 s105, 0x1234
127 // GFX12: encoding: [0x34,0x12,0xe9,0xb8]
129 s_getreg_b32 exec_lo, 0x1234
130 // GFX12: encoding: [0x34,0x12,0xfe,0xb8]
132 s_getreg_b32 exec_hi, 0x1234
133 // GFX12: encoding: [0x34,0x12,0xff,0xb8]
135 s_getreg_b32 vcc_lo, 0x1234
136 // GFX12: encoding: [0x34,0x12,0xea,0xb8]
138 s_getreg_b32 vcc_hi, 0x1234
139 // GFX12: encoding: [0x34,0x12,0xeb,0xb8]
141 s_getreg_b32 m0, 0x1234
142 // GFX12: encoding: [0x34,0x12,0xfd,0xb8]
144 s_setreg_b32 0x1234, s0
145 // GFX12: encoding: [0x34,0x12,0x00,0xb9]
147 s_setreg_b32 0xc1d1, s0
148 // GFX12: encoding: [0xd1,0xc1,0x00,0xb9]
150 s_setreg_b32 0x1234, s105
151 // GFX12: encoding: [0x34,0x12,0x69,0xb9]
153 s_setreg_b32 0x1234, exec_lo
154 // GFX12: encoding: [0x34,0x12,0x7e,0xb9]
156 s_setreg_b32 0x1234, exec_hi
157 // GFX12: encoding: [0x34,0x12,0x7f,0xb9]
159 s_setreg_b32 0x1234, vcc_lo
160 // GFX12: encoding: [0x34,0x12,0x6a,0xb9]
162 s_setreg_b32 0x1234, vcc_hi
163 // GFX12: encoding: [0x34,0x12,0x6b,0xb9]
165 s_setreg_b32 0x1234, m0
166 // GFX12: encoding: [0x34,0x12,0x7d,0xb9]
168 s_setreg_imm32_b32 0x1234, 0x11213141
169 // GFX12: encoding: [0x34,0x12,0x80,0xb9,0x41,0x31,0x21,0x11]
171 s_setreg_imm32_b32 0xc1d1, 0x11213141
172 // GFX12: encoding: [0xd1,0xc1,0x80,0xb9,0x41,0x31,0x21,0x11]
174 s_setreg_imm32_b32 0x1234, 0xa1b1c1d1
175 // GFX12: encoding: [0x34,0x12,0x80,0xb9,0xd1,0xc1,0xb1,0xa1]
177 s_setreg_imm32_b32 0xc1d1, 0xa1b1c1d1
178 // GFX12: encoding: [0xd1,0xc1,0x80,0xb9,0xd1,0xc1,0xb1,0xa1]
180 s_call_b64 s[0:1], 0x1234
181 // GFX12: encoding: [0x34,0x12,0x00,0xba]
183 s_call_b64 s[104:105], 0x1234
184 // GFX12: encoding: [0x34,0x12,0x68,0xba]
186 s_call_b64 exec, 0x1234
187 // GFX12: encoding: [0x34,0x12,0x7e,0xba]
189 s_call_b64 vcc, 0x1234
190 // GFX12: encoding: [0x34,0x12,0x6a,0xba]
192 s_call_b64 null, 0x1234
193 // GFX12: encoding: [0x34,0x12,0x7c,0xba]
195 s_getreg_b32 s0, hwreg(HW_REG_MODE)
196 // GFX12: encoding: [0x01,0xf8,0x80,0xb8]
198 s_getreg_b32 s0, hwreg(HW_REG_STATUS)
199 // GFX12: encoding: [0x02,0xf8,0x80,0xb8]
201 s_getreg_b32 s0, hwreg(HW_REG_STATE_PRIV)
202 // GFX12: encoding: [0x04,0xf8,0x80,0xb8]
204 s_getreg_b32 s0, hwreg(HW_REG_GPR_ALLOC)
205 // GFX12: encoding: [0x05,0xf8,0x80,0xb8]
207 s_getreg_b32 s0, hwreg(HW_REG_LDS_ALLOC)
208 // GFX12: encoding: [0x06,0xf8,0x80,0xb8]
210 s_getreg_b32 s0, hwreg(HW_REG_IB_STS)
211 // GFX12: encoding: [0x07,0xf8,0x80,0xb8]
213 s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_DATA)
214 // GFX12: encoding: [0x0a,0xf8,0x80,0xb8]
216 s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_PC_LO)
217 // GFX12: encoding: [0x0b,0xf8,0x80,0xb8]
219 s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_PC_HI)
220 // GFX12: encoding: [0x0c,0xf8,0x80,0xb8]
222 s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_DATA1)
223 // GFX12: encoding: [0x0f,0xf8,0x80,0xb8]
225 s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_DATA2)
226 // GFX12: encoding: [0x10,0xf8,0x80,0xb8]
228 s_getreg_b32 s0, hwreg(HW_REG_EXCP_FLAG_PRIV)
229 // GFX12: encoding: [0x11,0xf8,0x80,0xb8]
231 s_getreg_b32 s0, hwreg(HW_REG_EXCP_FLAG_USER)
232 // GFX12: encoding: [0x12,0xf8,0x80,0xb8]
234 s_getreg_b32 s0, hwreg(HW_REG_TRAP_CTRL)
235 // GFX12: encoding: [0x13,0xf8,0x80,0xb8]
237 s_getreg_b32 s0, hwreg(HW_REG_SCRATCH_BASE_LO)
238 // GFX12: encoding: [0x14,0xf8,0x80,0xb8]
240 s_getreg_b32 s0, hwreg(HW_REG_SCRATCH_BASE_HI)
241 // GFX12: encoding: [0x15,0xf8,0x80,0xb8]
243 s_getreg_b32 s0, hwreg(HW_REG_HW_ID1)
244 // GFX12: encoding: [0x17,0xf8,0x80,0xb8]
246 s_getreg_b32 s0, hwreg(HW_REG_HW_ID2)
247 // GFX12: encoding: [0x18,0xf8,0x80,0xb8]
249 s_getreg_b32 s0, hwreg(HW_REG_DVGPR_ALLOC_LO)
250 // GFX12: encoding: [0x1f,0xf8,0x80,0xb8]
252 s_getreg_b32 s0, hwreg(HW_REG_DVGPR_ALLOC_HI)
253 // GFX12: encoding: [0x20,0xf8,0x80,0xb8]
255 s_getreg_b32 s0, hwreg(HW_REG_SHADER_CYCLES_LO)
256 // GFX12: encoding: [0x1d,0xf8,0x80,0xb8]
258 s_getreg_b32 s0, hwreg(HW_REG_SHADER_CYCLES_HI)
259 // GFX12: encoding: [0x1e,0xf8,0x80,0xb8]