llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx8.s

   1 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx801 < %s | FileCheck --check-prefix=ASM %s
   2
   3 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx801 -filetype=obj < %s > %t
   4 // RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
   5
   6 // When going from asm -> asm, the expressions should remain the same (i.e., symbolic).
   7 // When going from asm -> obj, the expressions should get resolved (through fixups),
   8
   9 // OBJDUMP: Contents of section .rodata
  10 // expr_defined_later
  11 // OBJDUMP-NEXT: 0000 2b000000 2c000000 00000000 00000000
  12 // OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
  13 // OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
  14 // OBJDUMP-NEXT: 0030 8bf1af00 801f007f 00080000 00000000
  15 // expr_defined
  16 // OBJDUMP-NEXT: 0040 2a000000 2b000000 00000000 00000000
  17 // OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
  18 // OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00000000
  19 // OBJDUMP-NEXT: 0070 8af1af00 801f007f 00080000 00000000
  20
  21 .text
  22 // ASM: .text
  23
  24 .amdhsa_code_object_version 4
  25 // ASM: .amdhsa_code_object_version 4
  26
  27 .p2align 8
  28 .type expr_defined_later,@function
  29 expr_defined_later:
  30   s_endpgm
  31
  32 .p2align 8
  33 .type expr_defined,@function
  34 expr_defined:
  35   s_endpgm
  36
  37 .rodata
  38 // ASM: .rodata
  39
  40 .p2align 6
  41 .amdhsa_kernel expr_defined_later
  42   .amdhsa_group_segment_fixed_size defined_value+2
  43   .amdhsa_private_segment_fixed_size defined_value+3
  44   .amdhsa_system_vgpr_workitem_id defined_2_bits
  45   .amdhsa_float_round_mode_32 defined_2_bits
  46   .amdhsa_float_round_mode_16_64 defined_2_bits
  47   .amdhsa_float_denorm_mode_32 defined_2_bits
  48   .amdhsa_float_denorm_mode_16_64 defined_2_bits
  49   .amdhsa_system_sgpr_workgroup_id_x defined_boolean
  50   .amdhsa_system_sgpr_workgroup_id_y defined_boolean
  51   .amdhsa_system_sgpr_workgroup_id_z defined_boolean
  52   .amdhsa_system_sgpr_workgroup_info defined_boolean
  53   .amdhsa_exception_fp_ieee_invalid_op defined_boolean
  54   .amdhsa_exception_fp_denorm_src defined_boolean
  55   .amdhsa_exception_fp_ieee_div_zero defined_boolean
  56   .amdhsa_exception_fp_ieee_overflow defined_boolean
  57   .amdhsa_exception_fp_ieee_underflow defined_boolean
  58   .amdhsa_exception_fp_ieee_inexact defined_boolean
  59   .amdhsa_exception_int_div_zero defined_boolean
  60   .amdhsa_uses_dynamic_stack defined_boolean
  61   .amdhsa_next_free_vgpr defined_value+4
  62   .amdhsa_next_free_sgpr defined_value+5
  63   .amdhsa_reserve_vcc defined_boolean
  64   .amdhsa_reserve_flat_scratch defined_boolean
  65 .end_amdhsa_kernel
  66
  67 .set defined_value, 41
  68 .set defined_2_bits, 3
  69 .set defined_boolean, 1
  70
  71 .p2align 6
  72 .amdhsa_kernel expr_defined
  73   .amdhsa_group_segment_fixed_size defined_value+1
  74   .amdhsa_private_segment_fixed_size defined_value+2
  75   .amdhsa_system_vgpr_workitem_id defined_2_bits
  76   .amdhsa_float_round_mode_32 defined_2_bits
  77   .amdhsa_float_round_mode_16_64 defined_2_bits
  78   .amdhsa_float_denorm_mode_32 defined_2_bits
  79   .amdhsa_float_denorm_mode_16_64 defined_2_bits
  80   .amdhsa_system_sgpr_workgroup_id_x defined_boolean
  81   .amdhsa_system_sgpr_workgroup_id_y defined_boolean
  82   .amdhsa_system_sgpr_workgroup_id_z defined_boolean
  83   .amdhsa_system_sgpr_workgroup_info defined_boolean
  84   .amdhsa_exception_fp_ieee_invalid_op defined_boolean
  85   .amdhsa_exception_fp_denorm_src defined_boolean
  86   .amdhsa_exception_fp_ieee_div_zero defined_boolean
  87   .amdhsa_exception_fp_ieee_overflow defined_boolean
  88   .amdhsa_exception_fp_ieee_underflow defined_boolean
  89   .amdhsa_exception_fp_ieee_inexact defined_boolean
  90   .amdhsa_exception_int_div_zero defined_boolean
  91   .amdhsa_uses_dynamic_stack defined_boolean
  92   .amdhsa_next_free_vgpr defined_value+3
  93   .amdhsa_next_free_sgpr defined_value+4
  94   .amdhsa_reserve_vcc defined_boolean
  95   .amdhsa_reserve_flat_scratch defined_boolean
  96 .end_amdhsa_kernel
  97
  98 // ASM: .amdhsa_kernel expr_defined_later
  99 // ASM-NEXT: .amdhsa_group_segment_fixed_size defined_value+2
 100 // ASM-NEXT: .amdhsa_private_segment_fixed_size defined_value+3
 101 // ASM-NEXT: .amdhsa_kernarg_size 0
 102 // ASM-NEXT: .amdhsa_user_sgpr_count 0
 103 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_buffer 0
 104 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 0
 105 // ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 0
 106 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 0
 107 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 0
 108 // ASM-NEXT: .amdhsa_user_sgpr_flat_scratch_init 0
 109 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 0
 110 // ASM-NEXT: .amdhsa_system_sgpr_private_segment_wavefront_offset ((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&1
 111 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&128)>>7
 112 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&256)>>8
 113 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&512)>>9
 114 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_info (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&1024)>>10
 115 // ASM-NEXT: .amdhsa_system_vgpr_workitem_id (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&6144)>>11
 116 // ASM-NEXT: .amdhsa_next_free_vgpr defined_value+4
 117 // ASM-NEXT: .amdhsa_next_free_sgpr defined_value+5
 118 // ASM-NEXT: .amdhsa_reserve_vcc defined_boolean
 119 // ASM-NEXT: .amdhsa_reserve_flat_scratch defined_boolean
 120 // ASM-NEXT: .amdhsa_reserve_xnack_mask 1
 121 // ASM-NEXT: .amdhsa_float_round_mode_32 ((((((((((((11272192|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~63))|(((alignto(max(defined_value+4, 1), 4))/4)-1))&(~960))|((((alignto(max((defined_value+5)+(extrasgprs(defined_boolean, defined_boolean, 1)), 1), 8))/8)-1)<<6))&12288)>>12
 122 // ASM-NEXT: .amdhsa_float_round_mode_16_64 ((((((((((((11272192|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~63))|(((alignto(max(defined_value+4, 1), 4))/4)-1))&(~960))|((((alignto(max((defined_value+5)+(extrasgprs(defined_boolean, defined_boolean, 1)), 1), 8))/8)-1)<<6))&49152)>>14
 123 // ASM-NEXT: .amdhsa_float_denorm_mode_32 ((((((((((((11272192|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~63))|(((alignto(max(defined_value+4, 1), 4))/4)-1))&(~960))|((((alignto(max((defined_value+5)+(extrasgprs(defined_boolean, defined_boolean, 1)), 1), 8))/8)-1)<<6))&196608)>>16
 124 // ASM-NEXT: .amdhsa_float_denorm_mode_16_64 ((((((((((((11272192|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~63))|(((alignto(max(defined_value+4, 1), 4))/4)-1))&(~960))|((((alignto(max((defined_value+5)+(extrasgprs(defined_boolean, defined_boolean, 1)), 1), 8))/8)-1)<<6))&786432)>>18
 125 // ASM-NEXT: .amdhsa_dx10_clamp 1
 126 // ASM-NEXT: .amdhsa_ieee_mode 1
 127 // ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&16777216)>>24
 128 // ASM-NEXT: .amdhsa_exception_fp_denorm_src (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&33554432)>>25
 129 // ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&67108864)>>26
 130 // ASM-NEXT: .amdhsa_exception_fp_ieee_overflow (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&134217728)>>27
 131 // ASM-NEXT: .amdhsa_exception_fp_ieee_underflow (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&268435456)>>28
 132 // ASM-NEXT: .amdhsa_exception_fp_ieee_inexact (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&536870912)>>29
 133 // ASM-NEXT: .amdhsa_exception_int_div_zero (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&1073741824)>>30
 134 // ASM-NEXT: .end_amdhsa_kernel
 135
 136 // ASM:       .set defined_value, 41
 137 // ASM-NEXT:  .no_dead_strip defined_value
 138 // ASM-NEXT:  .set defined_2_bits, 3
 139 // ASM-NEXT:  .no_dead_strip defined_2_bits
 140 // ASM-NEXT:  .set defined_boolean, 1
 141 // ASM-NEXT:  .no_dead_strip defined_boolean
 142
 143 // ASM: .amdhsa_kernel expr_defined
 144 // ASM-NEXT: .amdhsa_group_segment_fixed_size 42
 145 // ASM-NEXT: .amdhsa_private_segment_fixed_size 43
 146 // ASM-NEXT: .amdhsa_kernarg_size 0
 147 // ASM-NEXT: .amdhsa_user_sgpr_count 0
 148 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_buffer 0
 149 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 0
 150 // ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 0
 151 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 0
 152 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 0
 153 // ASM-NEXT: .amdhsa_user_sgpr_flat_scratch_init 0
 154 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 0
 155 // ASM-NEXT: .amdhsa_system_sgpr_private_segment_wavefront_offset 0
 156 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 1
 157 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
 158 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
 159 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
 160 // ASM-NEXT: .amdhsa_system_vgpr_workitem_id 3
 161 // ASM-NEXT: .amdhsa_next_free_vgpr 44
 162 // ASM-NEXT: .amdhsa_next_free_sgpr 45
 163 // ASM-NEXT: .amdhsa_reserve_vcc 1
 164 // ASM-NEXT: .amdhsa_reserve_flat_scratch 1
 165 // ASM-NEXT: .amdhsa_reserve_xnack_mask 1
 166 // ASM-NEXT: .amdhsa_float_round_mode_32 3
 167 // ASM-NEXT: .amdhsa_float_round_mode_16_64 3
 168 // ASM-NEXT: .amdhsa_float_denorm_mode_32 3
 169 // ASM-NEXT: .amdhsa_float_denorm_mode_16_64 3
 170 // ASM-NEXT: .amdhsa_dx10_clamp 1
 171 // ASM-NEXT: .amdhsa_ieee_mode 1
 172 // ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
 173 // ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
 174 // ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
 175 // ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
 176 // ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
 177 // ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
 178 // ASM-NEXT: .amdhsa_exception_int_div_zero 1
 179 // ASM-NEXT: .end_amdhsa_kernel