llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s

   1 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx904 -mattr=+xnack < %s | FileCheck --check-prefix=ASM %s
   2 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx904 -mattr=+xnack -filetype=obj < %s > %t
   3 // RUN: llvm-readelf -S -r -s %t | FileCheck --check-prefix=READOBJ %s
   4 // RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
   5
   6 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx904 --amdhsa-code-object-version=6 -mattr=+xnack < %s | FileCheck --check-prefix=ASM %s
   7 // RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx904 --amdhsa-code-object-version=6 -mattr=+xnack -filetype=obj < %s > %t
   8 // RUN: llvm-readelf -S -r -s %t | FileCheck --check-prefix=READOBJ %s
   9 // RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
  10
  11 // READOBJ: Section Headers
  12 // READOBJ: .text   PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
  13 // READOBJ: .rodata PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}}        000100 {{[0-9]+}}  A {{[0-9]+}} {{[0-9]+}} 64
  14
  15 // READOBJ: Relocation section '.rela.rodata' at offset
  16 // READOBJ: 0000000000000010 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 10
  17 // READOBJ: 0000000000000050 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 110
  18 // READOBJ: 0000000000000090 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 210
  19 // READOBJ: 00000000000000d0 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 310
  20
  21 // READOBJ: Symbol table '.symtab' contains {{[0-9]+}} entries:
  22 // READOBJ:      0000000000000000  0 FUNC    LOCAL  PROTECTED 2 minimal
  23 // READOBJ-NEXT: 0000000000000100  0 FUNC    LOCAL  PROTECTED 2 complete
  24 // READOBJ-NEXT: 0000000000000200  0 FUNC    LOCAL  PROTECTED 2 special_sgpr
  25 // READOBJ-NEXT: 0000000000000300  0 FUNC    LOCAL  PROTECTED 2 disabled_user_sgpr
  26 // READOBJ-NEXT: 0000000000000000 64 OBJECT  LOCAL  DEFAULT   3 minimal.kd
  27 // READOBJ-NEXT: 0000000000000040 64 OBJECT  LOCAL  DEFAULT   3 complete.kd
  28 // READOBJ-NEXT: 0000000000000080 64 OBJECT  LOCAL  DEFAULT   3 special_sgpr.kd
  29 // READOBJ-NEXT: 00000000000000c0 64 OBJECT  LOCAL  DEFAULT   3 disabled_user_sgpr.kd
  30
  31 // OBJDUMP: Contents of section .rodata
  32 // Note, relocation for KERNEL_CODE_ENTRY_BYTE_OFFSET is not resolved here.
  33 // minimal
  34 // OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
  35 // OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
  36 // OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
  37 // OBJDUMP-NEXT: 0030 0000ac00 80000000 00000000 00000000
  38 // complete
  39 // OBJDUMP-NEXT: 0040 01000000 01000000 08000000 00000000
  40 // OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
  41 // OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00000000
  42 // OBJDUMP-NEXT: 0070 c2500104 1f0f007f 7f080000 00000000
  43 // special_sgpr
  44 // OBJDUMP-NEXT: 0080 00000000 00000000 00000000 00000000
  45 // OBJDUMP-NEXT: 0090 00000000 00000000 00000000 00000000
  46 // OBJDUMP-NEXT: 00a0 00000000 00000000 00000000 00000000
  47 // OBJDUMP-NEXT: 00b0 00010000 80000000 00000000 00000000
  48 // disabled_user_sgpr
  49 // OBJDUMP-NEXT: 00c0 00000000 00000000 00000000 00000000
  50 // OBJDUMP-NEXT: 00d0 00000000 00000000 00000000 00000000
  51 // OBJDUMP-NEXT: 00e0 00000000 00000000 00000000 00000000
  52 // OBJDUMP-NEXT: 00f0 0000ac00 80000000 00000000 00000000
  53
  54 .text
  55 // ASM: .text
  56
  57 .amdgcn_target "amdgcn-amd-amdhsa--gfx904:xnack+"
  58 // ASM: .amdgcn_target "amdgcn-amd-amdhsa--gfx904:xnack+"
  59
  60 .amdhsa_code_object_version 5
  61 // ASM: .amdhsa_code_object_version 5
  62
  63 .p2align 8
  64 .type minimal,@function
  65 minimal:
  66   s_endpgm
  67
  68 .p2align 8
  69 .type complete,@function
  70 complete:
  71   s_endpgm
  72
  73 .p2align 8
  74 .type special_sgpr,@function
  75 special_sgpr:
  76   s_endpgm
  77
  78 .p2align 8
  79 .type disabled_user_sgpr,@function
  80 disabled_user_sgpr:
  81   s_endpgm
  82
  83 .rodata
  84 // ASM: .rodata
  85
  86 // Test that only specifying required directives is allowed, and that defaulted
  87 // values are omitted.
  88 .p2align 6
  89 .amdhsa_kernel minimal
  90   .amdhsa_next_free_vgpr 0
  91   .amdhsa_next_free_sgpr 0
  92 .end_amdhsa_kernel
  93
  94 // ASM: .amdhsa_kernel minimal
  95 // ASM: .amdhsa_next_free_vgpr 0
  96 // ASM-NEXT: .amdhsa_next_free_sgpr 0
  97 // ASM: .end_amdhsa_kernel
  98
  99 // Test that we can specify all available directives with non-default values.
 100 .p2align 6
 101 .amdhsa_kernel complete
 102   .amdhsa_group_segment_fixed_size 1
 103   .amdhsa_private_segment_fixed_size 1
 104   .amdhsa_kernarg_size 8
 105   .amdhsa_user_sgpr_count 15
 106   .amdhsa_user_sgpr_private_segment_buffer 1
 107   .amdhsa_user_sgpr_dispatch_ptr 1
 108   .amdhsa_user_sgpr_queue_ptr 1
 109   .amdhsa_user_sgpr_kernarg_segment_ptr 1
 110   .amdhsa_user_sgpr_dispatch_id 1
 111   .amdhsa_user_sgpr_flat_scratch_init 1
 112   .amdhsa_user_sgpr_private_segment_size 1
 113   .amdhsa_uses_dynamic_stack 1
 114   .amdhsa_system_sgpr_private_segment_wavefront_offset 1
 115   .amdhsa_system_sgpr_workgroup_id_x 0
 116   .amdhsa_system_sgpr_workgroup_id_y 1
 117   .amdhsa_system_sgpr_workgroup_id_z 1
 118   .amdhsa_system_sgpr_workgroup_info 1
 119   .amdhsa_system_vgpr_workitem_id 1
 120   .amdhsa_next_free_vgpr 9
 121   .amdhsa_next_free_sgpr 27
 122   .amdhsa_reserve_vcc 0
 123   .amdhsa_reserve_flat_scratch 0
 124   .amdhsa_reserve_xnack_mask 1
 125   .amdhsa_float_round_mode_32 1
 126   .amdhsa_float_round_mode_16_64 1
 127   .amdhsa_float_denorm_mode_32 1
 128   .amdhsa_float_denorm_mode_16_64 0
 129   .amdhsa_dx10_clamp 0
 130   .amdhsa_ieee_mode 0
 131   .amdhsa_fp16_overflow 1
 132   .amdhsa_exception_fp_ieee_invalid_op 1
 133   .amdhsa_exception_fp_denorm_src 1
 134   .amdhsa_exception_fp_ieee_div_zero 1
 135   .amdhsa_exception_fp_ieee_overflow 1
 136   .amdhsa_exception_fp_ieee_underflow 1
 137   .amdhsa_exception_fp_ieee_inexact 1
 138   .amdhsa_exception_int_div_zero 1
 139 .end_amdhsa_kernel
 140
 141 // ASM: .amdhsa_kernel complete
 142 // ASM-NEXT: .amdhsa_group_segment_fixed_size 1
 143 // ASM-NEXT: .amdhsa_private_segment_fixed_size 1
 144 // ASM-NEXT: .amdhsa_kernarg_size 8
 145 // ASM-NEXT: .amdhsa_user_sgpr_count 15
 146 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_buffer 1
 147 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
 148 // ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 1
 149 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 150 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 1
 151 // ASM-NEXT: .amdhsa_user_sgpr_flat_scratch_init 1
 152 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 1
 153 // ASM-NEXT: .amdhsa_uses_dynamic_stack 1
 154 // ASM-NEXT: .amdhsa_system_sgpr_private_segment_wavefront_offset 1
 155 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 0
 156 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
 157 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
 158 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
 159 // ASM-NEXT: .amdhsa_system_vgpr_workitem_id 1
 160 // ASM-NEXT: .amdhsa_next_free_vgpr 9
 161 // ASM-NEXT: .amdhsa_next_free_sgpr 27
 162 // ASM-NEXT: .amdhsa_reserve_vcc 0
 163 // ASM-NEXT: .amdhsa_reserve_flat_scratch 0
 164 // ASM-NEXT: .amdhsa_reserve_xnack_mask 1
 165 // ASM-NEXT: .amdhsa_float_round_mode_32 1
 166 // ASM-NEXT: .amdhsa_float_round_mode_16_64 1
 167 // ASM-NEXT: .amdhsa_float_denorm_mode_32 1
 168 // ASM-NEXT: .amdhsa_float_denorm_mode_16_64 0
 169 // ASM-NEXT: .amdhsa_dx10_clamp 0
 170 // ASM-NEXT: .amdhsa_ieee_mode 0
 171 // ASM-NEXT: .amdhsa_fp16_overflow 1
 172 // ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
 173 // ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
 174 // ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
 175 // ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
 176 // ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
 177 // ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
 178 // ASM-NEXT: .amdhsa_exception_int_div_zero 1
 179 // ASM-NEXT: .end_amdhsa_kernel
 180
 181 // Test that we are including special SGPR usage in the granulated count.
 182 .p2align 6
 183 .amdhsa_kernel special_sgpr
 184   // Same next_free_sgpr as "complete", but...
 185   .amdhsa_next_free_sgpr 27
 186   // ...on GFX9 this should require an additional 6 SGPRs, pushing us from
 187   // 3 granules to 4
 188   .amdhsa_reserve_flat_scratch 1
 189
 190   .amdhsa_reserve_vcc 0
 191   .amdhsa_reserve_xnack_mask 1
 192
 193   .amdhsa_float_denorm_mode_16_64 0
 194   .amdhsa_dx10_clamp 0
 195   .amdhsa_ieee_mode 0
 196   .amdhsa_next_free_vgpr 0
 197 .end_amdhsa_kernel
 198
 199 // ASM: .amdhsa_kernel special_sgpr
 200 // ASM: .amdhsa_next_free_vgpr 0
 201 // ASM-NEXT: .amdhsa_next_free_sgpr 27
 202 // ASM-NEXT: .amdhsa_reserve_vcc 0
 203 // ASM-NEXT: .amdhsa_reserve_flat_scratch 1
 204 // ASM-NEXT: .amdhsa_reserve_xnack_mask 1
 205 // ASM: .amdhsa_float_denorm_mode_16_64 0
 206 // ASM-NEXT: .amdhsa_dx10_clamp 0
 207 // ASM-NEXT: .amdhsa_ieee_mode 0
 208 // ASM: .end_amdhsa_kernel
 209
 210 // Test that explicitly disabling user_sgpr's does not affect the user_sgpr
 211 // count, i.e. this should produce the same descriptor as minimal.
 212 .p2align 6
 213 .amdhsa_kernel disabled_user_sgpr
 214   .amdhsa_user_sgpr_private_segment_buffer 0
 215   .amdhsa_next_free_vgpr 0
 216   .amdhsa_next_free_sgpr 0
 217 .end_amdhsa_kernel
 218
 219 // ASM: .amdhsa_kernel disabled_user_sgpr
 220 // ASM: .amdhsa_next_free_vgpr 0
 221 // ASM-NEXT: .amdhsa_next_free_sgpr 0
 222 // ASM: .end_amdhsa_kernel
 223
 224 .section .foo
 225
 226 .byte .amdgcn.gfx_generation_number
 227 // ASM: .byte 9
 228
 229 .byte .amdgcn.gfx_generation_minor
 230 // ASM: .byte 0
 231
 232 .byte .amdgcn.gfx_generation_stepping
 233 // ASM: .byte 4
 234
 235 .byte .amdgcn.next_free_vgpr
 236 // ASM: .byte 0
 237 .byte .amdgcn.next_free_sgpr
 238 // ASM: .byte 0
 239
 240 v_mov_b32_e32 v7, s10
 241
 242 .byte .amdgcn.next_free_vgpr
 243 // ASM: .byte 8
 244 .byte .amdgcn.next_free_sgpr
 245 // ASM: .byte 11
 246
 247 .set .amdgcn.next_free_vgpr, 0
 248 .set .amdgcn.next_free_sgpr, 0
 249
 250 .byte .amdgcn.next_free_vgpr
 251 // ASM: .byte 0
 252 .byte .amdgcn.next_free_sgpr
 253 // ASM: .byte 0
 254
 255 v_mov_b32_e32 v16, s3
 256
 257 .byte .amdgcn.next_free_vgpr
 258 // ASM: .byte 17
 259 .byte .amdgcn.next_free_sgpr
 260 // ASM: .byte 4
 261
 262 // Metadata
 263
 264 .amdgpu_metadata
 265   amdhsa.version:
 266     - 3
 267     - 0
 268   amdhsa.kernels:
 269     - .name:       amd_kernel_code_t_test_all
 270       .symbol: amd_kernel_code_t_test_all@kd
 271       .kernarg_segment_size: 8
 272       .group_segment_fixed_size: 16
 273       .private_segment_fixed_size: 32
 274       .uses_dynamic_stack: true
 275       .kernarg_segment_align: 64
 276       .wavefront_size: 128
 277       .sgpr_count: 14
 278       .vgpr_count: 40
 279       .max_flat_workgroup_size: 256
 280     - .name:       amd_kernel_code_t_minimal
 281       .symbol: amd_kernel_code_t_minimal@kd
 282       .kernarg_segment_size: 8
 283       .group_segment_fixed_size: 16
 284       .private_segment_fixed_size: 32
 285       .uses_dynamic_stack: true
 286       .kernarg_segment_align: 64
 287       .wavefront_size: 128
 288       .sgpr_count: 14
 289       .vgpr_count: 40
 290       .max_flat_workgroup_size: 256
 291 .end_amdgpu_metadata
 292
 293 // ASM:         .amdgpu_metadata
 294 // ASM:      amdhsa.kernels:
 295 // ASM:        - .group_segment_fixed_size: 16
 296 // ASM:          .kernarg_segment_align: 64
 297 // ASM:          .kernarg_segment_size: 8
 298 // ASM:          .max_flat_workgroup_size: 256
 299 // ASM:          .name:           amd_kernel_code_t_test_all
 300 // ASM:          .private_segment_fixed_size: 32
 301 // ASM:          .sgpr_count:     14
 302 // ASM:          .symbol:         'amd_kernel_code_t_test_all@kd'
 303 // ASM:          .uses_dynamic_stack: true
 304 // ASM:          .vgpr_count:     40
 305 // ASM:          .wavefront_size: 128
 306 // ASM:        - .group_segment_fixed_size: 16
 307 // ASM:          .kernarg_segment_align: 64
 308 // ASM:          .kernarg_segment_size: 8
 309 // ASM:          .max_flat_workgroup_size: 256
 310 // ASM:          .name:           amd_kernel_code_t_minimal
 311 // ASM:          .private_segment_fixed_size: 32
 312 // ASM:          .sgpr_count:     14
 313 // ASM:          .symbol:         'amd_kernel_code_t_minimal@kd'
 314 // ASM:          .uses_dynamic_stack: true
 315 // ASM:          .vgpr_count:     40
 316 // ASM:          .wavefront_size: 128
 317 // ASM:      amdhsa.version:
 318 // ASM-NEXT:   - 3
 319 // ASM-NEXT:   - 0
 320 // ASM:         .end_amdgpu_metadata