1 # REQUIRES: amdgpu-registered-target
2 # RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=ir-instruction-references,ir-block-references,ir-function-references -simplify-mir -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
3 # RUN: FileCheck --check-prefix=RESULT %s < %t
5 # CHECK-INTERESTINGNESS: G_LOAD
6 # CHECK-INTERESTINGNESS: G_LOAD
7 # CHECK-INTERESTINGNESS: G_LOAD
8 # CHECK-INTERESTINGNESS: G_LOAD
9 # CHECK-INTERESTINGNESS: G_STORE
10 # CHECK-INTERESTINGNESS: G_STORE
11 # CHECK-INTERESTINGNESS: G_STORE %{{[0-9]+}}(s32), %{{[0-9]+}}(p5) :: (store (s32) into %ir.keep.store, addrspace 5)
15 # RESULT-NEXT: - { id: 0, size: 32, alignment: 8 }
19 # RESULT: %{{[0-9]+}}:_(<2 x s16>) = G_LOAD %{{[0-9]+}}(p1) :: (load (<2 x s16>), align 32, addrspace 1)
22 # RESULT-NEXT: %{{[0-9]+}}:_(<2 x s32>) = G_LOAD %{{[0-9]+}}(p1) :: (load (<2 x s32>), addrspace 3)
23 # RESULT-NEXT: %{{[0-9]+}}:_(<2 x s32>) = G_LOAD %{{[0-9]+}}(p1) :: (load (<2 x s32>) from unknown-address + 8, addrspace 3)
24 # RESULT-NEXT: %{{[0-9]+}}:_(<2 x s32>) = G_LOAD %{{[0-9]+}}(p1) :: (load (<2 x s32>) from unknown-address + 12, align 4, basealign 8, addrspace 3)
28 # RESULT: G_STORE %{{[0-9]+}}(<2 x s32>), %{{[0-9]+}}(p5) :: (store (<2 x s32>) into %fixed-stack.0, addrspace 5)
29 # RESULT-NEXT: G_STORE %{{[0-9]+}}(<2 x s32>), %{{[0-9]+}}(p5) :: (store (<2 x s32>) into %stack.0, addrspace 5)
32 # RESULT: G_STORE %{{[0-9]+}}(s32), %{{[0-9]+}}(p5) :: (store (s32) into %ir.keep.store, addrspace 5)
33 # RESULT-NEXT: S_ENDPGM
36 define void @func(<2 x i16> addrspace(1)* %argptr0, <2 x i32> addrspace(3)* %argptr1, i32 addrspace(5)* %keep.store) {
38 %alloca = alloca i32, addrspace(5)
39 br label %block.name.0
42 br label %block.name.1
54 tracksRegLiveness: true
56 - { id: 0, offset: 16, size: 8, alignment: 8 }
58 - { id: 0, size: 32, alignment: 8, name: alloca }
63 %0:_(p1) = G_IMPLICIT_DEF
64 %1:_(<2 x s16>) = G_LOAD %0 :: (load (<2 x s16>) from %ir.argptr0, align 32, addrspace 1)
65 %2:_(<2 x s32>) = G_ZEXT %1
68 %3:_(<2 x s32>) = G_LOAD %0 :: (load (<2 x s32>) from %ir.argptr1, addrspace 3)
69 %4:_(<2 x s32>) = G_LOAD %0 :: (load (<2 x s32>) from %ir.argptr1 + 8, addrspace 3)
70 %5:_(<2 x s32>) = G_LOAD %0 :: (load (<2 x s32>) from %ir.argptr1 + 12, addrspace 3)
73 %6:_(<2 x s32>) = G_ADD %2, %3
74 %7:_(<2 x s32>) = G_ADD %6, %4
75 %8:_(<2 x s32>) = G_ADD %7, %5
76 %9:_(p5) = G_IMPLICIT_DEF
77 G_STORE %8, %9 :: (store (<2 x s32>) into %fixed-stack.0, addrspace 5)
78 G_STORE %8, %9 :: (store (<2 x s32>) into %stack.0.alloca, addrspace 5)
81 %10:_(p5) = G_IMPLICIT_DEF
82 %11:_(s32) = G_IMPLICIT_DEF
83 G_STORE %11, %10 :: (store (s32) into %ir.keep.store, addrspace 5)