1 # REQUIRES: amdgpu-registered-target
2 # RUN: llvm-reduce -abort-on-invalid-reduction -simplify-mir -mtriple=amdgcn-amd-amdhsa --delta-passes=instructions --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
3 # RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t
5 # CHECK-INTERESTINGNESS-COUNT-15: V_MOV_B32
8 # RESULT-NEXT: isFrameAddressTaken: true
9 # RESULT-NEXT: isReturnAddressTaken: true
10 # RESULT-NEXT: hasStackMap: true
11 # RESULT-NEXT: hasPatchPoint: true
12 # RESULT-NEXT: offsetAdjustment: 128
13 # RESULT-NEXT: maxAlignment: 64
14 # RESULT-NEXT: adjustsStack: true
15 # RESULT-NEXT: hasCalls: true
16 # RESULT-NEXT: stackProtector: '%stack.9.guard'
17 # RESULT-NEXT: maxCallFrameSize: 420
18 # RESULT-NEXT: cvBytesOfCalleeSavedRegisters: 48
19 # RESULT-NEXT: hasOpaqueSPAdjustment: true
20 # RESULT-NEXT: hasVAStart: true
21 # RESULT-NEXT: hasMustTailInVarArgFunc: true
22 # RESULT-NEXT: hasTailCall: true
23 # RESULT-NEXT: savePoint: '%bb.1'
24 # RESULT-NEXT: restorePoint: '%bb.2'
26 # RESULT-NEXT: fixedStack:
27 # RESULT-NEXT: - { id: 0, offset: 56, size: 4, alignment: 8, callee-saved-register: '$sgpr44',
28 # RESULT-NEXT: callee-saved-restored: false }
29 # RESULT-NEXT: - { id: 1, offset: 52, size: 4, alignment: 4, callee-saved-register: '$sgpr43' }
30 # RESULT-NEXT: - { id: 2, offset: 48, size: 8, alignment: 16, isAliased: true }
31 # RESULT-NEXT: - { id: 3, offset: 16, size: 16, alignment: 16 }
32 # RESULT-NEXT: - { id: 4, size: 8, alignment: 16 }
35 # RESULT-NEXT: - { id: 0, name: bigalloca, offset: 16, size: 16, alignment: 8 }
36 # RESULT-NEXT: - { id: 1, offset: 64, size: 4, alignment: 16, debug-info-variable: '!8',
37 # RESULT-NEXT: debug-info-expression: '!DIExpression()', debug-info-location: '!10' }
38 # RESULT-NEXT: - { id: 2, type: spill-slot, offset: 32, size: 4, alignment: 4 }
39 # RESULT-NEXT: - { id: 3, type: spill-slot, offset: 36, size: 4, alignment: 4, stack-id: sgpr-spill }
40 # RESULT-NEXT: - { id: 4, name: dynamic_alloca, type: variable-sized, alignment: 64 }
41 # RESULT-NEXT: - { id: 5, name: m1, size: 2052, alignment: 4, local-offset: 0 }
42 # RESULT-NEXT: - { id: 6, name: m2, size: 2060, alignment: 32, local-offset: 2080 }
43 # RESULT-NEXT: - { id: 7, offset: 48, size: 4, alignment: 4, callee-saved-register: '$sgpr40' }
44 # RESULT-NEXT: - { id: 8, offset: 52, size: 4, alignment: 4, callee-saved-register: '$sgpr41',
45 # RESULT-NEXT: callee-saved-restored: false }
46 # RESULT-NEXT: - { id: 9, name: guard, offset: 128, size: 4, alignment: 4 }
50 # RESULT-NEXT: [[FI0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.1, implicit $exec
51 # RESULT-NEXT: [[FI1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0.bigalloca, implicit $exec
52 # RESULT-NEXT: [[FI2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.2, implicit $exec
53 # RESULT-NEXT: [[FI3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.3, implicit $exec
54 # RESULT-NEXT: [[FI4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.4.dynamic_alloca, implicit $exec
55 # RESULT-NEXT: [[FI5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.5.m1, implicit $exec
56 # RESULT-NEXT: [[FI6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.6.m2, implicit $exec
57 # RESULT-NEXT: [[FI7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.7, implicit $exec
58 # RESULT-NEXT: [[FI8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.8, implicit $exec
59 # RESULT-NEXT: [[FI9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %fixed-stack.2, implicit $exec
60 # RESULT-NEXT: [[FI10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %fixed-stack.3, implicit $exec
61 # RESULT-NEXT: [[FI11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %fixed-stack.4, implicit $exec
62 # RESULT-NEXT: [[FI12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %fixed-stack.1, implicit $exec
63 # RESULT-NEXT: [[FI13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %fixed-stack.0, implicit $exec
64 # RESULT-NEXT: [[FI14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.9.guard, implicit $exec
65 # RESULT-NEXT: S_ENDPGM 0, implicit [[FI0]], implicit [[FI1]], implicit [[FI2]], implicit [[FI3]], implicit [[FI4]], implicit [[FI5]], implicit [[FI6]], implicit [[FI7]], implicit [[FI8]], implicit [[FI9]], implicit [[FI10]], implicit [[FI11]], implicit [[FI12]], implicit [[FI13]], implicit [[FI14]]
67 define void @func(i32 %size) !dbg !5 {
68 %bigalloca = alloca [4 x i32], align 1, addrspace(5)
69 %dynamic_alloca = alloca i32, i32 %size, align 1, addrspace(5)
70 %dead = alloca i64, align 1, addrspace(5)
71 %m1 = alloca [513 x float], align 1, addrspace(5)
72 %m2 = alloca [513 x float], align 1, addrspace(5)
73 %guard = alloca i32, align 4, addrspace(5)
74 call void @llvm.dbg.declare(metadata i32 addrspace(5)* undef, metadata !8, metadata !DIExpression()), !dbg !10
78 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
80 attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
83 !llvm.module.flags = !{!2, !3, !4}
85 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
86 !1 = !DIFile(filename: "tmp.c", directory: "/dev/null")
87 !2 = !{i32 2, !"Dwarf Version", i32 4}
88 !3 = !{i32 2, !"Debug Info Version", i32 3}
89 !4 = !{i32 7, !"PIC Level", i32 2}
90 !5 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !6, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0)
91 !6 = !DISubroutineType(types: !7)
93 !8 = !DILocalVariable(name: "in", arg: 1, scope: !5, file: !1, line: 1, type: !9)
94 !9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
95 !10 = !DILocation(line: 1, column: 14, scope: !5)
100 tracksRegLiveness: true
102 isFrameAddressTaken: true
103 isReturnAddressTaken: true
107 offsetAdjustment: 128
111 stackProtector: '%stack.9'
112 maxCallFrameSize: 420
113 cvBytesOfCalleeSavedRegisters: 48
114 hasOpaqueSPAdjustment: true
116 hasMustTailInVarArgFunc: true
120 restorePoint: '%bb.2'
123 - { id: 0, offset: 0, size: 8, alignment: 4, isImmutable: true, isAliased: false }
124 - { id: 1, offset: 16, size: 16, alignment: 8, isImmutable: false, isAliased: false }
125 - { id: 2, offset: 48, size: 8, alignment: 4, isImmutable: false, isAliased: true }
126 - { id: 3, offset: 52, size: 4, alignment: 4, callee-saved-register: '$sgpr43', callee-saved-restored: true }
127 - { id: 4, offset: 56, size: 4, alignment: 4, callee-saved-register: '$sgpr44', callee-saved-restored: false }
129 - { id: 1, offset: 16, size: 16, alignment: 8, name: bigalloca }
130 - { id: 0, offset: 64, size: 4, alignment: 16,
131 debug-info-variable: '!8', debug-info-expression: '!DIExpression()',
132 debug-info-location: '!10' }
133 - { id: 2, offset: 32, size: 4, alignment: 4, type: spill-slot }
134 - { id: 3, offset: 36, size: 4, alignment: 4, type: spill-slot, stack-id: sgpr-spill }
135 - { id: 4, type: variable-sized, alignment: 64, name: dynamic_alloca }
136 - { id: 5, name: m1, size: 2052, alignment: 4, local-offset: 0 }
137 - { id: 6, name: m2, size: 2060, alignment: 32, local-offset: 2080 }
138 - { id: 7, offset: 48, size: 4, alignment: 4, callee-saved-register: '$sgpr40', callee-saved-restored: true}
139 - { id: 8, offset: 52, size: 4, alignment: 4, callee-saved-register: '$sgpr41', callee-saved-restored: false}
140 - { id: 9, offset: 128, size: 4, alignment: 4, name: guard }
144 %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
145 %1:vgpr_32 = V_MOV_B32_e32 %stack.1, implicit $exec
146 %2:vgpr_32 = V_MOV_B32_e32 %stack.2, implicit $exec
147 %3:vgpr_32 = V_MOV_B32_e32 %stack.3, implicit $exec
148 %4:vgpr_32 = V_MOV_B32_e32 %stack.4, implicit $exec
149 %5:vgpr_32 = V_MOV_B32_e32 %stack.5, implicit $exec
150 %6:vgpr_32 = V_MOV_B32_e32 %stack.6, implicit $exec
151 %7:vgpr_32 = V_MOV_B32_e32 %stack.7, implicit $exec
152 %8:vgpr_32 = V_MOV_B32_e32 %stack.8, implicit $exec
153 %9:vgpr_32 = V_MOV_B32_e32 %fixed-stack.2, implicit $exec
154 %10:vgpr_32 = V_MOV_B32_e32 %fixed-stack.1, implicit $exec
155 %11:vgpr_32 = V_MOV_B32_e32 %fixed-stack.0, implicit $exec
156 %12:vgpr_32 = V_MOV_B32_e32 %fixed-stack.3, implicit $exec
157 %13:vgpr_32 = V_MOV_B32_e32 %fixed-stack.4, implicit $exec
158 %14:vgpr_32 = V_MOV_B32_e32 %stack.9.guard, implicit $exec
159 S_ENDPGM 0, implicit %0, implicit %1, implicit %2, implicit %3, implicit %4, implicit %5, implicit %6, implicit %7, implicit %8, implicit %9, implicit %10, implicit %11, implicit %12, implicit %13, implicit %14