llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir

   1 # REQUIRES: amdgpu-registered-target
   2 # RUN: llvm-reduce -abort-on-invalid-reduction -simplify-mir --delta-passes=register-masks -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
   3 # RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t
   4
   5 # CHECK-INTERESTINGNESS: CustomRegMask
   6 # CHECK-INTERESTINGNESS-SAME: $vcc_lo,
   7 # CHECK-INTERESTINGNESS-SAME: $agpr8,
   8 # CHECK-INTERESTINGNESS-SAME: $sgpr99,
   9 # CHECK-INTERESTINGNESS-SAME: $vgpr23,
  10 # CHECK-INTERESTINGNESS-SAME: $vgpr48_vgpr49_vgpr50,
  11
  12 # CHECK-INTERESTINGNESS: CustomRegMask
  13 # CHECK-INTERESTINGNESS-SAME: $sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81
  14
  15
  16 # RESULT: $sgpr30_sgpr31 = SI_CALL %0, 0, CustomRegMask($vcc_lo,$agpr8,$sgpr99,$vgpr23,$vgpr48_vgpr49_vgpr50,$vgpr49_vgpr50_vgpr51)
  17 # RESULT: $sgpr30_sgpr31 = SI_CALL %0, 0, CustomRegMask($sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81)
  18
  19 ---
  20 name: func
  21 tracksRegLiveness: true
  22 body:             |
  23   bb.0:
  24     liveins: $vgpr0, $vgpr1, $sgpr8_sgpr9
  25     %0:sreg_64_xexec = COPY $sgpr8_sgpr9
  26
  27     $sgpr30_sgpr31 = SI_CALL %0:sreg_64_xexec, 0, CustomRegMask($vgpr8_vgpr9, $vgpr9_vgpr10_vgpr11,$vcc_lo,$agpr8,$sgpr99,$vgpr23,$vgpr48_vgpr49_vgpr50,$vgpr49_vgpr50_vgpr51, $vgpr52_vgpr53_vgpr54,$vcc_hi,$sgpr0_sgpr1_sgpr2_sgpr3,$sgpr4_sgpr5_sgpr6_sgpr7)
  28      $sgpr30_sgpr31 = SI_CALL %0:sreg_64_xexec, 0, CustomRegMask($sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81)
  29
  30     S_ENDPGM 0
  31 ...