1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512F
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512VL
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512BW
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=AVX512VBMI2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VLBW
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=AVX512VLVBMI2
9 declare <8 x i64> @llvm.fshl.v8i64(<8 x i64>, <8 x i64>, <8 x i64>)
10 declare <16 x i32> @llvm.fshl.v16i32(<16 x i32>, <16 x i32>, <16 x i32>)
11 declare <32 x i16> @llvm.fshl.v32i16(<32 x i16>, <32 x i16>, <32 x i16>)
12 declare <64 x i8> @llvm.fshl.v64i8(<64 x i8>, <64 x i8>, <64 x i8>)
18 define <8 x i64> @var_funnnel_v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> %amt) nounwind {
19 ; AVX512F-LABEL: var_funnnel_v8i64:
21 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} zmm3 = [63,63,63,63,63,63,63,63]
22 ; AVX512F-NEXT: vpandnq %zmm3, %zmm2, %zmm4
23 ; AVX512F-NEXT: vpsrlq $1, %zmm1, %zmm1
24 ; AVX512F-NEXT: vpsrlvq %zmm4, %zmm1, %zmm1
25 ; AVX512F-NEXT: vpandq %zmm3, %zmm2, %zmm2
26 ; AVX512F-NEXT: vpsllvq %zmm2, %zmm0, %zmm0
27 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
30 ; AVX512VL-LABEL: var_funnnel_v8i64:
32 ; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm3 = [63,63,63,63,63,63,63,63]
33 ; AVX512VL-NEXT: vpandnq %zmm3, %zmm2, %zmm4
34 ; AVX512VL-NEXT: vpsrlq $1, %zmm1, %zmm1
35 ; AVX512VL-NEXT: vpsrlvq %zmm4, %zmm1, %zmm1
36 ; AVX512VL-NEXT: vpandq %zmm3, %zmm2, %zmm2
37 ; AVX512VL-NEXT: vpsllvq %zmm2, %zmm0, %zmm0
38 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
41 ; AVX512BW-LABEL: var_funnnel_v8i64:
43 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm3 = [63,63,63,63,63,63,63,63]
44 ; AVX512BW-NEXT: vpandnq %zmm3, %zmm2, %zmm4
45 ; AVX512BW-NEXT: vpsrlq $1, %zmm1, %zmm1
46 ; AVX512BW-NEXT: vpsrlvq %zmm4, %zmm1, %zmm1
47 ; AVX512BW-NEXT: vpandq %zmm3, %zmm2, %zmm2
48 ; AVX512BW-NEXT: vpsllvq %zmm2, %zmm0, %zmm0
49 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
52 ; AVX512VBMI2-LABEL: var_funnnel_v8i64:
53 ; AVX512VBMI2: # %bb.0:
54 ; AVX512VBMI2-NEXT: vpshldvq %zmm2, %zmm1, %zmm0
55 ; AVX512VBMI2-NEXT: retq
57 ; AVX512VLBW-LABEL: var_funnnel_v8i64:
58 ; AVX512VLBW: # %bb.0:
59 ; AVX512VLBW-NEXT: vpbroadcastq {{.*#+}} zmm3 = [63,63,63,63,63,63,63,63]
60 ; AVX512VLBW-NEXT: vpandnq %zmm3, %zmm2, %zmm4
61 ; AVX512VLBW-NEXT: vpsrlq $1, %zmm1, %zmm1
62 ; AVX512VLBW-NEXT: vpsrlvq %zmm4, %zmm1, %zmm1
63 ; AVX512VLBW-NEXT: vpandq %zmm3, %zmm2, %zmm2
64 ; AVX512VLBW-NEXT: vpsllvq %zmm2, %zmm0, %zmm0
65 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
66 ; AVX512VLBW-NEXT: retq
68 ; AVX512VLVBMI2-LABEL: var_funnnel_v8i64:
69 ; AVX512VLVBMI2: # %bb.0:
70 ; AVX512VLVBMI2-NEXT: vpshldvq %zmm2, %zmm1, %zmm0
71 ; AVX512VLVBMI2-NEXT: retq
72 %res = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> %amt)
76 define <16 x i32> @var_funnnel_v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> %amt) nounwind {
77 ; AVX512F-LABEL: var_funnnel_v16i32:
79 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} zmm3 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
80 ; AVX512F-NEXT: vpandnd %zmm3, %zmm2, %zmm4
81 ; AVX512F-NEXT: vpsrld $1, %zmm1, %zmm1
82 ; AVX512F-NEXT: vpsrlvd %zmm4, %zmm1, %zmm1
83 ; AVX512F-NEXT: vpandd %zmm3, %zmm2, %zmm2
84 ; AVX512F-NEXT: vpsllvd %zmm2, %zmm0, %zmm0
85 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
88 ; AVX512VL-LABEL: var_funnnel_v16i32:
90 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} zmm3 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
91 ; AVX512VL-NEXT: vpandnd %zmm3, %zmm2, %zmm4
92 ; AVX512VL-NEXT: vpsrld $1, %zmm1, %zmm1
93 ; AVX512VL-NEXT: vpsrlvd %zmm4, %zmm1, %zmm1
94 ; AVX512VL-NEXT: vpandd %zmm3, %zmm2, %zmm2
95 ; AVX512VL-NEXT: vpsllvd %zmm2, %zmm0, %zmm0
96 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
99 ; AVX512BW-LABEL: var_funnnel_v16i32:
101 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} zmm3 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
102 ; AVX512BW-NEXT: vpandnd %zmm3, %zmm2, %zmm4
103 ; AVX512BW-NEXT: vpsrld $1, %zmm1, %zmm1
104 ; AVX512BW-NEXT: vpsrlvd %zmm4, %zmm1, %zmm1
105 ; AVX512BW-NEXT: vpandd %zmm3, %zmm2, %zmm2
106 ; AVX512BW-NEXT: vpsllvd %zmm2, %zmm0, %zmm0
107 ; AVX512BW-NEXT: vpord %zmm1, %zmm0, %zmm0
108 ; AVX512BW-NEXT: retq
110 ; AVX512VBMI2-LABEL: var_funnnel_v16i32:
111 ; AVX512VBMI2: # %bb.0:
112 ; AVX512VBMI2-NEXT: vpshldvd %zmm2, %zmm1, %zmm0
113 ; AVX512VBMI2-NEXT: retq
115 ; AVX512VLBW-LABEL: var_funnnel_v16i32:
116 ; AVX512VLBW: # %bb.0:
117 ; AVX512VLBW-NEXT: vpbroadcastd {{.*#+}} zmm3 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
118 ; AVX512VLBW-NEXT: vpandnd %zmm3, %zmm2, %zmm4
119 ; AVX512VLBW-NEXT: vpsrld $1, %zmm1, %zmm1
120 ; AVX512VLBW-NEXT: vpsrlvd %zmm4, %zmm1, %zmm1
121 ; AVX512VLBW-NEXT: vpandd %zmm3, %zmm2, %zmm2
122 ; AVX512VLBW-NEXT: vpsllvd %zmm2, %zmm0, %zmm0
123 ; AVX512VLBW-NEXT: vpord %zmm1, %zmm0, %zmm0
124 ; AVX512VLBW-NEXT: retq
126 ; AVX512VLVBMI2-LABEL: var_funnnel_v16i32:
127 ; AVX512VLVBMI2: # %bb.0:
128 ; AVX512VLVBMI2-NEXT: vpshldvd %zmm2, %zmm1, %zmm0
129 ; AVX512VLVBMI2-NEXT: retq
130 %res = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> %amt)
134 define <32 x i16> @var_funnnel_v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> %amt) nounwind {
135 ; AVX512F-LABEL: var_funnnel_v32i16:
137 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
138 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
139 ; AVX512F-NEXT: vpslld $16, %zmm4, %zmm4
140 ; AVX512F-NEXT: vpord %zmm3, %zmm4, %zmm3
141 ; AVX512F-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
142 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero
143 ; AVX512F-NEXT: vpsllvd %zmm4, %zmm3, %zmm3
144 ; AVX512F-NEXT: vpsrld $16, %zmm3, %zmm3
145 ; AVX512F-NEXT: vpmovdw %zmm3, %ymm3
146 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm1
147 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
148 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm0
149 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
150 ; AVX512F-NEXT: vpslld $16, %zmm0, %zmm0
151 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
152 ; AVX512F-NEXT: vextracti64x4 $1, %zmm2, %ymm1
153 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
154 ; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
155 ; AVX512F-NEXT: vpsrld $16, %zmm0, %zmm0
156 ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
157 ; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm3, %zmm0
160 ; AVX512VL-LABEL: var_funnnel_v32i16:
162 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
163 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
164 ; AVX512VL-NEXT: vpslld $16, %zmm4, %zmm4
165 ; AVX512VL-NEXT: vpord %zmm3, %zmm4, %zmm3
166 ; AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
167 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero
168 ; AVX512VL-NEXT: vpsllvd %zmm4, %zmm3, %zmm3
169 ; AVX512VL-NEXT: vpsrld $16, %zmm3, %zmm3
170 ; AVX512VL-NEXT: vpmovdw %zmm3, %ymm3
171 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm1
172 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
173 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm0
174 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
175 ; AVX512VL-NEXT: vpslld $16, %zmm0, %zmm0
176 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
177 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm2, %ymm1
178 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
179 ; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
180 ; AVX512VL-NEXT: vpsrld $16, %zmm0, %zmm0
181 ; AVX512VL-NEXT: vpmovdw %zmm0, %ymm0
182 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm0, %zmm3, %zmm0
183 ; AVX512VL-NEXT: retq
185 ; AVX512BW-LABEL: var_funnnel_v32i16:
187 ; AVX512BW-NEXT: vpbroadcastw {{.*#+}} zmm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
188 ; AVX512BW-NEXT: vpandnq %zmm3, %zmm2, %zmm4
189 ; AVX512BW-NEXT: vpsrlw $1, %zmm1, %zmm1
190 ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1
191 ; AVX512BW-NEXT: vpandq %zmm3, %zmm2, %zmm2
192 ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
193 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
194 ; AVX512BW-NEXT: retq
196 ; AVX512VBMI2-LABEL: var_funnnel_v32i16:
197 ; AVX512VBMI2: # %bb.0:
198 ; AVX512VBMI2-NEXT: vpshldvw %zmm2, %zmm1, %zmm0
199 ; AVX512VBMI2-NEXT: retq
201 ; AVX512VLBW-LABEL: var_funnnel_v32i16:
202 ; AVX512VLBW: # %bb.0:
203 ; AVX512VLBW-NEXT: vpbroadcastw {{.*#+}} zmm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
204 ; AVX512VLBW-NEXT: vpandnq %zmm3, %zmm2, %zmm4
205 ; AVX512VLBW-NEXT: vpsrlw $1, %zmm1, %zmm1
206 ; AVX512VLBW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1
207 ; AVX512VLBW-NEXT: vpandq %zmm3, %zmm2, %zmm2
208 ; AVX512VLBW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
209 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
210 ; AVX512VLBW-NEXT: retq
212 ; AVX512VLVBMI2-LABEL: var_funnnel_v32i16:
213 ; AVX512VLVBMI2: # %bb.0:
214 ; AVX512VLVBMI2-NEXT: vpshldvw %zmm2, %zmm1, %zmm0
215 ; AVX512VLVBMI2-NEXT: retq
216 %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> %amt)
220 define <64 x i8> @var_funnnel_v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> %amt) nounwind {
221 ; AVX512F-LABEL: var_funnnel_v64i8:
223 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm3
224 ; AVX512F-NEXT: vpsrlw $1, %ymm3, %ymm3
225 ; AVX512F-NEXT: vpbroadcastb {{.*#+}} ymm4 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
226 ; AVX512F-NEXT: vpand %ymm4, %ymm3, %ymm5
227 ; AVX512F-NEXT: vpsrlw $4, %ymm5, %ymm3
228 ; AVX512F-NEXT: vpbroadcastb {{.*#+}} ymm6 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
229 ; AVX512F-NEXT: vpand %ymm6, %ymm3, %ymm7
230 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} zmm8 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
231 ; AVX512F-NEXT: vpandq %zmm8, %zmm2, %zmm2
232 ; AVX512F-NEXT: vextracti64x4 $1, %zmm2, %ymm3
233 ; AVX512F-NEXT: vpxor %ymm3, %ymm8, %ymm9
234 ; AVX512F-NEXT: vpsllw $5, %ymm9, %ymm9
235 ; AVX512F-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
236 ; AVX512F-NEXT: vpsrlw $2, %ymm5, %ymm7
237 ; AVX512F-NEXT: vpbroadcastb {{.*#+}} ymm10 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
238 ; AVX512F-NEXT: vpand %ymm7, %ymm10, %ymm7
239 ; AVX512F-NEXT: vpaddb %ymm9, %ymm9, %ymm9
240 ; AVX512F-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
241 ; AVX512F-NEXT: vpsrlw $1, %ymm5, %ymm7
242 ; AVX512F-NEXT: vpand %ymm4, %ymm7, %ymm7
243 ; AVX512F-NEXT: vpaddb %ymm9, %ymm9, %ymm9
244 ; AVX512F-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
245 ; AVX512F-NEXT: vpsrlw $1, %ymm1, %ymm1
246 ; AVX512F-NEXT: vpand %ymm4, %ymm1, %ymm1
247 ; AVX512F-NEXT: vpsrlw $4, %ymm1, %ymm7
248 ; AVX512F-NEXT: vpand %ymm6, %ymm7, %ymm6
249 ; AVX512F-NEXT: vpxor %ymm2, %ymm8, %ymm7
250 ; AVX512F-NEXT: vpsllw $5, %ymm7, %ymm7
251 ; AVX512F-NEXT: vpblendvb %ymm7, %ymm6, %ymm1, %ymm1
252 ; AVX512F-NEXT: vpsrlw $2, %ymm1, %ymm6
253 ; AVX512F-NEXT: vpand %ymm6, %ymm10, %ymm6
254 ; AVX512F-NEXT: vpaddb %ymm7, %ymm7, %ymm7
255 ; AVX512F-NEXT: vpblendvb %ymm7, %ymm6, %ymm1, %ymm1
256 ; AVX512F-NEXT: vpsrlw $1, %ymm1, %ymm6
257 ; AVX512F-NEXT: vpand %ymm4, %ymm6, %ymm4
258 ; AVX512F-NEXT: vpaddb %ymm7, %ymm7, %ymm6
259 ; AVX512F-NEXT: vpblendvb %ymm6, %ymm4, %ymm1, %ymm1
260 ; AVX512F-NEXT: vinserti64x4 $1, %ymm5, %zmm1, %zmm1
261 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm4
262 ; AVX512F-NEXT: vpsllw $4, %ymm4, %ymm5
263 ; AVX512F-NEXT: vpbroadcastb {{.*#+}} ymm6 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240]
264 ; AVX512F-NEXT: vpand %ymm6, %ymm5, %ymm5
265 ; AVX512F-NEXT: vpsllw $5, %ymm3, %ymm3
266 ; AVX512F-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm4
267 ; AVX512F-NEXT: vpsllw $2, %ymm4, %ymm5
268 ; AVX512F-NEXT: vpbroadcastb {{.*#+}} ymm7 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252]
269 ; AVX512F-NEXT: vpand %ymm7, %ymm5, %ymm5
270 ; AVX512F-NEXT: vpaddb %ymm3, %ymm3, %ymm3
271 ; AVX512F-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm4
272 ; AVX512F-NEXT: vpaddb %ymm4, %ymm4, %ymm5
273 ; AVX512F-NEXT: vpaddb %ymm3, %ymm3, %ymm3
274 ; AVX512F-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm3
275 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm4
276 ; AVX512F-NEXT: vpand %ymm6, %ymm4, %ymm4
277 ; AVX512F-NEXT: vpsllw $5, %ymm2, %ymm2
278 ; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
279 ; AVX512F-NEXT: vpsllw $2, %ymm0, %ymm4
280 ; AVX512F-NEXT: vpand %ymm7, %ymm4, %ymm4
281 ; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2
282 ; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
283 ; AVX512F-NEXT: vpaddb %ymm0, %ymm0, %ymm4
284 ; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2
285 ; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
286 ; AVX512F-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
287 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
290 ; AVX512VL-LABEL: var_funnnel_v64i8:
292 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3
293 ; AVX512VL-NEXT: vpsrlw $1, %ymm3, %ymm3
294 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm4 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
295 ; AVX512VL-NEXT: vpand %ymm4, %ymm3, %ymm5
296 ; AVX512VL-NEXT: vpsrlw $4, %ymm5, %ymm3
297 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm6 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
298 ; AVX512VL-NEXT: vpand %ymm6, %ymm3, %ymm7
299 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} zmm8 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
300 ; AVX512VL-NEXT: vpandq %zmm8, %zmm2, %zmm2
301 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm2, %ymm3
302 ; AVX512VL-NEXT: vpxor %ymm3, %ymm8, %ymm9
303 ; AVX512VL-NEXT: vpsllw $5, %ymm9, %ymm9
304 ; AVX512VL-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
305 ; AVX512VL-NEXT: vpsrlw $2, %ymm5, %ymm7
306 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm10 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
307 ; AVX512VL-NEXT: vpand %ymm7, %ymm10, %ymm7
308 ; AVX512VL-NEXT: vpaddb %ymm9, %ymm9, %ymm9
309 ; AVX512VL-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
310 ; AVX512VL-NEXT: vpsrlw $1, %ymm5, %ymm7
311 ; AVX512VL-NEXT: vpand %ymm4, %ymm7, %ymm7
312 ; AVX512VL-NEXT: vpaddb %ymm9, %ymm9, %ymm9
313 ; AVX512VL-NEXT: vpblendvb %ymm9, %ymm7, %ymm5, %ymm5
314 ; AVX512VL-NEXT: vpsrlw $1, %ymm1, %ymm1
315 ; AVX512VL-NEXT: vpand %ymm4, %ymm1, %ymm1
316 ; AVX512VL-NEXT: vpsrlw $4, %ymm1, %ymm7
317 ; AVX512VL-NEXT: vpand %ymm6, %ymm7, %ymm6
318 ; AVX512VL-NEXT: vpxor %ymm2, %ymm8, %ymm7
319 ; AVX512VL-NEXT: vpsllw $5, %ymm7, %ymm7
320 ; AVX512VL-NEXT: vpblendvb %ymm7, %ymm6, %ymm1, %ymm1
321 ; AVX512VL-NEXT: vpsrlw $2, %ymm1, %ymm6
322 ; AVX512VL-NEXT: vpand %ymm6, %ymm10, %ymm6
323 ; AVX512VL-NEXT: vpaddb %ymm7, %ymm7, %ymm7
324 ; AVX512VL-NEXT: vpblendvb %ymm7, %ymm6, %ymm1, %ymm1
325 ; AVX512VL-NEXT: vpsrlw $1, %ymm1, %ymm6
326 ; AVX512VL-NEXT: vpand %ymm4, %ymm6, %ymm4
327 ; AVX512VL-NEXT: vpaddb %ymm7, %ymm7, %ymm6
328 ; AVX512VL-NEXT: vpblendvb %ymm6, %ymm4, %ymm1, %ymm1
329 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm5, %zmm1, %zmm1
330 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm4
331 ; AVX512VL-NEXT: vpsllw $4, %ymm4, %ymm5
332 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm6 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240]
333 ; AVX512VL-NEXT: vpand %ymm6, %ymm5, %ymm5
334 ; AVX512VL-NEXT: vpsllw $5, %ymm3, %ymm3
335 ; AVX512VL-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm4
336 ; AVX512VL-NEXT: vpsllw $2, %ymm4, %ymm5
337 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm7 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252]
338 ; AVX512VL-NEXT: vpand %ymm7, %ymm5, %ymm5
339 ; AVX512VL-NEXT: vpaddb %ymm3, %ymm3, %ymm3
340 ; AVX512VL-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm4
341 ; AVX512VL-NEXT: vpaddb %ymm4, %ymm4, %ymm5
342 ; AVX512VL-NEXT: vpaddb %ymm3, %ymm3, %ymm3
343 ; AVX512VL-NEXT: vpblendvb %ymm3, %ymm5, %ymm4, %ymm3
344 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm4
345 ; AVX512VL-NEXT: vpand %ymm6, %ymm4, %ymm4
346 ; AVX512VL-NEXT: vpsllw $5, %ymm2, %ymm2
347 ; AVX512VL-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
348 ; AVX512VL-NEXT: vpsllw $2, %ymm0, %ymm4
349 ; AVX512VL-NEXT: vpand %ymm7, %ymm4, %ymm4
350 ; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2
351 ; AVX512VL-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
352 ; AVX512VL-NEXT: vpaddb %ymm0, %ymm0, %ymm4
353 ; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2
354 ; AVX512VL-NEXT: vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
355 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
356 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
357 ; AVX512VL-NEXT: retq
359 ; AVX512BW-LABEL: var_funnnel_v64i8:
361 ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
362 ; AVX512BW-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
363 ; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4
364 ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm5 = zmm2[8],zmm4[8],zmm2[9],zmm4[9],zmm2[10],zmm4[10],zmm2[11],zmm4[11],zmm2[12],zmm4[12],zmm2[13],zmm4[13],zmm2[14],zmm4[14],zmm2[15],zmm4[15],zmm2[24],zmm4[24],zmm2[25],zmm4[25],zmm2[26],zmm4[26],zmm2[27],zmm4[27],zmm2[28],zmm4[28],zmm2[29],zmm4[29],zmm2[30],zmm4[30],zmm2[31],zmm4[31],zmm2[40],zmm4[40],zmm2[41],zmm4[41],zmm2[42],zmm4[42],zmm2[43],zmm4[43],zmm2[44],zmm4[44],zmm2[45],zmm4[45],zmm2[46],zmm4[46],zmm2[47],zmm4[47],zmm2[56],zmm4[56],zmm2[57],zmm4[57],zmm2[58],zmm4[58],zmm2[59],zmm4[59],zmm2[60],zmm4[60],zmm2[61],zmm4[61],zmm2[62],zmm4[62],zmm2[63],zmm4[63]
365 ; AVX512BW-NEXT: vpsllvw %zmm5, %zmm3, %zmm3
366 ; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3
367 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
368 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm2[0],zmm4[0],zmm2[1],zmm4[1],zmm2[2],zmm4[2],zmm2[3],zmm4[3],zmm2[4],zmm4[4],zmm2[5],zmm4[5],zmm2[6],zmm4[6],zmm2[7],zmm4[7],zmm2[16],zmm4[16],zmm2[17],zmm4[17],zmm2[18],zmm4[18],zmm2[19],zmm4[19],zmm2[20],zmm4[20],zmm2[21],zmm4[21],zmm2[22],zmm4[22],zmm2[23],zmm4[23],zmm2[32],zmm4[32],zmm2[33],zmm4[33],zmm2[34],zmm4[34],zmm2[35],zmm4[35],zmm2[36],zmm4[36],zmm2[37],zmm4[37],zmm2[38],zmm4[38],zmm2[39],zmm4[39],zmm2[48],zmm4[48],zmm2[49],zmm4[49],zmm2[50],zmm4[50],zmm2[51],zmm4[51],zmm2[52],zmm4[52],zmm2[53],zmm4[53],zmm2[54],zmm4[54],zmm2[55],zmm4[55]
369 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
370 ; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0
371 ; AVX512BW-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
372 ; AVX512BW-NEXT: retq
374 ; AVX512VBMI2-LABEL: var_funnnel_v64i8:
375 ; AVX512VBMI2: # %bb.0:
376 ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
377 ; AVX512VBMI2-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
378 ; AVX512VBMI2-NEXT: vpxor %xmm4, %xmm4, %xmm4
379 ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm5 = zmm2[8],zmm4[8],zmm2[9],zmm4[9],zmm2[10],zmm4[10],zmm2[11],zmm4[11],zmm2[12],zmm4[12],zmm2[13],zmm4[13],zmm2[14],zmm4[14],zmm2[15],zmm4[15],zmm2[24],zmm4[24],zmm2[25],zmm4[25],zmm2[26],zmm4[26],zmm2[27],zmm4[27],zmm2[28],zmm4[28],zmm2[29],zmm4[29],zmm2[30],zmm4[30],zmm2[31],zmm4[31],zmm2[40],zmm4[40],zmm2[41],zmm4[41],zmm2[42],zmm4[42],zmm2[43],zmm4[43],zmm2[44],zmm4[44],zmm2[45],zmm4[45],zmm2[46],zmm4[46],zmm2[47],zmm4[47],zmm2[56],zmm4[56],zmm2[57],zmm4[57],zmm2[58],zmm4[58],zmm2[59],zmm4[59],zmm2[60],zmm4[60],zmm2[61],zmm4[61],zmm2[62],zmm4[62],zmm2[63],zmm4[63]
380 ; AVX512VBMI2-NEXT: vpsllvw %zmm5, %zmm3, %zmm3
381 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3
382 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
383 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm2[0],zmm4[0],zmm2[1],zmm4[1],zmm2[2],zmm4[2],zmm2[3],zmm4[3],zmm2[4],zmm4[4],zmm2[5],zmm4[5],zmm2[6],zmm4[6],zmm2[7],zmm4[7],zmm2[16],zmm4[16],zmm2[17],zmm4[17],zmm2[18],zmm4[18],zmm2[19],zmm4[19],zmm2[20],zmm4[20],zmm2[21],zmm4[21],zmm2[22],zmm4[22],zmm2[23],zmm4[23],zmm2[32],zmm4[32],zmm2[33],zmm4[33],zmm2[34],zmm4[34],zmm2[35],zmm4[35],zmm2[36],zmm4[36],zmm2[37],zmm4[37],zmm2[38],zmm4[38],zmm2[39],zmm4[39],zmm2[48],zmm4[48],zmm2[49],zmm4[49],zmm2[50],zmm4[50],zmm2[51],zmm4[51],zmm2[52],zmm4[52],zmm2[53],zmm4[53],zmm2[54],zmm4[54],zmm2[55],zmm4[55]
384 ; AVX512VBMI2-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
385 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
386 ; AVX512VBMI2-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
387 ; AVX512VBMI2-NEXT: retq
389 ; AVX512VLBW-LABEL: var_funnnel_v64i8:
390 ; AVX512VLBW: # %bb.0:
391 ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
392 ; AVX512VLBW-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
393 ; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4
394 ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm5 = zmm2[8],zmm4[8],zmm2[9],zmm4[9],zmm2[10],zmm4[10],zmm2[11],zmm4[11],zmm2[12],zmm4[12],zmm2[13],zmm4[13],zmm2[14],zmm4[14],zmm2[15],zmm4[15],zmm2[24],zmm4[24],zmm2[25],zmm4[25],zmm2[26],zmm4[26],zmm2[27],zmm4[27],zmm2[28],zmm4[28],zmm2[29],zmm4[29],zmm2[30],zmm4[30],zmm2[31],zmm4[31],zmm2[40],zmm4[40],zmm2[41],zmm4[41],zmm2[42],zmm4[42],zmm2[43],zmm4[43],zmm2[44],zmm4[44],zmm2[45],zmm4[45],zmm2[46],zmm4[46],zmm2[47],zmm4[47],zmm2[56],zmm4[56],zmm2[57],zmm4[57],zmm2[58],zmm4[58],zmm2[59],zmm4[59],zmm2[60],zmm4[60],zmm2[61],zmm4[61],zmm2[62],zmm4[62],zmm2[63],zmm4[63]
395 ; AVX512VLBW-NEXT: vpsllvw %zmm5, %zmm3, %zmm3
396 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3
397 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
398 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm2[0],zmm4[0],zmm2[1],zmm4[1],zmm2[2],zmm4[2],zmm2[3],zmm4[3],zmm2[4],zmm4[4],zmm2[5],zmm4[5],zmm2[6],zmm4[6],zmm2[7],zmm4[7],zmm2[16],zmm4[16],zmm2[17],zmm4[17],zmm2[18],zmm4[18],zmm2[19],zmm4[19],zmm2[20],zmm4[20],zmm2[21],zmm4[21],zmm2[22],zmm4[22],zmm2[23],zmm4[23],zmm2[32],zmm4[32],zmm2[33],zmm4[33],zmm2[34],zmm4[34],zmm2[35],zmm4[35],zmm2[36],zmm4[36],zmm2[37],zmm4[37],zmm2[38],zmm4[38],zmm2[39],zmm4[39],zmm2[48],zmm4[48],zmm2[49],zmm4[49],zmm2[50],zmm4[50],zmm2[51],zmm4[51],zmm2[52],zmm4[52],zmm2[53],zmm4[53],zmm2[54],zmm4[54],zmm2[55],zmm4[55]
399 ; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
400 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0
401 ; AVX512VLBW-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
402 ; AVX512VLBW-NEXT: retq
404 ; AVX512VLVBMI2-LABEL: var_funnnel_v64i8:
405 ; AVX512VLVBMI2: # %bb.0:
406 ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
407 ; AVX512VLVBMI2-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
408 ; AVX512VLVBMI2-NEXT: vpxor %xmm4, %xmm4, %xmm4
409 ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm5 = zmm2[8],zmm4[8],zmm2[9],zmm4[9],zmm2[10],zmm4[10],zmm2[11],zmm4[11],zmm2[12],zmm4[12],zmm2[13],zmm4[13],zmm2[14],zmm4[14],zmm2[15],zmm4[15],zmm2[24],zmm4[24],zmm2[25],zmm4[25],zmm2[26],zmm4[26],zmm2[27],zmm4[27],zmm2[28],zmm4[28],zmm2[29],zmm4[29],zmm2[30],zmm4[30],zmm2[31],zmm4[31],zmm2[40],zmm4[40],zmm2[41],zmm4[41],zmm2[42],zmm4[42],zmm2[43],zmm4[43],zmm2[44],zmm4[44],zmm2[45],zmm4[45],zmm2[46],zmm4[46],zmm2[47],zmm4[47],zmm2[56],zmm4[56],zmm2[57],zmm4[57],zmm2[58],zmm4[58],zmm2[59],zmm4[59],zmm2[60],zmm4[60],zmm2[61],zmm4[61],zmm2[62],zmm4[62],zmm2[63],zmm4[63]
410 ; AVX512VLVBMI2-NEXT: vpsllvw %zmm5, %zmm3, %zmm3
411 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3
412 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
413 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm2[0],zmm4[0],zmm2[1],zmm4[1],zmm2[2],zmm4[2],zmm2[3],zmm4[3],zmm2[4],zmm4[4],zmm2[5],zmm4[5],zmm2[6],zmm4[6],zmm2[7],zmm4[7],zmm2[16],zmm4[16],zmm2[17],zmm4[17],zmm2[18],zmm4[18],zmm2[19],zmm4[19],zmm2[20],zmm4[20],zmm2[21],zmm4[21],zmm2[22],zmm4[22],zmm2[23],zmm4[23],zmm2[32],zmm4[32],zmm2[33],zmm4[33],zmm2[34],zmm4[34],zmm2[35],zmm4[35],zmm2[36],zmm4[36],zmm2[37],zmm4[37],zmm2[38],zmm4[38],zmm2[39],zmm4[39],zmm2[48],zmm4[48],zmm2[49],zmm4[49],zmm2[50],zmm4[50],zmm2[51],zmm4[51],zmm2[52],zmm4[52],zmm2[53],zmm4[53],zmm2[54],zmm4[54],zmm2[55],zmm4[55]
414 ; AVX512VLVBMI2-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
415 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
416 ; AVX512VLVBMI2-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
417 ; AVX512VLVBMI2-NEXT: retq
418 %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> %amt)
423 ; Uniform Variable Shifts
426 define <8 x i64> @splatvar_funnnel_v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> %amt) nounwind {
427 ; AVX512F-LABEL: splatvar_funnnel_v8i64:
429 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} xmm3 = [63,63]
430 ; AVX512F-NEXT: vpandn %xmm3, %xmm2, %xmm4
431 ; AVX512F-NEXT: vpsrlq $1, %zmm1, %zmm1
432 ; AVX512F-NEXT: vpsrlq %xmm4, %zmm1, %zmm1
433 ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2
434 ; AVX512F-NEXT: vpsllq %xmm2, %zmm0, %zmm0
435 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
438 ; AVX512VL-LABEL: splatvar_funnnel_v8i64:
440 ; AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm3 = [63,63]
441 ; AVX512VL-NEXT: vpandn %xmm3, %xmm2, %xmm4
442 ; AVX512VL-NEXT: vpsrlq $1, %zmm1, %zmm1
443 ; AVX512VL-NEXT: vpsrlq %xmm4, %zmm1, %zmm1
444 ; AVX512VL-NEXT: vpand %xmm3, %xmm2, %xmm2
445 ; AVX512VL-NEXT: vpsllq %xmm2, %zmm0, %zmm0
446 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
447 ; AVX512VL-NEXT: retq
449 ; AVX512BW-LABEL: splatvar_funnnel_v8i64:
451 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} xmm3 = [63,63]
452 ; AVX512BW-NEXT: vpandn %xmm3, %xmm2, %xmm4
453 ; AVX512BW-NEXT: vpsrlq $1, %zmm1, %zmm1
454 ; AVX512BW-NEXT: vpsrlq %xmm4, %zmm1, %zmm1
455 ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2
456 ; AVX512BW-NEXT: vpsllq %xmm2, %zmm0, %zmm0
457 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
458 ; AVX512BW-NEXT: retq
460 ; AVX512VBMI2-LABEL: splatvar_funnnel_v8i64:
461 ; AVX512VBMI2: # %bb.0:
462 ; AVX512VBMI2-NEXT: vpbroadcastq %xmm2, %zmm2
463 ; AVX512VBMI2-NEXT: vpshldvq %zmm2, %zmm1, %zmm0
464 ; AVX512VBMI2-NEXT: retq
466 ; AVX512VLBW-LABEL: splatvar_funnnel_v8i64:
467 ; AVX512VLBW: # %bb.0:
468 ; AVX512VLBW-NEXT: vpbroadcastq {{.*#+}} xmm3 = [63,63]
469 ; AVX512VLBW-NEXT: vpandn %xmm3, %xmm2, %xmm4
470 ; AVX512VLBW-NEXT: vpsrlq $1, %zmm1, %zmm1
471 ; AVX512VLBW-NEXT: vpsrlq %xmm4, %zmm1, %zmm1
472 ; AVX512VLBW-NEXT: vpand %xmm3, %xmm2, %xmm2
473 ; AVX512VLBW-NEXT: vpsllq %xmm2, %zmm0, %zmm0
474 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
475 ; AVX512VLBW-NEXT: retq
477 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v8i64:
478 ; AVX512VLVBMI2: # %bb.0:
479 ; AVX512VLVBMI2-NEXT: vpbroadcastq %xmm2, %zmm2
480 ; AVX512VLVBMI2-NEXT: vpshldvq %zmm2, %zmm1, %zmm0
481 ; AVX512VLVBMI2-NEXT: retq
482 %splat = shufflevector <8 x i64> %amt, <8 x i64> undef, <8 x i32> zeroinitializer
483 %res = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> %splat)
487 define <16 x i32> @splatvar_funnnel_v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> %amt) nounwind {
488 ; AVX512F-LABEL: splatvar_funnnel_v16i32:
490 ; AVX512F-NEXT: vpunpckhdq {{.*#+}} zmm3 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
491 ; AVX512F-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
492 ; AVX512F-NEXT: vpsllq %xmm2, %zmm3, %zmm3
493 ; AVX512F-NEXT: vpunpckldq {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[12],zmm0[12],zmm1[13],zmm0[13]
494 ; AVX512F-NEXT: vpsllq %xmm2, %zmm0, %zmm0
495 ; AVX512F-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,3],zmm3[1,3],zmm0[5,7],zmm3[5,7],zmm0[9,11],zmm3[9,11],zmm0[13,15],zmm3[13,15]
498 ; AVX512VL-LABEL: splatvar_funnnel_v16i32:
500 ; AVX512VL-NEXT: vpunpckhdq {{.*#+}} zmm3 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
501 ; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
502 ; AVX512VL-NEXT: vpsllq %xmm2, %zmm3, %zmm3
503 ; AVX512VL-NEXT: vpunpckldq {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[12],zmm0[12],zmm1[13],zmm0[13]
504 ; AVX512VL-NEXT: vpsllq %xmm2, %zmm0, %zmm0
505 ; AVX512VL-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,3],zmm3[1,3],zmm0[5,7],zmm3[5,7],zmm0[9,11],zmm3[9,11],zmm0[13,15],zmm3[13,15]
506 ; AVX512VL-NEXT: retq
508 ; AVX512BW-LABEL: splatvar_funnnel_v16i32:
510 ; AVX512BW-NEXT: vpunpckhdq {{.*#+}} zmm3 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
511 ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
512 ; AVX512BW-NEXT: vpsllq %xmm2, %zmm3, %zmm3
513 ; AVX512BW-NEXT: vpunpckldq {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[12],zmm0[12],zmm1[13],zmm0[13]
514 ; AVX512BW-NEXT: vpsllq %xmm2, %zmm0, %zmm0
515 ; AVX512BW-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,3],zmm3[1,3],zmm0[5,7],zmm3[5,7],zmm0[9,11],zmm3[9,11],zmm0[13,15],zmm3[13,15]
516 ; AVX512BW-NEXT: retq
518 ; AVX512VBMI2-LABEL: splatvar_funnnel_v16i32:
519 ; AVX512VBMI2: # %bb.0:
520 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm2, %zmm2
521 ; AVX512VBMI2-NEXT: vpshldvd %zmm2, %zmm1, %zmm0
522 ; AVX512VBMI2-NEXT: retq
524 ; AVX512VLBW-LABEL: splatvar_funnnel_v16i32:
525 ; AVX512VLBW: # %bb.0:
526 ; AVX512VLBW-NEXT: vpunpckhdq {{.*#+}} zmm3 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
527 ; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
528 ; AVX512VLBW-NEXT: vpsllq %xmm2, %zmm3, %zmm3
529 ; AVX512VLBW-NEXT: vpunpckldq {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[12],zmm0[12],zmm1[13],zmm0[13]
530 ; AVX512VLBW-NEXT: vpsllq %xmm2, %zmm0, %zmm0
531 ; AVX512VLBW-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,3],zmm3[1,3],zmm0[5,7],zmm3[5,7],zmm0[9,11],zmm3[9,11],zmm0[13,15],zmm3[13,15]
532 ; AVX512VLBW-NEXT: retq
534 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v16i32:
535 ; AVX512VLVBMI2: # %bb.0:
536 ; AVX512VLVBMI2-NEXT: vpbroadcastd %xmm2, %zmm2
537 ; AVX512VLVBMI2-NEXT: vpshldvd %zmm2, %zmm1, %zmm0
538 ; AVX512VLVBMI2-NEXT: retq
539 %splat = shufflevector <16 x i32> %amt, <16 x i32> undef, <16 x i32> zeroinitializer
540 %res = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> %splat)
544 define <32 x i16> @splatvar_funnnel_v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> %amt) nounwind {
545 ; AVX512F-LABEL: splatvar_funnnel_v32i16:
547 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} xmm3 = [15,0,0,0,15,0,0,0]
548 ; AVX512F-NEXT: vpandn %xmm3, %xmm2, %xmm4
549 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm5
550 ; AVX512F-NEXT: vpsrlw $1, %ymm5, %ymm5
551 ; AVX512F-NEXT: vpsrlw %xmm4, %ymm5, %ymm5
552 ; AVX512F-NEXT: vpsrlw $1, %ymm1, %ymm1
553 ; AVX512F-NEXT: vpsrlw %xmm4, %ymm1, %ymm1
554 ; AVX512F-NEXT: vinserti64x4 $1, %ymm5, %zmm1, %zmm1
555 ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2
556 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
557 ; AVX512F-NEXT: vpsllw %xmm2, %ymm3, %ymm3
558 ; AVX512F-NEXT: vpsllw %xmm2, %ymm0, %ymm0
559 ; AVX512F-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
560 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
563 ; AVX512VL-LABEL: splatvar_funnnel_v32i16:
565 ; AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm3 = [15,0,0,0,15,0,0,0]
566 ; AVX512VL-NEXT: vpandn %xmm3, %xmm2, %xmm4
567 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm5
568 ; AVX512VL-NEXT: vpsrlw $1, %ymm5, %ymm5
569 ; AVX512VL-NEXT: vpsrlw %xmm4, %ymm5, %ymm5
570 ; AVX512VL-NEXT: vpsrlw $1, %ymm1, %ymm1
571 ; AVX512VL-NEXT: vpsrlw %xmm4, %ymm1, %ymm1
572 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm5, %zmm1, %zmm1
573 ; AVX512VL-NEXT: vpand %xmm3, %xmm2, %xmm2
574 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm3
575 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm3, %ymm3
576 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm0, %ymm0
577 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
578 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
579 ; AVX512VL-NEXT: retq
581 ; AVX512BW-LABEL: splatvar_funnnel_v32i16:
583 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} xmm3 = [15,0,0,0,15,0,0,0]
584 ; AVX512BW-NEXT: vpandn %xmm3, %xmm2, %xmm4
585 ; AVX512BW-NEXT: vpsrlw $1, %zmm1, %zmm1
586 ; AVX512BW-NEXT: vpsrlw %xmm4, %zmm1, %zmm1
587 ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2
588 ; AVX512BW-NEXT: vpsllw %xmm2, %zmm0, %zmm0
589 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
590 ; AVX512BW-NEXT: retq
592 ; AVX512VBMI2-LABEL: splatvar_funnnel_v32i16:
593 ; AVX512VBMI2: # %bb.0:
594 ; AVX512VBMI2-NEXT: vpbroadcastw %xmm2, %zmm2
595 ; AVX512VBMI2-NEXT: vpshldvw %zmm2, %zmm1, %zmm0
596 ; AVX512VBMI2-NEXT: retq
598 ; AVX512VLBW-LABEL: splatvar_funnnel_v32i16:
599 ; AVX512VLBW: # %bb.0:
600 ; AVX512VLBW-NEXT: vpbroadcastq {{.*#+}} xmm3 = [15,0,0,0,15,0,0,0]
601 ; AVX512VLBW-NEXT: vpandn %xmm3, %xmm2, %xmm4
602 ; AVX512VLBW-NEXT: vpsrlw $1, %zmm1, %zmm1
603 ; AVX512VLBW-NEXT: vpsrlw %xmm4, %zmm1, %zmm1
604 ; AVX512VLBW-NEXT: vpand %xmm3, %xmm2, %xmm2
605 ; AVX512VLBW-NEXT: vpsllw %xmm2, %zmm0, %zmm0
606 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
607 ; AVX512VLBW-NEXT: retq
609 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v32i16:
610 ; AVX512VLVBMI2: # %bb.0:
611 ; AVX512VLVBMI2-NEXT: vpbroadcastw %xmm2, %zmm2
612 ; AVX512VLVBMI2-NEXT: vpshldvw %zmm2, %zmm1, %zmm0
613 ; AVX512VLVBMI2-NEXT: retq
614 %splat = shufflevector <32 x i16> %amt, <32 x i16> undef, <32 x i32> zeroinitializer
615 %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> %splat)
619 define <64 x i8> @splatvar_funnnel_v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> %amt) nounwind {
620 ; AVX512F-LABEL: splatvar_funnnel_v64i8:
622 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
623 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm4
624 ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm5 = ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15],ymm4[24],ymm3[24],ymm4[25],ymm3[25],ymm4[26],ymm3[26],ymm4[27],ymm3[27],ymm4[28],ymm3[28],ymm4[29],ymm3[29],ymm4[30],ymm3[30],ymm4[31],ymm3[31]
625 ; AVX512F-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
626 ; AVX512F-NEXT: vpsllw %xmm2, %ymm5, %ymm5
627 ; AVX512F-NEXT: vpsrlw $8, %ymm5, %ymm5
628 ; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm3 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[16],ymm3[16],ymm4[17],ymm3[17],ymm4[18],ymm3[18],ymm4[19],ymm3[19],ymm4[20],ymm3[20],ymm4[21],ymm3[21],ymm4[22],ymm3[22],ymm4[23],ymm3[23]
629 ; AVX512F-NEXT: vpsllw %xmm2, %ymm3, %ymm3
630 ; AVX512F-NEXT: vpsrlw $8, %ymm3, %ymm3
631 ; AVX512F-NEXT: vpackuswb %ymm5, %ymm3, %ymm3
632 ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]
633 ; AVX512F-NEXT: vpsllw %xmm2, %ymm4, %ymm4
634 ; AVX512F-NEXT: vpsrlw $8, %ymm4, %ymm4
635 ; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[16],ymm0[16],ymm1[17],ymm0[17],ymm1[18],ymm0[18],ymm1[19],ymm0[19],ymm1[20],ymm0[20],ymm1[21],ymm0[21],ymm1[22],ymm0[22],ymm1[23],ymm0[23]
636 ; AVX512F-NEXT: vpsllw %xmm2, %ymm0, %ymm0
637 ; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0
638 ; AVX512F-NEXT: vpackuswb %ymm4, %ymm0, %ymm0
639 ; AVX512F-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
642 ; AVX512VL-LABEL: splatvar_funnnel_v64i8:
644 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm3
645 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm4
646 ; AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm5 = ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15],ymm4[24],ymm3[24],ymm4[25],ymm3[25],ymm4[26],ymm3[26],ymm4[27],ymm3[27],ymm4[28],ymm3[28],ymm4[29],ymm3[29],ymm4[30],ymm3[30],ymm4[31],ymm3[31]
647 ; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
648 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm5, %ymm5
649 ; AVX512VL-NEXT: vpsrlw $8, %ymm5, %ymm5
650 ; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm3 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[16],ymm3[16],ymm4[17],ymm3[17],ymm4[18],ymm3[18],ymm4[19],ymm3[19],ymm4[20],ymm3[20],ymm4[21],ymm3[21],ymm4[22],ymm3[22],ymm4[23],ymm3[23]
651 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm3, %ymm3
652 ; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3
653 ; AVX512VL-NEXT: vpackuswb %ymm5, %ymm3, %ymm3
654 ; AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]
655 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm4, %ymm4
656 ; AVX512VL-NEXT: vpsrlw $8, %ymm4, %ymm4
657 ; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[16],ymm0[16],ymm1[17],ymm0[17],ymm1[18],ymm0[18],ymm1[19],ymm0[19],ymm1[20],ymm0[20],ymm1[21],ymm0[21],ymm1[22],ymm0[22],ymm1[23],ymm0[23]
658 ; AVX512VL-NEXT: vpsllw %xmm2, %ymm0, %ymm0
659 ; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
660 ; AVX512VL-NEXT: vpackuswb %ymm4, %ymm0, %ymm0
661 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm3, %zmm0, %zmm0
662 ; AVX512VL-NEXT: retq
664 ; AVX512BW-LABEL: splatvar_funnnel_v64i8:
666 ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
667 ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
668 ; AVX512BW-NEXT: vpsllw %xmm2, %zmm3, %zmm3
669 ; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3
670 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
671 ; AVX512BW-NEXT: vpsllw %xmm2, %zmm0, %zmm0
672 ; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0
673 ; AVX512BW-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
674 ; AVX512BW-NEXT: retq
676 ; AVX512VBMI2-LABEL: splatvar_funnnel_v64i8:
677 ; AVX512VBMI2: # %bb.0:
678 ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
679 ; AVX512VBMI2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
680 ; AVX512VBMI2-NEXT: vpsllw %xmm2, %zmm3, %zmm3
681 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3
682 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
683 ; AVX512VBMI2-NEXT: vpsllw %xmm2, %zmm0, %zmm0
684 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
685 ; AVX512VBMI2-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
686 ; AVX512VBMI2-NEXT: retq
688 ; AVX512VLBW-LABEL: splatvar_funnnel_v64i8:
689 ; AVX512VLBW: # %bb.0:
690 ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
691 ; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
692 ; AVX512VLBW-NEXT: vpsllw %xmm2, %zmm3, %zmm3
693 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3
694 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
695 ; AVX512VLBW-NEXT: vpsllw %xmm2, %zmm0, %zmm0
696 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0
697 ; AVX512VLBW-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
698 ; AVX512VLBW-NEXT: retq
700 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v64i8:
701 ; AVX512VLVBMI2: # %bb.0:
702 ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm3 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
703 ; AVX512VLVBMI2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
704 ; AVX512VLVBMI2-NEXT: vpsllw %xmm2, %zmm3, %zmm3
705 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3
706 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
707 ; AVX512VLVBMI2-NEXT: vpsllw %xmm2, %zmm0, %zmm0
708 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
709 ; AVX512VLVBMI2-NEXT: vpackuswb %zmm3, %zmm0, %zmm0
710 ; AVX512VLVBMI2-NEXT: retq
711 %splat = shufflevector <64 x i8> %amt, <64 x i8> undef, <64 x i32> zeroinitializer
712 %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> %splat)
720 define <8 x i64> @constant_funnnel_v8i64(<8 x i64> %x, <8 x i64> %y) nounwind {
721 ; AVX512F-LABEL: constant_funnnel_v8i64:
723 ; AVX512F-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
724 ; AVX512F-NEXT: vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
725 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
728 ; AVX512VL-LABEL: constant_funnnel_v8i64:
730 ; AVX512VL-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
731 ; AVX512VL-NEXT: vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
732 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
733 ; AVX512VL-NEXT: retq
735 ; AVX512BW-LABEL: constant_funnnel_v8i64:
737 ; AVX512BW-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
738 ; AVX512BW-NEXT: vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
739 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
740 ; AVX512BW-NEXT: retq
742 ; AVX512VBMI2-LABEL: constant_funnnel_v8i64:
743 ; AVX512VBMI2: # %bb.0:
744 ; AVX512VBMI2-NEXT: vpshldvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
745 ; AVX512VBMI2-NEXT: retq
747 ; AVX512VLBW-LABEL: constant_funnnel_v8i64:
748 ; AVX512VLBW: # %bb.0:
749 ; AVX512VLBW-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
750 ; AVX512VLBW-NEXT: vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
751 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
752 ; AVX512VLBW-NEXT: retq
754 ; AVX512VLVBMI2-LABEL: constant_funnnel_v8i64:
755 ; AVX512VLVBMI2: # %bb.0:
756 ; AVX512VLVBMI2-NEXT: vpshldvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
757 ; AVX512VLVBMI2-NEXT: retq
758 %res = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> <i64 4, i64 14, i64 50, i64 60, i64 4, i64 14, i64 50, i64 60>)
762 define <16 x i32> @constant_funnnel_v16i32(<16 x i32> %x, <16 x i32> %y) nounwind {
763 ; AVX512F-LABEL: constant_funnnel_v16i32:
765 ; AVX512F-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
766 ; AVX512F-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
767 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
770 ; AVX512VL-LABEL: constant_funnnel_v16i32:
772 ; AVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
773 ; AVX512VL-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
774 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
775 ; AVX512VL-NEXT: retq
777 ; AVX512BW-LABEL: constant_funnnel_v16i32:
779 ; AVX512BW-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
780 ; AVX512BW-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
781 ; AVX512BW-NEXT: vpord %zmm1, %zmm0, %zmm0
782 ; AVX512BW-NEXT: retq
784 ; AVX512VBMI2-LABEL: constant_funnnel_v16i32:
785 ; AVX512VBMI2: # %bb.0:
786 ; AVX512VBMI2-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
787 ; AVX512VBMI2-NEXT: retq
789 ; AVX512VLBW-LABEL: constant_funnnel_v16i32:
790 ; AVX512VLBW: # %bb.0:
791 ; AVX512VLBW-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
792 ; AVX512VLBW-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
793 ; AVX512VLBW-NEXT: vpord %zmm1, %zmm0, %zmm0
794 ; AVX512VLBW-NEXT: retq
796 ; AVX512VLVBMI2-LABEL: constant_funnnel_v16i32:
797 ; AVX512VLVBMI2: # %bb.0:
798 ; AVX512VLVBMI2-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
799 ; AVX512VLVBMI2-NEXT: retq
800 %res = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>)
804 define <32 x i16> @constant_funnnel_v32i16(<32 x i16> %x, <32 x i16> %y) nounwind {
805 ; AVX512F-LABEL: constant_funnnel_v32i16:
807 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
808 ; AVX512F-NEXT: vpsrlw $1, %ymm2, %ymm2
809 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,u]
810 ; AVX512F-NEXT: vpmulhuw %ymm3, %ymm2, %ymm4
811 ; AVX512F-NEXT: vpblendw {{.*#+}} ymm2 = ymm4[0,1,2,3,4,5,6],ymm2[7],ymm4[8,9,10,11,12,13,14],ymm2[15]
812 ; AVX512F-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2,3],ymm2[4,5,6,7]
813 ; AVX512F-NEXT: vpsrlw $1, %ymm1, %ymm1
814 ; AVX512F-NEXT: vpmulhuw %ymm3, %ymm1, %ymm3
815 ; AVX512F-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0,1,2,3,4,5,6],ymm1[7],ymm3[8,9,10,11,12,13,14],ymm1[15]
816 ; AVX512F-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
817 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1
818 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2
819 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
820 ; AVX512F-NEXT: vpmullw %ymm3, %ymm2, %ymm2
821 ; AVX512F-NEXT: vpmullw %ymm3, %ymm0, %ymm0
822 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
823 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
826 ; AVX512VL-LABEL: constant_funnnel_v32i16:
828 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm2
829 ; AVX512VL-NEXT: vpsrlw $1, %ymm2, %ymm2
830 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,u]
831 ; AVX512VL-NEXT: vpmulhuw %ymm3, %ymm2, %ymm4
832 ; AVX512VL-NEXT: vpblendw {{.*#+}} ymm2 = ymm4[0,1,2,3,4,5,6],ymm2[7],ymm4[8,9,10,11,12,13,14],ymm2[15]
833 ; AVX512VL-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2,3],ymm2[4,5,6,7]
834 ; AVX512VL-NEXT: vpsrlw $1, %ymm1, %ymm1
835 ; AVX512VL-NEXT: vpmulhuw %ymm3, %ymm1, %ymm3
836 ; AVX512VL-NEXT: vpblendw {{.*#+}} ymm1 = ymm3[0,1,2,3,4,5,6],ymm1[7],ymm3[8,9,10,11,12,13,14],ymm1[15]
837 ; AVX512VL-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
838 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1
839 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2
840 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
841 ; AVX512VL-NEXT: vpmullw %ymm3, %ymm2, %ymm2
842 ; AVX512VL-NEXT: vpmullw %ymm3, %ymm0, %ymm0
843 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
844 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
845 ; AVX512VL-NEXT: retq
847 ; AVX512BW-LABEL: constant_funnnel_v32i16:
849 ; AVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
850 ; AVX512BW-NEXT: vpsrlw $1, %zmm1, %zmm1
851 ; AVX512BW-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
852 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
853 ; AVX512BW-NEXT: retq
855 ; AVX512VBMI2-LABEL: constant_funnnel_v32i16:
856 ; AVX512VBMI2: # %bb.0:
857 ; AVX512VBMI2-NEXT: vpshldvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
858 ; AVX512VBMI2-NEXT: retq
860 ; AVX512VLBW-LABEL: constant_funnnel_v32i16:
861 ; AVX512VLBW: # %bb.0:
862 ; AVX512VLBW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
863 ; AVX512VLBW-NEXT: vpsrlw $1, %zmm1, %zmm1
864 ; AVX512VLBW-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
865 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
866 ; AVX512VLBW-NEXT: retq
868 ; AVX512VLVBMI2-LABEL: constant_funnnel_v32i16:
869 ; AVX512VLVBMI2: # %bb.0:
870 ; AVX512VLVBMI2-NEXT: vpshldvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
871 ; AVX512VLVBMI2-NEXT: retq
872 %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>)
876 define <64 x i8> @constant_funnnel_v64i8(<64 x i8> %x, <64 x i8> %y) nounwind {
877 ; AVX512F-LABEL: constant_funnnel_v64i8:
879 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2
880 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm3
881 ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15],ymm3[24],ymm2[24],ymm3[25],ymm2[25],ymm3[26],ymm2[26],ymm3[27],ymm2[27],ymm3[28],ymm2[28],ymm3[29],ymm2[29],ymm3[30],ymm2[30],ymm3[31],ymm2[31]
882 ; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,128,64,32,16,8,4,2,1,128,64,32,16,8,4,2]
883 ; AVX512F-NEXT: # ymm5 = mem[0,1,0,1]
884 ; AVX512F-NEXT: vpmullw %ymm5, %ymm4, %ymm4
885 ; AVX512F-NEXT: vpsrlw $8, %ymm4, %ymm4
886 ; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[16],ymm2[16],ymm3[17],ymm2[17],ymm3[18],ymm2[18],ymm3[19],ymm2[19],ymm3[20],ymm2[20],ymm3[21],ymm2[21],ymm3[22],ymm2[22],ymm3[23],ymm2[23]
887 ; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
888 ; AVX512F-NEXT: # ymm3 = mem[0,1,0,1]
889 ; AVX512F-NEXT: vpmullw %ymm3, %ymm2, %ymm2
890 ; AVX512F-NEXT: vpsrlw $8, %ymm2, %ymm2
891 ; AVX512F-NEXT: vpackuswb %ymm4, %ymm2, %ymm2
892 ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]
893 ; AVX512F-NEXT: vpmullw %ymm5, %ymm4, %ymm4
894 ; AVX512F-NEXT: vpsrlw $8, %ymm4, %ymm4
895 ; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[16],ymm0[16],ymm1[17],ymm0[17],ymm1[18],ymm0[18],ymm1[19],ymm0[19],ymm1[20],ymm0[20],ymm1[21],ymm0[21],ymm1[22],ymm0[22],ymm1[23],ymm0[23]
896 ; AVX512F-NEXT: vpmullw %ymm3, %ymm0, %ymm0
897 ; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0
898 ; AVX512F-NEXT: vpackuswb %ymm4, %ymm0, %ymm0
899 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
902 ; AVX512VL-LABEL: constant_funnnel_v64i8:
904 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2
905 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3
906 ; AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15],ymm3[24],ymm2[24],ymm3[25],ymm2[25],ymm3[26],ymm2[26],ymm3[27],ymm2[27],ymm3[28],ymm2[28],ymm3[29],ymm2[29],ymm3[30],ymm2[30],ymm3[31],ymm2[31]
907 ; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [1,128,64,32,16,8,4,2,1,128,64,32,16,8,4,2]
908 ; AVX512VL-NEXT: # ymm5 = mem[0,1,0,1]
909 ; AVX512VL-NEXT: vpmullw %ymm5, %ymm4, %ymm4
910 ; AVX512VL-NEXT: vpsrlw $8, %ymm4, %ymm4
911 ; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[16],ymm2[16],ymm3[17],ymm2[17],ymm3[18],ymm2[18],ymm3[19],ymm2[19],ymm3[20],ymm2[20],ymm3[21],ymm2[21],ymm3[22],ymm2[22],ymm3[23],ymm2[23]
912 ; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
913 ; AVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
914 ; AVX512VL-NEXT: vpmullw %ymm3, %ymm2, %ymm2
915 ; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
916 ; AVX512VL-NEXT: vpackuswb %ymm4, %ymm2, %ymm2
917 ; AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]
918 ; AVX512VL-NEXT: vpmullw %ymm5, %ymm4, %ymm4
919 ; AVX512VL-NEXT: vpsrlw $8, %ymm4, %ymm4
920 ; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[16],ymm0[16],ymm1[17],ymm0[17],ymm1[18],ymm0[18],ymm1[19],ymm0[19],ymm1[20],ymm0[20],ymm1[21],ymm0[21],ymm1[22],ymm0[22],ymm1[23],ymm0[23]
921 ; AVX512VL-NEXT: vpmullw %ymm3, %ymm0, %ymm0
922 ; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
923 ; AVX512VL-NEXT: vpackuswb %ymm4, %ymm0, %ymm0
924 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
925 ; AVX512VL-NEXT: retq
927 ; AVX512BW-LABEL: constant_funnnel_v64i8:
929 ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
930 ; AVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2, %zmm2
931 ; AVX512BW-NEXT: vpsrlw $8, %zmm2, %zmm2
932 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
933 ; AVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
934 ; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0
935 ; AVX512BW-NEXT: vpackuswb %zmm2, %zmm0, %zmm0
936 ; AVX512BW-NEXT: retq
938 ; AVX512VBMI2-LABEL: constant_funnnel_v64i8:
939 ; AVX512VBMI2: # %bb.0:
940 ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
941 ; AVX512VBMI2-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2, %zmm2
942 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2
943 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
944 ; AVX512VBMI2-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
945 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
946 ; AVX512VBMI2-NEXT: vpackuswb %zmm2, %zmm0, %zmm0
947 ; AVX512VBMI2-NEXT: retq
949 ; AVX512VLBW-LABEL: constant_funnnel_v64i8:
950 ; AVX512VLBW: # %bb.0:
951 ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
952 ; AVX512VLBW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2, %zmm2
953 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm2, %zmm2
954 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
955 ; AVX512VLBW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
956 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0
957 ; AVX512VLBW-NEXT: vpackuswb %zmm2, %zmm0, %zmm0
958 ; AVX512VLBW-NEXT: retq
960 ; AVX512VLVBMI2-LABEL: constant_funnnel_v64i8:
961 ; AVX512VLVBMI2: # %bb.0:
962 ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8],zmm0[8],zmm1[9],zmm0[9],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[12],zmm0[12],zmm1[13],zmm0[13],zmm1[14],zmm0[14],zmm1[15],zmm0[15],zmm1[24],zmm0[24],zmm1[25],zmm0[25],zmm1[26],zmm0[26],zmm1[27],zmm0[27],zmm1[28],zmm0[28],zmm1[29],zmm0[29],zmm1[30],zmm0[30],zmm1[31],zmm0[31],zmm1[40],zmm0[40],zmm1[41],zmm0[41],zmm1[42],zmm0[42],zmm1[43],zmm0[43],zmm1[44],zmm0[44],zmm1[45],zmm0[45],zmm1[46],zmm0[46],zmm1[47],zmm0[47],zmm1[56],zmm0[56],zmm1[57],zmm0[57],zmm1[58],zmm0[58],zmm1[59],zmm0[59],zmm1[60],zmm0[60],zmm1[61],zmm0[61],zmm1[62],zmm0[62],zmm1[63],zmm0[63]
963 ; AVX512VLVBMI2-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2, %zmm2
964 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2
965 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm1[0],zmm0[0],zmm1[1],zmm0[1],zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[4],zmm0[4],zmm1[5],zmm0[5],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[16],zmm0[16],zmm1[17],zmm0[17],zmm1[18],zmm0[18],zmm1[19],zmm0[19],zmm1[20],zmm0[20],zmm1[21],zmm0[21],zmm1[22],zmm0[22],zmm1[23],zmm0[23],zmm1[32],zmm0[32],zmm1[33],zmm0[33],zmm1[34],zmm0[34],zmm1[35],zmm0[35],zmm1[36],zmm0[36],zmm1[37],zmm0[37],zmm1[38],zmm0[38],zmm1[39],zmm0[39],zmm1[48],zmm0[48],zmm1[49],zmm0[49],zmm1[50],zmm0[50],zmm1[51],zmm0[51],zmm1[52],zmm0[52],zmm1[53],zmm0[53],zmm1[54],zmm0[54],zmm1[55],zmm0[55]
966 ; AVX512VLVBMI2-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
967 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm0, %zmm0
968 ; AVX512VLVBMI2-NEXT: vpackuswb %zmm2, %zmm0, %zmm0
969 ; AVX512VLVBMI2-NEXT: retq
970 %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1>)
975 ; Uniform Constant Shifts
978 define <8 x i64> @splatconstant_funnnel_v8i64(<8 x i64> %x, <8 x i64> %y) nounwind {
979 ; AVX512F-LABEL: splatconstant_funnnel_v8i64:
981 ; AVX512F-NEXT: vpsrlq $50, %zmm1, %zmm1
982 ; AVX512F-NEXT: vpsllq $14, %zmm0, %zmm0
983 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
986 ; AVX512VL-LABEL: splatconstant_funnnel_v8i64:
988 ; AVX512VL-NEXT: vpsrlq $50, %zmm1, %zmm1
989 ; AVX512VL-NEXT: vpsllq $14, %zmm0, %zmm0
990 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
991 ; AVX512VL-NEXT: retq
993 ; AVX512BW-LABEL: splatconstant_funnnel_v8i64:
995 ; AVX512BW-NEXT: vpsrlq $50, %zmm1, %zmm1
996 ; AVX512BW-NEXT: vpsllq $14, %zmm0, %zmm0
997 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
998 ; AVX512BW-NEXT: retq
1000 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v8i64:
1001 ; AVX512VBMI2: # %bb.0:
1002 ; AVX512VBMI2-NEXT: vpshldq $14, %zmm1, %zmm0, %zmm0
1003 ; AVX512VBMI2-NEXT: retq
1005 ; AVX512VLBW-LABEL: splatconstant_funnnel_v8i64:
1006 ; AVX512VLBW: # %bb.0:
1007 ; AVX512VLBW-NEXT: vpsrlq $50, %zmm1, %zmm1
1008 ; AVX512VLBW-NEXT: vpsllq $14, %zmm0, %zmm0
1009 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
1010 ; AVX512VLBW-NEXT: retq
1012 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v8i64:
1013 ; AVX512VLVBMI2: # %bb.0:
1014 ; AVX512VLVBMI2-NEXT: vpshldq $14, %zmm1, %zmm0, %zmm0
1015 ; AVX512VLVBMI2-NEXT: retq
1016 %res = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %x, <8 x i64> %y, <8 x i64> <i64 14, i64 14, i64 14, i64 14, i64 14, i64 14, i64 14, i64 14>)
1020 define <16 x i32> @splatconstant_funnnel_v16i32(<16 x i32> %x, <16 x i32> %y) nounwind {
1021 ; AVX512F-LABEL: splatconstant_funnnel_v16i32:
1023 ; AVX512F-NEXT: vpsrld $28, %zmm1, %zmm1
1024 ; AVX512F-NEXT: vpslld $4, %zmm0, %zmm0
1025 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
1026 ; AVX512F-NEXT: retq
1028 ; AVX512VL-LABEL: splatconstant_funnnel_v16i32:
1029 ; AVX512VL: # %bb.0:
1030 ; AVX512VL-NEXT: vpsrld $28, %zmm1, %zmm1
1031 ; AVX512VL-NEXT: vpslld $4, %zmm0, %zmm0
1032 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
1033 ; AVX512VL-NEXT: retq
1035 ; AVX512BW-LABEL: splatconstant_funnnel_v16i32:
1036 ; AVX512BW: # %bb.0:
1037 ; AVX512BW-NEXT: vpsrld $28, %zmm1, %zmm1
1038 ; AVX512BW-NEXT: vpslld $4, %zmm0, %zmm0
1039 ; AVX512BW-NEXT: vpord %zmm1, %zmm0, %zmm0
1040 ; AVX512BW-NEXT: retq
1042 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v16i32:
1043 ; AVX512VBMI2: # %bb.0:
1044 ; AVX512VBMI2-NEXT: vpshldd $4, %zmm1, %zmm0, %zmm0
1045 ; AVX512VBMI2-NEXT: retq
1047 ; AVX512VLBW-LABEL: splatconstant_funnnel_v16i32:
1048 ; AVX512VLBW: # %bb.0:
1049 ; AVX512VLBW-NEXT: vpsrld $28, %zmm1, %zmm1
1050 ; AVX512VLBW-NEXT: vpslld $4, %zmm0, %zmm0
1051 ; AVX512VLBW-NEXT: vpord %zmm1, %zmm0, %zmm0
1052 ; AVX512VLBW-NEXT: retq
1054 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v16i32:
1055 ; AVX512VLVBMI2: # %bb.0:
1056 ; AVX512VLVBMI2-NEXT: vpshldd $4, %zmm1, %zmm0, %zmm0
1057 ; AVX512VLVBMI2-NEXT: retq
1058 %res = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %x, <16 x i32> %y, <16 x i32> <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>)
1062 define <32 x i16> @splatconstant_funnnel_v32i16(<32 x i16> %x, <32 x i16> %y) nounwind {
1063 ; AVX512F-LABEL: splatconstant_funnnel_v32i16:
1065 ; AVX512F-NEXT: vpsrlw $9, %ymm1, %ymm2
1066 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm1
1067 ; AVX512F-NEXT: vpsrlw $9, %ymm1, %ymm1
1068 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
1069 ; AVX512F-NEXT: vpsllw $7, %ymm0, %ymm2
1070 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm0
1071 ; AVX512F-NEXT: vpsllw $7, %ymm0, %ymm0
1072 ; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
1073 ; AVX512F-NEXT: vporq %zmm1, %zmm0, %zmm0
1074 ; AVX512F-NEXT: retq
1076 ; AVX512VL-LABEL: splatconstant_funnnel_v32i16:
1077 ; AVX512VL: # %bb.0:
1078 ; AVX512VL-NEXT: vpsrlw $9, %ymm1, %ymm2
1079 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm1
1080 ; AVX512VL-NEXT: vpsrlw $9, %ymm1, %ymm1
1081 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
1082 ; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm2
1083 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm0
1084 ; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm0
1085 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
1086 ; AVX512VL-NEXT: vporq %zmm1, %zmm0, %zmm0
1087 ; AVX512VL-NEXT: retq
1089 ; AVX512BW-LABEL: splatconstant_funnnel_v32i16:
1090 ; AVX512BW: # %bb.0:
1091 ; AVX512BW-NEXT: vpsrlw $9, %zmm1, %zmm1
1092 ; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0
1093 ; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0
1094 ; AVX512BW-NEXT: retq
1096 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v32i16:
1097 ; AVX512VBMI2: # %bb.0:
1098 ; AVX512VBMI2-NEXT: vpshldw $7, %zmm1, %zmm0, %zmm0
1099 ; AVX512VBMI2-NEXT: retq
1101 ; AVX512VLBW-LABEL: splatconstant_funnnel_v32i16:
1102 ; AVX512VLBW: # %bb.0:
1103 ; AVX512VLBW-NEXT: vpsrlw $9, %zmm1, %zmm1
1104 ; AVX512VLBW-NEXT: vpsllw $7, %zmm0, %zmm0
1105 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0
1106 ; AVX512VLBW-NEXT: retq
1108 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v32i16:
1109 ; AVX512VLVBMI2: # %bb.0:
1110 ; AVX512VLVBMI2-NEXT: vpshldw $7, %zmm1, %zmm0, %zmm0
1111 ; AVX512VLVBMI2-NEXT: retq
1112 %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %y, <32 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>)
1116 define <64 x i8> @splatconstant_funnnel_v64i8(<64 x i8> %x, <64 x i8> %y) nounwind {
1117 ; AVX512F-LABEL: splatconstant_funnnel_v64i8:
1119 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm2
1120 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm0
1121 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm0
1122 ; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm2
1123 ; AVX512F-NEXT: vpsrlw $4, %ymm1, %ymm0
1124 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm1
1125 ; AVX512F-NEXT: vpsrlw $4, %ymm1, %ymm1
1126 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
1127 ; AVX512F-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1128 ; AVX512F-NEXT: retq
1130 ; AVX512VL-LABEL: splatconstant_funnnel_v64i8:
1131 ; AVX512VL: # %bb.0:
1132 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm2
1133 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm0
1134 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm0
1135 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm2
1136 ; AVX512VL-NEXT: vpsrlw $4, %ymm1, %ymm0
1137 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm1
1138 ; AVX512VL-NEXT: vpsrlw $4, %ymm1, %ymm1
1139 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
1140 ; AVX512VL-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1141 ; AVX512VL-NEXT: retq
1143 ; AVX512BW-LABEL: splatconstant_funnnel_v64i8:
1144 ; AVX512BW: # %bb.0:
1145 ; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm2
1146 ; AVX512BW-NEXT: vpsrlw $4, %zmm1, %zmm0
1147 ; AVX512BW-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1148 ; AVX512BW-NEXT: retq
1150 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v64i8:
1151 ; AVX512VBMI2: # %bb.0:
1152 ; AVX512VBMI2-NEXT: vpsllw $4, %zmm0, %zmm2
1153 ; AVX512VBMI2-NEXT: vpsrlw $4, %zmm1, %zmm0
1154 ; AVX512VBMI2-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1155 ; AVX512VBMI2-NEXT: retq
1157 ; AVX512VLBW-LABEL: splatconstant_funnnel_v64i8:
1158 ; AVX512VLBW: # %bb.0:
1159 ; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm2
1160 ; AVX512VLBW-NEXT: vpsrlw $4, %zmm1, %zmm0
1161 ; AVX512VLBW-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1162 ; AVX512VLBW-NEXT: retq
1164 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v64i8:
1165 ; AVX512VLVBMI2: # %bb.0:
1166 ; AVX512VLVBMI2-NEXT: vpsllw $4, %zmm0, %zmm2
1167 ; AVX512VLVBMI2-NEXT: vpsrlw $4, %zmm1, %zmm0
1168 ; AVX512VLVBMI2-NEXT: vpternlogd $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm0
1169 ; AVX512VLVBMI2-NEXT: retq
1170 %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %y, <64 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>)