| blob | ed58f0f554e23bd0972a11f54996551609526b22 |
1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSE2
3 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
4 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
7 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
8 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
9 ;
10 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SSE,SLM
11 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=SSE,SSE42
12 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=latency -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
14 define i32 @add(i32 %arg) {
15 ; SSE-LABEL: 'add'
16 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = add <2 x i64> undef, undef
18 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = add <4 x i64> undef, undef
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = add <8 x i64> undef, undef
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
27 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = add <32 x i16> undef, undef
28 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
29 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
30 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
31 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = add <64 x i8> undef, undef
32 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
33 ;
34 ; AVX1-LABEL: 'add'
35 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
36 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
37 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = add <4 x i64> undef, undef
38 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = add <8 x i64> undef, undef
39 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
40 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
41 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = add <8 x i32> undef, undef
42 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = add <16 x i32> undef, undef
43 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
44 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
45 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = add <16 x i16> undef, undef
46 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = add <32 x i16> undef, undef
47 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
48 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
49 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = add <32 x i8> undef, undef
50 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = add <64 x i8> undef, undef
51 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
52 ;
53 ; AVX2-LABEL: 'add'
54 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
55 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
56 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
57 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = add <8 x i64> undef, undef
58 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
59 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
60 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
61 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = add <16 x i32> undef, undef
62 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
63 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
64 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
65 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = add <32 x i16> undef, undef
66 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
67 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
68 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
69 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = add <64 x i8> undef, undef
70 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
71 ;
72 ; AVX512F-LABEL: 'add'
73 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
74 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
75 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
76 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
77 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
78 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
79 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
80 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
81 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
82 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
83 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
84 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I16 = add <32 x i16> undef, undef
85 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
86 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
87 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
88 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64I8 = add <64 x i8> undef, undef
89 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
90 ;
91 ; AVX512BW-LABEL: 'add'
92 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
93 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
94 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
95 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
96 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
97 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
98 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
99 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
100 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
101 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
102 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
103 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = add <32 x i16> undef, undef
104 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
105 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
106 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
107 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = add <64 x i8> undef, undef
108 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
109 ;
110 ; AVX512DQ-LABEL: 'add'
111 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
112 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
113 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
114 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
115 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
116 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
117 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
118 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
119 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
120 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
121 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
122 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I16 = add <32 x i16> undef, undef
123 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
124 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
125 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
126 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64I8 = add <64 x i8> undef, undef
127 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
128 ;
129 %I64 = add i64 undef, undef
130 %V2I64 = add <2 x i64> undef, undef
131 %V4I64 = add <4 x i64> undef, undef
132 %V8I64 = add <8 x i64> undef, undef
134 %I32 = add i32 undef, undef
135 %V4I32 = add <4 x i32> undef, undef
136 %V8I32 = add <8 x i32> undef, undef
137 %V16I32 = add <16 x i32> undef, undef
139 %I16 = add i16 undef, undef
140 %V8I16 = add <8 x i16> undef, undef
141 %V16I16 = add <16 x i16> undef, undef
142 %V32I16 = add <32 x i16> undef, undef
144 %I8 = add i8 undef, undef
145 %V16I8 = add <16 x i8> undef, undef
146 %V32I8 = add <32 x i8> undef, undef
147 %V64I8 = add <64 x i8> undef, undef
149 ret i32 undef
150 }
152 define i32 @sub(i32 %arg) {
153 ; SSE-LABEL: 'sub'
154 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
155 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = sub <2 x i64> undef, undef
156 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = sub <4 x i64> undef, undef
157 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = sub <8 x i64> undef, undef
158 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
159 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
160 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
161 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
162 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
163 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
164 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
165 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = sub <32 x i16> undef, undef
166 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
167 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
168 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
169 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = sub <64 x i8> undef, undef
170 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
171 ;
172 ; AVX1-LABEL: 'sub'
173 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
174 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
175 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = sub <4 x i64> undef, undef
176 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = sub <8 x i64> undef, undef
177 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
178 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
179 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = sub <8 x i32> undef, undef
180 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = sub <16 x i32> undef, undef
181 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
182 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
183 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = sub <16 x i16> undef, undef
184 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = sub <32 x i16> undef, undef
185 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
186 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
187 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = sub <32 x i8> undef, undef
188 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = sub <64 x i8> undef, undef
189 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
190 ;
191 ; AVX2-LABEL: 'sub'
192 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
193 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
194 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
195 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = sub <8 x i64> undef, undef
196 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
197 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
198 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
199 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = sub <16 x i32> undef, undef
200 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
201 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
202 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
203 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = sub <32 x i16> undef, undef
204 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
205 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
206 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
207 ; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = sub <64 x i8> undef, undef
208 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
209 ;
210 ; AVX512F-LABEL: 'sub'
211 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
212 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
213 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
214 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = sub <8 x i64> undef, undef
215 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
216 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
217 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
218 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
219 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
220 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
221 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
222 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I16 = sub <32 x i16> undef, undef
223 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
224 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
225 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
226 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64I8 = sub <64 x i8> undef, undef
227 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
228 ;
229 ; AVX512BW-LABEL: 'sub'
230 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
231 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
232 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
233 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = sub <8 x i64> undef, undef
234 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
235 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
236 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
237 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
238 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
239 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
240 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
241 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = sub <32 x i16> undef, undef
242 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
243 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
244 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
245 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = sub <64 x i8> undef, undef
246 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
247 ;
248 ; AVX512DQ-LABEL: 'sub'
249 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
250 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
251 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
252 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = sub <8 x i64> undef, undef
253 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
254 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
255 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
256 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
257 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
258 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
259 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
260 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32I16 = sub <32 x i16> undef, undef
261 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
262 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
263 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
264 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64I8 = sub <64 x i8> undef, undef
265 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
266 ;
267 %I64 = sub i64 undef, undef
268 %V2I64 = sub <2 x i64> undef, undef
269 %V4I64 = sub <4 x i64> undef, undef
270 %V8I64 = sub <8 x i64> undef, undef
272 %I32 = sub i32 undef, undef
273 %V4I32 = sub <4 x i32> undef, undef
274 %V8I32 = sub <8 x i32> undef, undef
275 %V16I32 = sub <16 x i32> undef, undef
277 %I16 = sub i16 undef, undef
278 %V8I16 = sub <8 x i16> undef, undef
279 %V16I16 = sub <16 x i16> undef, undef
280 %V32I16 = sub <32 x i16> undef, undef
282 %I8 = sub i8 undef, undef
283 %V16I8 = sub <16 x i8> undef, undef
284 %V32I8 = sub <32 x i8> undef, undef
285 %V64I8 = sub <64 x i8> undef, undef
287 ret i32 undef
288 }
290 define i32 @or(i32 %arg) {
291 ; SSE-LABEL: 'or'
292 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = or i64 undef, undef
293 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = or <2 x i64> undef, undef
294 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = or <4 x i64> undef, undef
295 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = or <8 x i64> undef, undef
296 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = or i32 undef, undef
297 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = or <4 x i32> undef, undef
298 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = or <8 x i32> undef, undef
299 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = or <16 x i32> undef, undef
300 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = or i16 undef, undef
301 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = or <8 x i16> undef, undef
302 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = or <16 x i16> undef, undef
303 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = or <32 x i16> undef, undef
304 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = or i8 undef, undef
305 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = or <16 x i8> undef, undef
306 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = or <32 x i8> undef, undef
307 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = or <64 x i8> undef, undef
308 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = or i1 undef, undef
309 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = or <2 x i1> undef, undef
310 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = or <4 x i1> undef, undef
311 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = or <8 x i1> undef, undef
312 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = or <16 x i1> undef, undef
313 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I1 = or <32 x i1> undef, undef
314 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I1 = or <64 x i1> undef, undef
315 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
316 ;
317 ; AVX-LABEL: 'or'
318 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = or i64 undef, undef
319 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = or <2 x i64> undef, undef
320 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = or <4 x i64> undef, undef
321 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = or <8 x i64> undef, undef
322 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = or i32 undef, undef
323 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = or <4 x i32> undef, undef
324 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = or <8 x i32> undef, undef
325 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = or <16 x i32> undef, undef
326 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = or i16 undef, undef
327 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = or <8 x i16> undef, undef
328 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = or <16 x i16> undef, undef
329 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = or <32 x i16> undef, undef
330 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = or i8 undef, undef
331 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = or <16 x i8> undef, undef
332 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = or <32 x i8> undef, undef
333 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = or <64 x i8> undef, undef
334 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = or i1 undef, undef
335 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = or <2 x i1> undef, undef
336 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = or <4 x i1> undef, undef
337 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = or <8 x i1> undef, undef
338 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = or <16 x i1> undef, undef
339 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = or <32 x i1> undef, undef
340 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I1 = or <64 x i1> undef, undef
341 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
342 ;
343 ; AVX512-LABEL: 'or'
344 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = or i64 undef, undef
345 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = or <2 x i64> undef, undef
346 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = or <4 x i64> undef, undef
347 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = or <8 x i64> undef, undef
348 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = or i32 undef, undef
349 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = or <4 x i32> undef, undef
350 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = or <8 x i32> undef, undef
351 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = or <16 x i32> undef, undef
352 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = or i16 undef, undef
353 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = or <8 x i16> undef, undef
354 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = or <16 x i16> undef, undef
355 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = or <32 x i16> undef, undef
356 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = or i8 undef, undef
357 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = or <16 x i8> undef, undef
358 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = or <32 x i8> undef, undef
359 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = or <64 x i8> undef, undef
360 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = or i1 undef, undef
361 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = or <2 x i1> undef, undef
362 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = or <4 x i1> undef, undef
363 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = or <8 x i1> undef, undef
364 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = or <16 x i1> undef, undef
365 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = or <32 x i1> undef, undef
366 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I1 = or <64 x i1> undef, undef
367 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
368 ;
369 %I64 = or i64 undef, undef
370 %V2I64 = or <2 x i64> undef, undef
371 %V4I64 = or <4 x i64> undef, undef
372 %V8I64 = or <8 x i64> undef, undef
374 %I32 = or i32 undef, undef
375 %V4I32 = or <4 x i32> undef, undef
376 %V8I32 = or <8 x i32> undef, undef
377 %V16I32 = or <16 x i32> undef, undef
379 %I16 = or i16 undef, undef
380 %V8I16 = or <8 x i16> undef, undef
381 %V16I16 = or <16 x i16> undef, undef
382 %V32I16 = or <32 x i16> undef, undef
384 %I8 = or i8 undef, undef
385 %V16I8 = or <16 x i8> undef, undef
386 %V32I8 = or <32 x i8> undef, undef
387 %V64I8 = or <64 x i8> undef, undef
389 %I1 = or i1 undef, undef
390 %V2I1 = or <2 x i1> undef, undef
391 %V4I1 = or <4 x i1> undef, undef
392 %V8I1 = or <8 x i1> undef, undef
393 %V16I1 = or <16 x i1> undef, undef
394 %V32I1 = or <32 x i1> undef, undef
395 %V64I1 = or <64 x i1> undef, undef
397 ret i32 undef
398 }
400 define i32 @xor(i32 %arg) {
401 ; SSE-LABEL: 'xor'
402 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = xor i64 undef, undef
403 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = xor <2 x i64> undef, undef
404 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = xor <4 x i64> undef, undef
405 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = xor <8 x i64> undef, undef
406 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = xor i32 undef, undef
407 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = xor <4 x i32> undef, undef
408 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = xor <8 x i32> undef, undef
409 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = xor <16 x i32> undef, undef
410 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = xor i16 undef, undef
411 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = xor <8 x i16> undef, undef
412 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = xor <16 x i16> undef, undef
413 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = xor <32 x i16> undef, undef
414 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = xor i8 undef, undef
415 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = xor <16 x i8> undef, undef
416 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = xor <32 x i8> undef, undef
417 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = xor <64 x i8> undef, undef
418 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = xor i1 undef, undef
419 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = xor <2 x i1> undef, undef
420 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = xor <4 x i1> undef, undef
421 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = xor <8 x i1> undef, undef
422 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = xor <16 x i1> undef, undef
423 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I1 = xor <32 x i1> undef, undef
424 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I1 = xor <64 x i1> undef, undef
425 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
426 ;
427 ; AVX-LABEL: 'xor'
428 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = xor i64 undef, undef
429 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = xor <2 x i64> undef, undef
430 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = xor <4 x i64> undef, undef
431 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = xor <8 x i64> undef, undef
432 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = xor i32 undef, undef
433 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = xor <4 x i32> undef, undef
434 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = xor <8 x i32> undef, undef
435 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = xor <16 x i32> undef, undef
436 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = xor i16 undef, undef
437 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = xor <8 x i16> undef, undef
438 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = xor <16 x i16> undef, undef
439 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = xor <32 x i16> undef, undef
440 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = xor i8 undef, undef
441 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = xor <16 x i8> undef, undef
442 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = xor <32 x i8> undef, undef
443 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = xor <64 x i8> undef, undef
444 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = xor i1 undef, undef
445 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = xor <2 x i1> undef, undef
446 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = xor <4 x i1> undef, undef
447 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = xor <8 x i1> undef, undef
448 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = xor <16 x i1> undef, undef
449 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = xor <32 x i1> undef, undef
450 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I1 = xor <64 x i1> undef, undef
451 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
452 ;
453 ; AVX512-LABEL: 'xor'
454 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = xor i64 undef, undef
455 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = xor <2 x i64> undef, undef
456 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = xor <4 x i64> undef, undef
457 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = xor <8 x i64> undef, undef
458 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = xor i32 undef, undef
459 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = xor <4 x i32> undef, undef
460 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = xor <8 x i32> undef, undef
461 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = xor <16 x i32> undef, undef
462 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = xor i16 undef, undef
463 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = xor <8 x i16> undef, undef
464 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = xor <16 x i16> undef, undef
465 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = xor <32 x i16> undef, undef
466 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = xor i8 undef, undef
467 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = xor <16 x i8> undef, undef
468 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = xor <32 x i8> undef, undef
469 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = xor <64 x i8> undef, undef
470 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = xor i1 undef, undef
471 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = xor <2 x i1> undef, undef
472 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = xor <4 x i1> undef, undef
473 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = xor <8 x i1> undef, undef
474 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = xor <16 x i1> undef, undef
475 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = xor <32 x i1> undef, undef
476 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I1 = xor <64 x i1> undef, undef
477 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
478 ;
479 %I64 = xor i64 undef, undef
480 %V2I64 = xor <2 x i64> undef, undef
481 %V4I64 = xor <4 x i64> undef, undef
482 %V8I64 = xor <8 x i64> undef, undef
484 %I32 = xor i32 undef, undef
485 %V4I32 = xor <4 x i32> undef, undef
486 %V8I32 = xor <8 x i32> undef, undef
487 %V16I32 = xor <16 x i32> undef, undef
489 %I16 = xor i16 undef, undef
490 %V8I16 = xor <8 x i16> undef, undef
491 %V16I16 = xor <16 x i16> undef, undef
492 %V32I16 = xor <32 x i16> undef, undef
494 %I8 = xor i8 undef, undef
495 %V16I8 = xor <16 x i8> undef, undef
496 %V32I8 = xor <32 x i8> undef, undef
497 %V64I8 = xor <64 x i8> undef, undef
499 %I1 = xor i1 undef, undef
500 %V2I1 = xor <2 x i1> undef, undef
501 %V4I1 = xor <4 x i1> undef, undef
502 %V8I1 = xor <8 x i1> undef, undef
503 %V16I1 = xor <16 x i1> undef, undef
504 %V32I1 = xor <32 x i1> undef, undef
505 %V64I1 = xor <64 x i1> undef, undef
507 ret i32 undef
508 }
510 define i32 @and(i32 %arg) {
511 ; SSE-LABEL: 'and'
512 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = and i64 undef, undef
513 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = and <2 x i64> undef, undef
514 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = and <4 x i64> undef, undef
515 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = and <8 x i64> undef, undef
516 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = and i32 undef, undef
517 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = and <4 x i32> undef, undef
518 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = and <8 x i32> undef, undef
519 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = and <16 x i32> undef, undef
520 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = and i16 undef, undef
521 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = and <8 x i16> undef, undef
522 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = and <16 x i16> undef, undef
523 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = and <32 x i16> undef, undef
524 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = and i8 undef, undef
525 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = and <16 x i8> undef, undef
526 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = and <32 x i8> undef, undef
527 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = and <64 x i8> undef, undef
528 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = and i1 undef, undef
529 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = and <2 x i1> undef, undef
530 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = and <4 x i1> undef, undef
531 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = and <8 x i1> undef, undef
532 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = and <16 x i1> undef, undef
533 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I1 = and <32 x i1> undef, undef
534 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I1 = and <64 x i1> undef, undef
535 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
536 ;
537 ; AVX-LABEL: 'and'
538 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = and i64 undef, undef
539 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = and <2 x i64> undef, undef
540 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = and <4 x i64> undef, undef
541 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = and <8 x i64> undef, undef
542 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = and i32 undef, undef
543 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = and <4 x i32> undef, undef
544 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = and <8 x i32> undef, undef
545 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = and <16 x i32> undef, undef
546 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = and i16 undef, undef
547 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = and <8 x i16> undef, undef
548 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = and <16 x i16> undef, undef
549 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = and <32 x i16> undef, undef
550 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = and i8 undef, undef
551 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = and <16 x i8> undef, undef
552 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = and <32 x i8> undef, undef
553 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = and <64 x i8> undef, undef
554 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = and i1 undef, undef
555 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = and <2 x i1> undef, undef
556 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = and <4 x i1> undef, undef
557 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = and <8 x i1> undef, undef
558 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = and <16 x i1> undef, undef
559 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = and <32 x i1> undef, undef
560 ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I1 = and <64 x i1> undef, undef
561 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
562 ;
563 ; AVX512-LABEL: 'and'
564 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = and i64 undef, undef
565 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = and <2 x i64> undef, undef
566 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = and <4 x i64> undef, undef
567 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = and <8 x i64> undef, undef
568 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = and i32 undef, undef
569 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = and <4 x i32> undef, undef
570 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = and <8 x i32> undef, undef
571 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = and <16 x i32> undef, undef
572 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = and i16 undef, undef
573 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = and <8 x i16> undef, undef
574 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = and <16 x i16> undef, undef
575 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = and <32 x i16> undef, undef
576 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = and i8 undef, undef
577 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = and <16 x i8> undef, undef
578 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = and <32 x i8> undef, undef
579 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = and <64 x i8> undef, undef
580 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I1 = and i1 undef, undef
581 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I1 = and <2 x i1> undef, undef
582 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I1 = and <4 x i1> undef, undef
583 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I1 = and <8 x i1> undef, undef
584 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I1 = and <16 x i1> undef, undef
585 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I1 = and <32 x i1> undef, undef
586 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I1 = and <64 x i1> undef, undef
587 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
588 ;
589 %I64 = and i64 undef, undef
590 %V2I64 = and <2 x i64> undef, undef
591 %V4I64 = and <4 x i64> undef, undef
592 %V8I64 = and <8 x i64> undef, undef
594 %I32 = and i32 undef, undef
595 %V4I32 = and <4 x i32> undef, undef
596 %V8I32 = and <8 x i32> undef, undef
597 %V16I32 = and <16 x i32> undef, undef
599 %I16 = and i16 undef, undef
600 %V8I16 = and <8 x i16> undef, undef
601 %V16I16 = and <16 x i16> undef, undef
602 %V32I16 = and <32 x i16> undef, undef
604 %I8 = and i8 undef, undef
605 %V16I8 = and <16 x i8> undef, undef
606 %V32I8 = and <32 x i8> undef, undef
607 %V64I8 = and <64 x i8> undef, undef
609 %I1 = and i1 undef, undef
610 %V2I1 = and <2 x i1> undef, undef
611 %V4I1 = and <4 x i1> undef, undef
612 %V8I1 = and <8 x i1> undef, undef
613 %V16I1 = and <16 x i1> undef, undef
614 %V32I1 = and <32 x i1> undef, undef
615 %V64I1 = and <64 x i1> undef, undef
617 ret i32 undef
618 }
620 define i32 @mul(i32 %arg) {
621 ; SSE2-LABEL: 'mul'
622 ; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
623 ; SSE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
624 ; SSE2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
625 ; SSE2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
626 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
627 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4I32 = mul <4 x i32> undef, undef
628 ; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8I32 = mul <8 x i32> undef, undef
629 ; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16I32 = mul <16 x i32> undef, undef
630 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
631 ; SSE2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
632 ; SSE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I16 = mul <16 x i16> undef, undef
633 ; SSE2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V32I16 = mul <32 x i16> undef, undef
634 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
635 ; SSE2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
636 ; SSE2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
637 ; SSE2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
638 ; SSE2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
639 ; SSE2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V32I8 = mul <32 x i8> undef, undef
640 ; SSE2-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V64I8 = mul <64 x i8> undef, undef
641 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
642 ;
643 ; SSE42-LABEL: 'mul'
644 ; SSE42-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
645 ; SSE42-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
646 ; SSE42-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
647 ; SSE42-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
648 ; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
649 ; SSE42-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4I32 = mul <4 x i32> undef, undef
650 ; SSE42-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V8I32 = mul <8 x i32> undef, undef
651 ; SSE42-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V16I32 = mul <16 x i32> undef, undef
652 ; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
653 ; SSE42-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
654 ; SSE42-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I16 = mul <16 x i16> undef, undef
655 ; SSE42-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V32I16 = mul <32 x i16> undef, undef
656 ; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
657 ; SSE42-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
658 ; SSE42-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
659 ; SSE42-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
660 ; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
661 ; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V32I8 = mul <32 x i8> undef, undef
662 ; SSE42-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V64I8 = mul <64 x i8> undef, undef
663 ; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
664 ;
665 ; AVX1-LABEL: 'mul'
666 ; AVX1-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
667 ; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
668 ; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4I64 = mul <4 x i64> undef, undef
669 ; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V8I64 = mul <8 x i64> undef, undef
670 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
671 ; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4I32 = mul <4 x i32> undef, undef
672 ; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I32 = mul <8 x i32> undef, undef
673 ; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16I32 = mul <16 x i32> undef, undef
674 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
675 ; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
676 ; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I16 = mul <16 x i16> undef, undef
677 ; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32I16 = mul <32 x i16> undef, undef
678 ; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
679 ; AVX1-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
680 ; AVX1-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
681 ; AVX1-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
682 ; AVX1-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I8 = mul <16 x i8> undef, undef
683 ; AVX1-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V32I8 = mul <32 x i8> undef, undef
684 ; AVX1-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V64I8 = mul <64 x i8> undef, undef
685 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
686 ;
687 ; AVX2-LABEL: 'mul'
688 ; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
689 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
690 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
691 ; AVX2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V8I64 = mul <8 x i64> undef, undef
692 ; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
693 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I32 = mul <4 x i32> undef, undef
694 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I32 = mul <8 x i32> undef, undef
695 ; AVX2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V16I32 = mul <16 x i32> undef, undef
696 ; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
697 ; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
698 ; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = mul <16 x i16> undef, undef
699 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V32I16 = mul <32 x i16> undef, undef
700 ; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
701 ; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
702 ; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
703 ; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
704 ; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
705 ; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I8 = mul <32 x i8> undef, undef
706 ; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64I8 = mul <64 x i8> undef, undef
707 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
708 ;
709 ; AVX512F-LABEL: 'mul'
710 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
711 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
712 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
713 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8I64 = mul <8 x i64> undef, undef
714 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
715 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I32 = mul <4 x i32> undef, undef
716 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I32 = mul <8 x i32> undef, undef
717 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I32 = mul <16 x i32> undef, undef
718 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
719 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
720 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = mul <16 x i16> undef, undef
721 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = mul <32 x i16> undef, undef
722 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
723 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
724 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
725 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
726 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
727 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I8 = mul <32 x i8> undef, undef
728 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = mul <64 x i8> undef, undef
729 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
730 ;
731 ; AVX512BW-LABEL: 'mul'
732 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
733 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
734 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
735 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8I64 = mul <8 x i64> undef, undef
736 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
737 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I32 = mul <4 x i32> undef, undef
738 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I32 = mul <8 x i32> undef, undef
739 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I32 = mul <16 x i32> undef, undef
740 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
741 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
742 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = mul <16 x i16> undef, undef
743 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V32I16 = mul <32 x i16> undef, undef
744 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
745 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
746 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
747 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
748 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V16I8 = mul <16 x i8> undef, undef
749 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V32I8 = mul <32 x i8> undef, undef
750 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V64I8 = mul <64 x i8> undef, undef
751 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
752 ;
753 ; AVX512DQ-LABEL: 'mul'
754 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
755 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V2I64 = mul <2 x i64> undef, undef
756 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4I64 = mul <4 x i64> undef, undef
757 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V8I64 = mul <8 x i64> undef, undef
758 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
759 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I32 = mul <4 x i32> undef, undef
760 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I32 = mul <8 x i32> undef, undef
761 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I32 = mul <16 x i32> undef, undef
762 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
763 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
764 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = mul <16 x i16> undef, undef
765 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = mul <32 x i16> undef, undef
766 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
767 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
768 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
769 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
770 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
771 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I8 = mul <32 x i8> undef, undef
772 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = mul <64 x i8> undef, undef
773 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
774 ;
775 ; SLM-LABEL: 'mul'
776 ; SLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
777 ; SLM-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V2I64 = mul <2 x i64> undef, undef
778 ; SLM-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V4I64 = mul <4 x i64> undef, undef
779 ; SLM-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %V8I64 = mul <8 x i64> undef, undef
780 ; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = mul i32 undef, undef
781 ; SLM-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4I32 = mul <4 x i32> undef, undef
782 ; SLM-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V8I32 = mul <8 x i32> undef, undef
783 ; SLM-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V16I32 = mul <16 x i32> undef, undef
784 ; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = mul i16 undef, undef
785 ; SLM-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I16 = mul <8 x i16> undef, undef
786 ; SLM-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I16 = mul <16 x i16> undef, undef
787 ; SLM-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V32I16 = mul <32 x i16> undef, undef
788 ; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I8 = mul i8 undef, undef
789 ; SLM-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I8 = mul <2 x i8> undef, undef
790 ; SLM-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I8 = mul <4 x i8> undef, undef
791 ; SLM-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8I8 = mul <8 x i8> undef, undef
792 ; SLM-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16I8 = mul <16 x i8> undef, undef
793 ; SLM-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V32I8 = mul <32 x i8> undef, undef
794 ; SLM-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V64I8 = mul <64 x i8> undef, undef
795 ; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
796 ;
797 %I64 = mul i64 undef, undef
798 %V2I64 = mul <2 x i64> undef, undef
799 %V4I64 = mul <4 x i64> undef, undef
800 %V8I64 = mul <8 x i64> undef, undef
802 %I32 = mul i32 undef, undef
803 %V4I32 = mul <4 x i32> undef, undef
804 %V8I32 = mul <8 x i32> undef, undef
805 %V16I32 = mul <16 x i32> undef, undef
807 %I16 = mul i16 undef, undef
808 %V8I16 = mul <8 x i16> undef, undef
809 %V16I16 = mul <16 x i16> undef, undef
810 %V32I16 = mul <32 x i16> undef, undef
812 %I8 = mul i8 undef, undef
813 %V2I8 = mul <2 x i8> undef, undef
814 %V4I8 = mul <4 x i8> undef, undef
815 %V8I8 = mul <8 x i8> undef, undef
816 %V16I8 = mul <16 x i8> undef, undef
817 %V32I8 = mul <32 x i8> undef, undef
818 %V64I8 = mul <64 x i8> undef, undef
820 ret i32 undef
821 }
823 ; A <2 x i32> gets expanded to a <2 x i64> vector.
824 ; A <2 x i64> vector multiply is implemented using
825 ; 3 PMULUDQ and 2 PADDS and 4 shifts.
826 define void @mul_2i32() {
827 ; SSE2-LABEL: 'mul_2i32'
828 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %A0 = mul <2 x i32> undef, undef
829 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
830 ;
831 ; SSE42-LABEL: 'mul_2i32'
832 ; SSE42-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %A0 = mul <2 x i32> undef, undef
833 ; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
834 ;
835 ; AVX1-LABEL: 'mul_2i32'
836 ; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %A0 = mul <2 x i32> undef, undef
837 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
838 ;
839 ; AVX2-LABEL: 'mul_2i32'
840 ; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %A0 = mul <2 x i32> undef, undef
841 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
842 ;
843 ; AVX512-LABEL: 'mul_2i32'
844 ; AVX512-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %A0 = mul <2 x i32> undef, undef
845 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
846 ;
847 ; SLM-LABEL: 'mul_2i32'
848 ; SLM-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %A0 = mul <2 x i32> undef, undef
849 ; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
850 ;
851 %A0 = mul <2 x i32> undef, undef
853 ret void
854 }