1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*store i16 %[0,2], ptr %[a-zA-Z0-7]+, align 2"
2 ; RUN: opt -passes=loop-vectorize -enable-interleaved-mem-accesses -prefer-predicate-over-epilogue=predicate-dont-vectorize -S -mcpu=skx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefix=DISABLED_MASKED_STRIDED
3 ; RUN: opt -passes=loop-vectorize -enable-interleaved-mem-accesses -enable-masked-interleaved-mem-accesses -prefer-predicate-over-epilogue=predicate-dont-vectorize -S -mcpu=skx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefix=ENABLED_MASKED_STRIDED
6 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
7 target triple = "x86_64-unknown-linux-gnu"
9 ; (1) Interleave-group with factor 4, storing only 2 members out of the 4.
10 ; Check that when we allow masked-memops to support interleave-group with gaps,
11 ; the store is vectorized using a wide masked store, with a 1,1,0,0,1,1,0,0,... mask.
12 ; Check that when we don't allow masked-memops to support interleave-group with gaps,
13 ; the store is scalarized.
14 ; The input IR was generated from this source:
15 ; for(i=0;i<1024;i++){
17 ; points[i*4 + 1] = y[i];
19 ; (relates to the testcase in PR50566)
21 define void @test1(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) {
22 ; DISABLED_MASKED_STRIDED-LABEL: 'test1'
23 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx2, align 2
24 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %2, ptr %arrayidx7, align 2
25 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 6 for VF 2 For instruction: store i16 %0, ptr %arrayidx2, align 2
26 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 6 for VF 2 For instruction: store i16 %2, ptr %arrayidx7, align 2
27 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 13 for VF 4 For instruction: store i16 %0, ptr %arrayidx2, align 2
28 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 13 for VF 4 For instruction: store i16 %2, ptr %arrayidx7, align 2
29 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 27 for VF 8 For instruction: store i16 %0, ptr %arrayidx2, align 2
30 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 27 for VF 8 For instruction: store i16 %2, ptr %arrayidx7, align 2
31 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 55 for VF 16 For instruction: store i16 %0, ptr %arrayidx2, align 2
32 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 55 for VF 16 For instruction: store i16 %2, ptr %arrayidx7, align 2
34 ; ENABLED_MASKED_STRIDED-LABEL: 'test1'
35 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx2, align 2
36 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %2, ptr %arrayidx7, align 2
37 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 2 For instruction: store i16 %0, ptr %arrayidx2, align 2
38 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 12 for VF 2 For instruction: store i16 %2, ptr %arrayidx7, align 2
39 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 4 For instruction: store i16 %0, ptr %arrayidx2, align 2
40 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 14 for VF 4 For instruction: store i16 %2, ptr %arrayidx7, align 2
41 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 8 For instruction: store i16 %0, ptr %arrayidx2, align 2
42 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 14 for VF 8 For instruction: store i16 %2, ptr %arrayidx7, align 2
43 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 16 For instruction: store i16 %0, ptr %arrayidx2, align 2
44 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 27 for VF 16 For instruction: store i16 %2, ptr %arrayidx7, align 2
50 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
51 %arrayidx = getelementptr inbounds i16, ptr %x, i64 %indvars.iv
52 %0 = load i16, ptr %arrayidx, align 2
53 %1 = shl nuw nsw i64 %indvars.iv, 2
54 %arrayidx2 = getelementptr inbounds i16, ptr %points, i64 %1
55 store i16 %0, ptr %arrayidx2, align 2
56 %arrayidx4 = getelementptr inbounds i16, ptr %y, i64 %indvars.iv
57 %2 = load i16, ptr %arrayidx4, align 2
58 %3 = or disjoint i64 %1, 1
59 %arrayidx7 = getelementptr inbounds i16, ptr %points, i64 %3
60 store i16 %2, ptr %arrayidx7, align 2
61 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
62 %exitcond.not = icmp eq i64 %indvars.iv.next, 1024
63 br i1 %exitcond.not, label %for.end, label %for.body
69 ; (2) Same as above, but this time the gaps mask of the store is also And-ed with the
70 ; fold-tail mask. If using masked memops to vectorize interleaved-group with gaps is
71 ; not allowed, the store is scalarized and predicated.
72 ; The input IR was generated from this source:
73 ; for(i=0;i<numPoints;i++){
75 ; points[i*4 + 1] = y[i];
78 define void @test2(ptr noalias nocapture %points, i32 %numPoints, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) {
79 ; DISABLED_MASKED_STRIDED-LABEL: 'test2'
80 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx2, align 2
81 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %2, ptr %arrayidx7, align 2
82 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 5 for VF 2 For instruction: store i16 %0, ptr %arrayidx2, align 2
83 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 3000000 for VF 2 For instruction: store i16 %2, ptr %arrayidx7, align 2
84 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 10 for VF 4 For instruction: store i16 %0, ptr %arrayidx2, align 2
85 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 3000000 for VF 4 For instruction: store i16 %2, ptr %arrayidx7, align 2
86 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 21 for VF 8 For instruction: store i16 %0, ptr %arrayidx2, align 2
87 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 3000000 for VF 8 For instruction: store i16 %2, ptr %arrayidx7, align 2
88 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 43 for VF 16 For instruction: store i16 %0, ptr %arrayidx2, align 2
89 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 3000000 for VF 16 For instruction: store i16 %2, ptr %arrayidx7, align 2
91 ; ENABLED_MASKED_STRIDED-LABEL: 'test2'
92 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx2, align 2
93 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %2, ptr %arrayidx7, align 2
94 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 2 For instruction: store i16 %0, ptr %arrayidx2, align 2
95 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 10 for VF 2 For instruction: store i16 %2, ptr %arrayidx7, align 2
96 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 4 For instruction: store i16 %0, ptr %arrayidx2, align 2
97 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 14 for VF 4 For instruction: store i16 %2, ptr %arrayidx7, align 2
98 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 8 For instruction: store i16 %0, ptr %arrayidx2, align 2
99 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 14 for VF 8 For instruction: store i16 %2, ptr %arrayidx7, align 2
100 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 0 for VF 16 For instruction: store i16 %0, ptr %arrayidx2, align 2
101 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 27 for VF 16 For instruction: store i16 %2, ptr %arrayidx7, align 2
104 %cmp15 = icmp sgt i32 %numPoints, 0
105 br i1 %cmp15, label %for.body.preheader, label %for.end
108 %wide.trip.count = zext i32 %numPoints to i64
112 %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
113 %arrayidx = getelementptr inbounds i16, ptr %x, i64 %indvars.iv
114 %0 = load i16, ptr %arrayidx, align 2
115 %1 = shl nsw i64 %indvars.iv, 2
116 %arrayidx2 = getelementptr inbounds i16, ptr %points, i64 %1
117 store i16 %0, ptr %arrayidx2, align 2
118 %arrayidx4 = getelementptr inbounds i16, ptr %y, i64 %indvars.iv
119 %2 = load i16, ptr %arrayidx4, align 2
120 %3 = or disjoint i64 %1, 1
121 %arrayidx7 = getelementptr inbounds i16, ptr %points, i64 %3
122 store i16 %2, ptr %arrayidx7, align 2
123 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
124 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
125 br i1 %exitcond.not, label %for.end.loopexit, label %for.body
134 ; (3) Testing a scenario of a conditional store. The gaps mask of the store is also
135 ; And-ed with the condition mask (x[i] > 0).
136 ; If using masked memops to vectorize interleaved-group with gaps is
137 ; not allowed, the store is scalarized and predicated.
138 ; Here the Interleave-group is with factor 3, storing only 1 member out of the 3.
139 ; The input IR was generated from this source:
140 ; for(i=0;i<1024;i++){
142 ; points[i*3] = x[i];
145 define void @test(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readnone %y) {
146 ; DISABLED_MASKED_STRIDED-LABEL: 'test'
147 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx6, align 2
148 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 2 for VF 2 For instruction: store i16 %0, ptr %arrayidx6, align 2
149 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 4 for VF 4 For instruction: store i16 %0, ptr %arrayidx6, align 2
150 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 8 for VF 8 For instruction: store i16 %0, ptr %arrayidx6, align 2
151 ; DISABLED_MASKED_STRIDED: LV: Found an estimated cost of 16 for VF 16 For instruction: store i16 %0, ptr %arrayidx6, align 2
153 ; ENABLED_MASKED_STRIDED-LABEL: 'test'
154 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %0, ptr %arrayidx6, align 2
155 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 2 for VF 2 For instruction: store i16 %0, ptr %arrayidx6, align 2
156 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 4 for VF 4 For instruction: store i16 %0, ptr %arrayidx6, align 2
157 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 8 for VF 8 For instruction: store i16 %0, ptr %arrayidx6, align 2
158 ; ENABLED_MASKED_STRIDED: LV: Found an estimated cost of 16 for VF 16 For instruction: store i16 %0, ptr %arrayidx6, align 2
164 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
165 %arrayidx = getelementptr inbounds i16, ptr %x, i64 %indvars.iv
166 %0 = load i16, ptr %arrayidx, align 2
167 %cmp1 = icmp sgt i16 %0, 0
168 br i1 %cmp1, label %if.then, label %for.inc
171 %1 = mul nuw nsw i64 %indvars.iv, 3
172 %arrayidx6 = getelementptr inbounds i16, ptr %points, i64 %1
173 store i16 %0, ptr %arrayidx6, align 2
177 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
178 %exitcond.not = icmp eq i64 %indvars.iv.next, 1024
179 br i1 %exitcond.not, label %for.end, label %for.body