| blob | 4723ac01d6021f7fa5251d0de967822aef3afd9f |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4 ; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
7 define i64 @fptos_f64_i64(double %a) {
8 ; CHECK-LABEL: fptos_f64_i64:
9 ; CHECK: // %bb.0: // %entry
10 ; CHECK-NEXT: fcvtzs x0, d0
11 ; CHECK-NEXT: ret
12 entry:
13 %c = fptosi double %a to i64
14 ret i64 %c
15 }
17 define i64 @fptou_f64_i64(double %a) {
18 ; CHECK-LABEL: fptou_f64_i64:
19 ; CHECK: // %bb.0: // %entry
20 ; CHECK-NEXT: fcvtzu x0, d0
21 ; CHECK-NEXT: ret
22 entry:
23 %c = fptoui double %a to i64
24 ret i64 %c
25 }
27 define i32 @fptos_f64_i32(double %a) {
28 ; CHECK-LABEL: fptos_f64_i32:
29 ; CHECK: // %bb.0: // %entry
30 ; CHECK-NEXT: fcvtzs w0, d0
31 ; CHECK-NEXT: ret
32 entry:
33 %c = fptosi double %a to i32
34 ret i32 %c
35 }
37 define i32 @fptou_f64_i32(double %a) {
38 ; CHECK-LABEL: fptou_f64_i32:
39 ; CHECK: // %bb.0: // %entry
40 ; CHECK-NEXT: fcvtzu w0, d0
41 ; CHECK-NEXT: ret
42 entry:
43 %c = fptoui double %a to i32
44 ret i32 %c
45 }
47 define i16 @fptos_f64_i16(double %a) {
48 ; CHECK-LABEL: fptos_f64_i16:
49 ; CHECK: // %bb.0: // %entry
50 ; CHECK-NEXT: fcvtzs w0, d0
51 ; CHECK-NEXT: ret
52 entry:
53 %c = fptosi double %a to i16
54 ret i16 %c
55 }
57 define i16 @fptou_f64_i16(double %a) {
58 ; CHECK-SD-LABEL: fptou_f64_i16:
59 ; CHECK-SD: // %bb.0: // %entry
60 ; CHECK-SD-NEXT: fcvtzs w0, d0
61 ; CHECK-SD-NEXT: ret
62 ;
63 ; CHECK-GI-LABEL: fptou_f64_i16:
64 ; CHECK-GI: // %bb.0: // %entry
65 ; CHECK-GI-NEXT: fcvtzu w0, d0
66 ; CHECK-GI-NEXT: ret
67 entry:
68 %c = fptoui double %a to i16
69 ret i16 %c
70 }
72 define i8 @fptos_f64_i8(double %a) {
73 ; CHECK-LABEL: fptos_f64_i8:
74 ; CHECK: // %bb.0: // %entry
75 ; CHECK-NEXT: fcvtzs w0, d0
76 ; CHECK-NEXT: ret
77 entry:
78 %c = fptosi double %a to i8
79 ret i8 %c
80 }
82 define i8 @fptou_f64_i8(double %a) {
83 ; CHECK-SD-LABEL: fptou_f64_i8:
84 ; CHECK-SD: // %bb.0: // %entry
85 ; CHECK-SD-NEXT: fcvtzs w0, d0
86 ; CHECK-SD-NEXT: ret
87 ;
88 ; CHECK-GI-LABEL: fptou_f64_i8:
89 ; CHECK-GI: // %bb.0: // %entry
90 ; CHECK-GI-NEXT: fcvtzu w0, d0
91 ; CHECK-GI-NEXT: ret
92 entry:
93 %c = fptoui double %a to i8
94 ret i8 %c
95 }
97 define i128 @fptos_f64_i128(double %a) {
98 ; CHECK-LABEL: fptos_f64_i128:
99 ; CHECK: // %bb.0: // %entry
100 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
101 ; CHECK-NEXT: .cfi_def_cfa_offset 16
102 ; CHECK-NEXT: .cfi_offset w30, -16
103 ; CHECK-NEXT: bl __fixdfti
104 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
105 ; CHECK-NEXT: ret
106 entry:
107 %c = fptosi double %a to i128
108 ret i128 %c
109 }
111 define i128 @fptou_f64_i128(double %a) {
112 ; CHECK-LABEL: fptou_f64_i128:
113 ; CHECK: // %bb.0: // %entry
114 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
115 ; CHECK-NEXT: .cfi_def_cfa_offset 16
116 ; CHECK-NEXT: .cfi_offset w30, -16
117 ; CHECK-NEXT: bl __fixunsdfti
118 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
119 ; CHECK-NEXT: ret
120 entry:
121 %c = fptoui double %a to i128
122 ret i128 %c
123 }
125 define i64 @fptos_f32_i64(float %a) {
126 ; CHECK-LABEL: fptos_f32_i64:
127 ; CHECK: // %bb.0: // %entry
128 ; CHECK-NEXT: fcvtzs x0, s0
129 ; CHECK-NEXT: ret
130 entry:
131 %c = fptosi float %a to i64
132 ret i64 %c
133 }
135 define i64 @fptou_f32_i64(float %a) {
136 ; CHECK-LABEL: fptou_f32_i64:
137 ; CHECK: // %bb.0: // %entry
138 ; CHECK-NEXT: fcvtzu x0, s0
139 ; CHECK-NEXT: ret
140 entry:
141 %c = fptoui float %a to i64
142 ret i64 %c
143 }
145 define i32 @fptos_f32_i32(float %a) {
146 ; CHECK-LABEL: fptos_f32_i32:
147 ; CHECK: // %bb.0: // %entry
148 ; CHECK-NEXT: fcvtzs w0, s0
149 ; CHECK-NEXT: ret
150 entry:
151 %c = fptosi float %a to i32
152 ret i32 %c
153 }
155 define i32 @fptou_f32_i32(float %a) {
156 ; CHECK-LABEL: fptou_f32_i32:
157 ; CHECK: // %bb.0: // %entry
158 ; CHECK-NEXT: fcvtzu w0, s0
159 ; CHECK-NEXT: ret
160 entry:
161 %c = fptoui float %a to i32
162 ret i32 %c
163 }
165 define i16 @fptos_f32_i16(float %a) {
166 ; CHECK-LABEL: fptos_f32_i16:
167 ; CHECK: // %bb.0: // %entry
168 ; CHECK-NEXT: fcvtzs w0, s0
169 ; CHECK-NEXT: ret
170 entry:
171 %c = fptosi float %a to i16
172 ret i16 %c
173 }
175 define i16 @fptou_f32_i16(float %a) {
176 ; CHECK-SD-LABEL: fptou_f32_i16:
177 ; CHECK-SD: // %bb.0: // %entry
178 ; CHECK-SD-NEXT: fcvtzs w0, s0
179 ; CHECK-SD-NEXT: ret
180 ;
181 ; CHECK-GI-LABEL: fptou_f32_i16:
182 ; CHECK-GI: // %bb.0: // %entry
183 ; CHECK-GI-NEXT: fcvtzu w0, s0
184 ; CHECK-GI-NEXT: ret
185 entry:
186 %c = fptoui float %a to i16
187 ret i16 %c
188 }
190 define i8 @fptos_f32_i8(float %a) {
191 ; CHECK-LABEL: fptos_f32_i8:
192 ; CHECK: // %bb.0: // %entry
193 ; CHECK-NEXT: fcvtzs w0, s0
194 ; CHECK-NEXT: ret
195 entry:
196 %c = fptosi float %a to i8
197 ret i8 %c
198 }
200 define i8 @fptou_f32_i8(float %a) {
201 ; CHECK-SD-LABEL: fptou_f32_i8:
202 ; CHECK-SD: // %bb.0: // %entry
203 ; CHECK-SD-NEXT: fcvtzs w0, s0
204 ; CHECK-SD-NEXT: ret
205 ;
206 ; CHECK-GI-LABEL: fptou_f32_i8:
207 ; CHECK-GI: // %bb.0: // %entry
208 ; CHECK-GI-NEXT: fcvtzu w0, s0
209 ; CHECK-GI-NEXT: ret
210 entry:
211 %c = fptoui float %a to i8
212 ret i8 %c
213 }
215 define i128 @fptos_f32_i128(float %a) {
216 ; CHECK-LABEL: fptos_f32_i128:
217 ; CHECK: // %bb.0: // %entry
218 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
219 ; CHECK-NEXT: .cfi_def_cfa_offset 16
220 ; CHECK-NEXT: .cfi_offset w30, -16
221 ; CHECK-NEXT: bl __fixsfti
222 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
223 ; CHECK-NEXT: ret
224 entry:
225 %c = fptosi float %a to i128
226 ret i128 %c
227 }
229 define i128 @fptou_f32_i128(float %a) {
230 ; CHECK-LABEL: fptou_f32_i128:
231 ; CHECK: // %bb.0: // %entry
232 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
233 ; CHECK-NEXT: .cfi_def_cfa_offset 16
234 ; CHECK-NEXT: .cfi_offset w30, -16
235 ; CHECK-NEXT: bl __fixunssfti
236 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
237 ; CHECK-NEXT: ret
238 entry:
239 %c = fptoui float %a to i128
240 ret i128 %c
241 }
243 define i64 @fptos_f16_i64(half %a) {
244 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i64:
245 ; CHECK-SD-NOFP16: // %bb.0: // %entry
246 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
247 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s0
248 ; CHECK-SD-NOFP16-NEXT: ret
249 ;
250 ; CHECK-SD-FP16-LABEL: fptos_f16_i64:
251 ; CHECK-SD-FP16: // %bb.0: // %entry
252 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h0
253 ; CHECK-SD-FP16-NEXT: ret
254 ;
255 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i64:
256 ; CHECK-GI-NOFP16: // %bb.0: // %entry
257 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
258 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
259 ; CHECK-GI-NOFP16-NEXT: ret
260 ;
261 ; CHECK-GI-FP16-LABEL: fptos_f16_i64:
262 ; CHECK-GI-FP16: // %bb.0: // %entry
263 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
264 ; CHECK-GI-FP16-NEXT: ret
265 entry:
266 %c = fptosi half %a to i64
267 ret i64 %c
268 }
270 define i64 @fptou_f16_i64(half %a) {
271 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i64:
272 ; CHECK-SD-NOFP16: // %bb.0: // %entry
273 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
274 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s0
275 ; CHECK-SD-NOFP16-NEXT: ret
276 ;
277 ; CHECK-SD-FP16-LABEL: fptou_f16_i64:
278 ; CHECK-SD-FP16: // %bb.0: // %entry
279 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h0
280 ; CHECK-SD-FP16-NEXT: ret
281 ;
282 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i64:
283 ; CHECK-GI-NOFP16: // %bb.0: // %entry
284 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
285 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
286 ; CHECK-GI-NOFP16-NEXT: ret
287 ;
288 ; CHECK-GI-FP16-LABEL: fptou_f16_i64:
289 ; CHECK-GI-FP16: // %bb.0: // %entry
290 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
291 ; CHECK-GI-FP16-NEXT: ret
292 entry:
293 %c = fptoui half %a to i64
294 ret i64 %c
295 }
297 define i32 @fptos_f16_i32(half %a) {
298 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i32:
299 ; CHECK-SD-NOFP16: // %bb.0: // %entry
300 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
301 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
302 ; CHECK-SD-NOFP16-NEXT: ret
303 ;
304 ; CHECK-SD-FP16-LABEL: fptos_f16_i32:
305 ; CHECK-SD-FP16: // %bb.0: // %entry
306 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
307 ; CHECK-SD-FP16-NEXT: ret
308 ;
309 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i32:
310 ; CHECK-GI-NOFP16: // %bb.0: // %entry
311 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
312 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
313 ; CHECK-GI-NOFP16-NEXT: ret
314 ;
315 ; CHECK-GI-FP16-LABEL: fptos_f16_i32:
316 ; CHECK-GI-FP16: // %bb.0: // %entry
317 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
318 ; CHECK-GI-FP16-NEXT: ret
319 entry:
320 %c = fptosi half %a to i32
321 ret i32 %c
322 }
324 define i32 @fptou_f16_i32(half %a) {
325 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i32:
326 ; CHECK-SD-NOFP16: // %bb.0: // %entry
327 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
328 ; CHECK-SD-NOFP16-NEXT: fcvtzu w0, s0
329 ; CHECK-SD-NOFP16-NEXT: ret
330 ;
331 ; CHECK-SD-FP16-LABEL: fptou_f16_i32:
332 ; CHECK-SD-FP16: // %bb.0: // %entry
333 ; CHECK-SD-FP16-NEXT: fcvtzu w0, h0
334 ; CHECK-SD-FP16-NEXT: ret
335 ;
336 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i32:
337 ; CHECK-GI-NOFP16: // %bb.0: // %entry
338 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
339 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
340 ; CHECK-GI-NOFP16-NEXT: ret
341 ;
342 ; CHECK-GI-FP16-LABEL: fptou_f16_i32:
343 ; CHECK-GI-FP16: // %bb.0: // %entry
344 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
345 ; CHECK-GI-FP16-NEXT: ret
346 entry:
347 %c = fptoui half %a to i32
348 ret i32 %c
349 }
351 define i16 @fptos_f16_i16(half %a) {
352 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i16:
353 ; CHECK-SD-NOFP16: // %bb.0: // %entry
354 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
355 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
356 ; CHECK-SD-NOFP16-NEXT: ret
357 ;
358 ; CHECK-SD-FP16-LABEL: fptos_f16_i16:
359 ; CHECK-SD-FP16: // %bb.0: // %entry
360 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
361 ; CHECK-SD-FP16-NEXT: ret
362 ;
363 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i16:
364 ; CHECK-GI-NOFP16: // %bb.0: // %entry
365 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
366 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
367 ; CHECK-GI-NOFP16-NEXT: ret
368 ;
369 ; CHECK-GI-FP16-LABEL: fptos_f16_i16:
370 ; CHECK-GI-FP16: // %bb.0: // %entry
371 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
372 ; CHECK-GI-FP16-NEXT: ret
373 entry:
374 %c = fptosi half %a to i16
375 ret i16 %c
376 }
378 define i16 @fptou_f16_i16(half %a) {
379 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i16:
380 ; CHECK-SD-NOFP16: // %bb.0: // %entry
381 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
382 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
383 ; CHECK-SD-NOFP16-NEXT: ret
384 ;
385 ; CHECK-SD-FP16-LABEL: fptou_f16_i16:
386 ; CHECK-SD-FP16: // %bb.0: // %entry
387 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
388 ; CHECK-SD-FP16-NEXT: ret
389 ;
390 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i16:
391 ; CHECK-GI-NOFP16: // %bb.0: // %entry
392 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
393 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
394 ; CHECK-GI-NOFP16-NEXT: ret
395 ;
396 ; CHECK-GI-FP16-LABEL: fptou_f16_i16:
397 ; CHECK-GI-FP16: // %bb.0: // %entry
398 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
399 ; CHECK-GI-FP16-NEXT: ret
400 entry:
401 %c = fptoui half %a to i16
402 ret i16 %c
403 }
405 define i8 @fptos_f16_i8(half %a) {
406 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i8:
407 ; CHECK-SD-NOFP16: // %bb.0: // %entry
408 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
409 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
410 ; CHECK-SD-NOFP16-NEXT: ret
411 ;
412 ; CHECK-SD-FP16-LABEL: fptos_f16_i8:
413 ; CHECK-SD-FP16: // %bb.0: // %entry
414 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
415 ; CHECK-SD-FP16-NEXT: ret
416 ;
417 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i8:
418 ; CHECK-GI-NOFP16: // %bb.0: // %entry
419 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
420 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
421 ; CHECK-GI-NOFP16-NEXT: ret
422 ;
423 ; CHECK-GI-FP16-LABEL: fptos_f16_i8:
424 ; CHECK-GI-FP16: // %bb.0: // %entry
425 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
426 ; CHECK-GI-FP16-NEXT: ret
427 entry:
428 %c = fptosi half %a to i8
429 ret i8 %c
430 }
432 define i8 @fptou_f16_i8(half %a) {
433 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i8:
434 ; CHECK-SD-NOFP16: // %bb.0: // %entry
435 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
436 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
437 ; CHECK-SD-NOFP16-NEXT: ret
438 ;
439 ; CHECK-SD-FP16-LABEL: fptou_f16_i8:
440 ; CHECK-SD-FP16: // %bb.0: // %entry
441 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
442 ; CHECK-SD-FP16-NEXT: ret
443 ;
444 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i8:
445 ; CHECK-GI-NOFP16: // %bb.0: // %entry
446 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
447 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
448 ; CHECK-GI-NOFP16-NEXT: ret
449 ;
450 ; CHECK-GI-FP16-LABEL: fptou_f16_i8:
451 ; CHECK-GI-FP16: // %bb.0: // %entry
452 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
453 ; CHECK-GI-FP16-NEXT: ret
454 entry:
455 %c = fptoui half %a to i8
456 ret i8 %c
457 }
459 define i128 @fptos_f16_i128(half %a) {
460 ; CHECK-SD-LABEL: fptos_f16_i128:
461 ; CHECK-SD: // %bb.0: // %entry
462 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
463 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
464 ; CHECK-SD-NEXT: .cfi_offset w30, -16
465 ; CHECK-SD-NEXT: bl __fixhfti
466 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
467 ; CHECK-SD-NEXT: ret
468 ;
469 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i128:
470 ; CHECK-GI-NOFP16: // %bb.0: // %entry
471 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
472 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
473 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
474 ; CHECK-GI-NOFP16-NEXT: ret
475 ;
476 ; CHECK-GI-FP16-LABEL: fptos_f16_i128:
477 ; CHECK-GI-FP16: // %bb.0: // %entry
478 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
479 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
480 ; CHECK-GI-FP16-NEXT: ret
481 entry:
482 %c = fptosi half %a to i128
483 ret i128 %c
484 }
486 define i128 @fptou_f16_i128(half %a) {
487 ; CHECK-SD-LABEL: fptou_f16_i128:
488 ; CHECK-SD: // %bb.0: // %entry
489 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
490 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
491 ; CHECK-SD-NEXT: .cfi_offset w30, -16
492 ; CHECK-SD-NEXT: bl __fixunshfti
493 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
494 ; CHECK-SD-NEXT: ret
495 ;
496 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i128:
497 ; CHECK-GI-NOFP16: // %bb.0: // %entry
498 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
499 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
500 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
501 ; CHECK-GI-NOFP16-NEXT: ret
502 ;
503 ; CHECK-GI-FP16-LABEL: fptou_f16_i128:
504 ; CHECK-GI-FP16: // %bb.0: // %entry
505 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
506 ; CHECK-GI-FP16-NEXT: mov x1, xzr
507 ; CHECK-GI-FP16-NEXT: ret
508 entry:
509 %c = fptoui half %a to i128
510 ret i128 %c
511 }
513 define i64 @fptos_f128_i64(fp128 %a) {
514 ; CHECK-SD-LABEL: fptos_f128_i64:
515 ; CHECK-SD: // %bb.0: // %entry
516 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
517 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
518 ; CHECK-SD-NEXT: .cfi_offset w30, -16
519 ; CHECK-SD-NEXT: bl __fixtfdi
520 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
521 ; CHECK-SD-NEXT: ret
522 ;
523 ; CHECK-GI-LABEL: fptos_f128_i64:
524 ; CHECK-GI: // %bb.0: // %entry
525 ; CHECK-GI-NEXT: b __fixtfdi
526 entry:
527 %c = fptosi fp128 %a to i64
528 ret i64 %c
529 }
531 define i64 @fptou_f128_i64(fp128 %a) {
532 ; CHECK-SD-LABEL: fptou_f128_i64:
533 ; CHECK-SD: // %bb.0: // %entry
534 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
535 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
536 ; CHECK-SD-NEXT: .cfi_offset w30, -16
537 ; CHECK-SD-NEXT: bl __fixunstfdi
538 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
539 ; CHECK-SD-NEXT: ret
540 ;
541 ; CHECK-GI-LABEL: fptou_f128_i64:
542 ; CHECK-GI: // %bb.0: // %entry
543 ; CHECK-GI-NEXT: b __fixunstfdi
544 entry:
545 %c = fptoui fp128 %a to i64
546 ret i64 %c
547 }
549 define i32 @fptos_f128_i32(fp128 %a) {
550 ; CHECK-SD-LABEL: fptos_f128_i32:
551 ; CHECK-SD: // %bb.0: // %entry
552 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
553 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
554 ; CHECK-SD-NEXT: .cfi_offset w30, -16
555 ; CHECK-SD-NEXT: bl __fixtfsi
556 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
557 ; CHECK-SD-NEXT: ret
558 ;
559 ; CHECK-GI-LABEL: fptos_f128_i32:
560 ; CHECK-GI: // %bb.0: // %entry
561 ; CHECK-GI-NEXT: b __fixtfsi
562 entry:
563 %c = fptosi fp128 %a to i32
564 ret i32 %c
565 }
567 define i32 @fptou_f128_i32(fp128 %a) {
568 ; CHECK-SD-LABEL: fptou_f128_i32:
569 ; CHECK-SD: // %bb.0: // %entry
570 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
571 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
572 ; CHECK-SD-NEXT: .cfi_offset w30, -16
573 ; CHECK-SD-NEXT: bl __fixunstfsi
574 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
575 ; CHECK-SD-NEXT: ret
576 ;
577 ; CHECK-GI-LABEL: fptou_f128_i32:
578 ; CHECK-GI: // %bb.0: // %entry
579 ; CHECK-GI-NEXT: b __fixunstfsi
580 entry:
581 %c = fptoui fp128 %a to i32
582 ret i32 %c
583 }
585 define i16 @fptos_f128_i16(fp128 %a) {
586 ; CHECK-LABEL: fptos_f128_i16:
587 ; CHECK: // %bb.0: // %entry
588 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
589 ; CHECK-NEXT: .cfi_def_cfa_offset 16
590 ; CHECK-NEXT: .cfi_offset w30, -16
591 ; CHECK-NEXT: bl __fixtfsi
592 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
593 ; CHECK-NEXT: ret
594 entry:
595 %c = fptosi fp128 %a to i16
596 ret i16 %c
597 }
599 define i16 @fptou_f128_i16(fp128 %a) {
600 ; CHECK-SD-LABEL: fptou_f128_i16:
601 ; CHECK-SD: // %bb.0: // %entry
602 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
603 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
604 ; CHECK-SD-NEXT: .cfi_offset w30, -16
605 ; CHECK-SD-NEXT: bl __fixtfsi
606 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
607 ; CHECK-SD-NEXT: ret
608 ;
609 ; CHECK-GI-LABEL: fptou_f128_i16:
610 ; CHECK-GI: // %bb.0: // %entry
611 ; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
612 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
613 ; CHECK-GI-NEXT: .cfi_offset w30, -16
614 ; CHECK-GI-NEXT: bl __fixunstfsi
615 ; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
616 ; CHECK-GI-NEXT: ret
617 entry:
618 %c = fptoui fp128 %a to i16
619 ret i16 %c
620 }
622 define i8 @fptos_f128_i8(fp128 %a) {
623 ; CHECK-LABEL: fptos_f128_i8:
624 ; CHECK: // %bb.0: // %entry
625 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
626 ; CHECK-NEXT: .cfi_def_cfa_offset 16
627 ; CHECK-NEXT: .cfi_offset w30, -16
628 ; CHECK-NEXT: bl __fixtfsi
629 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
630 ; CHECK-NEXT: ret
631 entry:
632 %c = fptosi fp128 %a to i8
633 ret i8 %c
634 }
636 define i8 @fptou_f128_i8(fp128 %a) {
637 ; CHECK-SD-LABEL: fptou_f128_i8:
638 ; CHECK-SD: // %bb.0: // %entry
639 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
640 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
641 ; CHECK-SD-NEXT: .cfi_offset w30, -16
642 ; CHECK-SD-NEXT: bl __fixtfsi
643 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
644 ; CHECK-SD-NEXT: ret
645 ;
646 ; CHECK-GI-LABEL: fptou_f128_i8:
647 ; CHECK-GI: // %bb.0: // %entry
648 ; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
649 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
650 ; CHECK-GI-NEXT: .cfi_offset w30, -16
651 ; CHECK-GI-NEXT: bl __fixunstfsi
652 ; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
653 ; CHECK-GI-NEXT: ret
654 entry:
655 %c = fptoui fp128 %a to i8
656 ret i8 %c
657 }
659 define i128 @fptos_f128_i128(fp128 %a) {
660 ; CHECK-LABEL: fptos_f128_i128:
661 ; CHECK: // %bb.0: // %entry
662 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
663 ; CHECK-NEXT: .cfi_def_cfa_offset 16
664 ; CHECK-NEXT: .cfi_offset w30, -16
665 ; CHECK-NEXT: bl __fixtfti
666 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
667 ; CHECK-NEXT: ret
668 entry:
669 %c = fptosi fp128 %a to i128
670 ret i128 %c
671 }
673 define i128 @fptou_f128_i128(fp128 %a) {
674 ; CHECK-LABEL: fptou_f128_i128:
675 ; CHECK: // %bb.0: // %entry
676 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
677 ; CHECK-NEXT: .cfi_def_cfa_offset 16
678 ; CHECK-NEXT: .cfi_offset w30, -16
679 ; CHECK-NEXT: bl __fixunstfti
680 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
681 ; CHECK-NEXT: ret
682 entry:
683 %c = fptoui fp128 %a to i128
684 ret i128 %c
685 }
687 define <2 x i64> @fptos_v2f64_v2i64(<2 x double> %a) {
688 ; CHECK-LABEL: fptos_v2f64_v2i64:
689 ; CHECK: // %bb.0: // %entry
690 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
691 ; CHECK-NEXT: ret
692 entry:
693 %c = fptosi <2 x double> %a to <2 x i64>
694 ret <2 x i64> %c
695 }
697 define <2 x i64> @fptou_v2f64_v2i64(<2 x double> %a) {
698 ; CHECK-LABEL: fptou_v2f64_v2i64:
699 ; CHECK: // %bb.0: // %entry
700 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
701 ; CHECK-NEXT: ret
702 entry:
703 %c = fptoui <2 x double> %a to <2 x i64>
704 ret <2 x i64> %c
705 }
707 define <3 x i64> @fptos_v3f64_v3i64(<3 x double> %a) {
708 ; CHECK-SD-LABEL: fptos_v3f64_v3i64:
709 ; CHECK-SD: // %bb.0: // %entry
710 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
711 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
712 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
713 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
714 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
715 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
716 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
717 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
718 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
719 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
720 ; CHECK-SD-NEXT: ret
721 ;
722 ; CHECK-GI-LABEL: fptos_v3f64_v3i64:
723 ; CHECK-GI: // %bb.0: // %entry
724 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
725 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
726 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
727 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
728 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
729 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
730 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
731 ; CHECK-GI-NEXT: mov d1, v0.d[1]
732 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
733 ; CHECK-GI-NEXT: ret
734 entry:
735 %c = fptosi <3 x double> %a to <3 x i64>
736 ret <3 x i64> %c
737 }
739 define <3 x i64> @fptou_v3f64_v3i64(<3 x double> %a) {
740 ; CHECK-SD-LABEL: fptou_v3f64_v3i64:
741 ; CHECK-SD: // %bb.0: // %entry
742 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
743 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
744 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
745 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
746 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
747 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
748 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
749 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
750 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
751 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
752 ; CHECK-SD-NEXT: ret
753 ;
754 ; CHECK-GI-LABEL: fptou_v3f64_v3i64:
755 ; CHECK-GI: // %bb.0: // %entry
756 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
757 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
758 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
759 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
760 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
761 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
762 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
763 ; CHECK-GI-NEXT: mov d1, v0.d[1]
764 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
765 ; CHECK-GI-NEXT: ret
766 entry:
767 %c = fptoui <3 x double> %a to <3 x i64>
768 ret <3 x i64> %c
769 }
771 define <4 x i64> @fptos_v4f64_v4i64(<4 x double> %a) {
772 ; CHECK-LABEL: fptos_v4f64_v4i64:
773 ; CHECK: // %bb.0: // %entry
774 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
775 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
776 ; CHECK-NEXT: ret
777 entry:
778 %c = fptosi <4 x double> %a to <4 x i64>
779 ret <4 x i64> %c
780 }
782 define <4 x i64> @fptou_v4f64_v4i64(<4 x double> %a) {
783 ; CHECK-LABEL: fptou_v4f64_v4i64:
784 ; CHECK: // %bb.0: // %entry
785 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
786 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
787 ; CHECK-NEXT: ret
788 entry:
789 %c = fptoui <4 x double> %a to <4 x i64>
790 ret <4 x i64> %c
791 }
793 define <8 x i64> @fptos_v8f64_v8i64(<8 x double> %a) {
794 ; CHECK-LABEL: fptos_v8f64_v8i64:
795 ; CHECK: // %bb.0: // %entry
796 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
797 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
798 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
799 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
800 ; CHECK-NEXT: ret
801 entry:
802 %c = fptosi <8 x double> %a to <8 x i64>
803 ret <8 x i64> %c
804 }
806 define <8 x i64> @fptou_v8f64_v8i64(<8 x double> %a) {
807 ; CHECK-LABEL: fptou_v8f64_v8i64:
808 ; CHECK: // %bb.0: // %entry
809 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
810 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
811 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
812 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
813 ; CHECK-NEXT: ret
814 entry:
815 %c = fptoui <8 x double> %a to <8 x i64>
816 ret <8 x i64> %c
817 }
819 define <16 x i64> @fptos_v16f64_v16i64(<16 x double> %a) {
820 ; CHECK-LABEL: fptos_v16f64_v16i64:
821 ; CHECK: // %bb.0: // %entry
822 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
823 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
824 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
825 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
826 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
827 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
828 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
829 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
830 ; CHECK-NEXT: ret
831 entry:
832 %c = fptosi <16 x double> %a to <16 x i64>
833 ret <16 x i64> %c
834 }
836 define <16 x i64> @fptou_v16f64_v16i64(<16 x double> %a) {
837 ; CHECK-LABEL: fptou_v16f64_v16i64:
838 ; CHECK: // %bb.0: // %entry
839 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
840 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
841 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
842 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
843 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
844 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
845 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
846 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
847 ; CHECK-NEXT: ret
848 entry:
849 %c = fptoui <16 x double> %a to <16 x i64>
850 ret <16 x i64> %c
851 }
853 define <32 x i64> @fptos_v32f64_v32i64(<32 x double> %a) {
854 ; CHECK-SD-LABEL: fptos_v32f64_v32i64:
855 ; CHECK-SD: // %bb.0: // %entry
856 ; CHECK-SD-NEXT: ldp q17, q16, [sp, #96]
857 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
858 ; CHECK-SD-NEXT: ldp q19, q18, [sp, #64]
859 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
860 ; CHECK-SD-NEXT: ldp q21, q20, [sp, #32]
861 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
862 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
863 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
864 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
865 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
866 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
867 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
868 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
869 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
870 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
871 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
872 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
873 ; CHECK-SD-NEXT: stp q5, q6, [x8, #80]
874 ; CHECK-SD-NEXT: str q16, [x8, #240]
875 ; CHECK-SD-NEXT: ldp q22, q16, [sp]
876 ; CHECK-SD-NEXT: stp q3, q4, [x8, #48]
877 ; CHECK-SD-NEXT: stp q20, q19, [x8, #176]
878 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
879 ; CHECK-SD-NEXT: stp q1, q2, [x8, #16]
880 ; CHECK-SD-NEXT: stp q18, q17, [x8, #208]
881 ; CHECK-SD-NEXT: fcvtzs v17.2d, v22.2d
882 ; CHECK-SD-NEXT: str q0, [x8]
883 ; CHECK-SD-NEXT: stp q16, q21, [x8, #144]
884 ; CHECK-SD-NEXT: stp q7, q17, [x8, #112]
885 ; CHECK-SD-NEXT: ret
886 ;
887 ; CHECK-GI-LABEL: fptos_v32f64_v32i64:
888 ; CHECK-GI: // %bb.0: // %entry
889 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
890 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
891 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
892 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
893 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
894 ; CHECK-GI-NEXT: stp q0, q1, [x8]
895 ; CHECK-GI-NEXT: fcvtzs v0.2d, v5.2d
896 ; CHECK-GI-NEXT: fcvtzs v1.2d, v6.2d
897 ; CHECK-GI-NEXT: str q2, [x8, #32]
898 ; CHECK-GI-NEXT: ldp q2, q5, [sp]
899 ; CHECK-GI-NEXT: fcvtzs v6.2d, v7.2d
900 ; CHECK-GI-NEXT: stp q3, q4, [x8, #48]
901 ; CHECK-GI-NEXT: ldp q3, q4, [sp, #32]
902 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
903 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
904 ; CHECK-GI-NEXT: stp q0, q1, [x8, #80]
905 ; CHECK-GI-NEXT: fcvtzs v0.2d, v3.2d
906 ; CHECK-GI-NEXT: ldp q1, q3, [sp, #64]
907 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
908 ; CHECK-GI-NEXT: stp q6, q2, [x8, #112]
909 ; CHECK-GI-NEXT: ldp q2, q6, [sp, #96]
910 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
911 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
912 ; CHECK-GI-NEXT: stp q5, q0, [x8, #144]
913 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
914 ; CHECK-GI-NEXT: fcvtzs v0.2d, v6.2d
915 ; CHECK-GI-NEXT: stp q4, q1, [x8, #176]
916 ; CHECK-GI-NEXT: stp q3, q2, [x8, #208]
917 ; CHECK-GI-NEXT: str q0, [x8, #240]
918 ; CHECK-GI-NEXT: ret
919 entry:
920 %c = fptosi <32 x double> %a to <32 x i64>
921 ret <32 x i64> %c
922 }
924 define <32 x i64> @fptou_v32f64_v32i64(<32 x double> %a) {
925 ; CHECK-SD-LABEL: fptou_v32f64_v32i64:
926 ; CHECK-SD: // %bb.0: // %entry
927 ; CHECK-SD-NEXT: ldp q17, q16, [sp, #96]
928 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
929 ; CHECK-SD-NEXT: ldp q19, q18, [sp, #64]
930 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
931 ; CHECK-SD-NEXT: ldp q21, q20, [sp, #32]
932 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
933 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
934 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
935 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
936 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
937 ; CHECK-SD-NEXT: fcvtzu v19.2d, v19.2d
938 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
939 ; CHECK-SD-NEXT: fcvtzu v20.2d, v20.2d
940 ; CHECK-SD-NEXT: fcvtzu v21.2d, v21.2d
941 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
942 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
943 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
944 ; CHECK-SD-NEXT: stp q5, q6, [x8, #80]
945 ; CHECK-SD-NEXT: str q16, [x8, #240]
946 ; CHECK-SD-NEXT: ldp q22, q16, [sp]
947 ; CHECK-SD-NEXT: stp q3, q4, [x8, #48]
948 ; CHECK-SD-NEXT: stp q20, q19, [x8, #176]
949 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
950 ; CHECK-SD-NEXT: stp q1, q2, [x8, #16]
951 ; CHECK-SD-NEXT: stp q18, q17, [x8, #208]
952 ; CHECK-SD-NEXT: fcvtzu v17.2d, v22.2d
953 ; CHECK-SD-NEXT: str q0, [x8]
954 ; CHECK-SD-NEXT: stp q16, q21, [x8, #144]
955 ; CHECK-SD-NEXT: stp q7, q17, [x8, #112]
956 ; CHECK-SD-NEXT: ret
957 ;
958 ; CHECK-GI-LABEL: fptou_v32f64_v32i64:
959 ; CHECK-GI: // %bb.0: // %entry
960 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
961 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
962 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
963 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
964 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
965 ; CHECK-GI-NEXT: stp q0, q1, [x8]
966 ; CHECK-GI-NEXT: fcvtzu v0.2d, v5.2d
967 ; CHECK-GI-NEXT: fcvtzu v1.2d, v6.2d
968 ; CHECK-GI-NEXT: str q2, [x8, #32]
969 ; CHECK-GI-NEXT: ldp q2, q5, [sp]
970 ; CHECK-GI-NEXT: fcvtzu v6.2d, v7.2d
971 ; CHECK-GI-NEXT: stp q3, q4, [x8, #48]
972 ; CHECK-GI-NEXT: ldp q3, q4, [sp, #32]
973 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
974 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
975 ; CHECK-GI-NEXT: stp q0, q1, [x8, #80]
976 ; CHECK-GI-NEXT: fcvtzu v0.2d, v3.2d
977 ; CHECK-GI-NEXT: ldp q1, q3, [sp, #64]
978 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
979 ; CHECK-GI-NEXT: stp q6, q2, [x8, #112]
980 ; CHECK-GI-NEXT: ldp q2, q6, [sp, #96]
981 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
982 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
983 ; CHECK-GI-NEXT: stp q5, q0, [x8, #144]
984 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
985 ; CHECK-GI-NEXT: fcvtzu v0.2d, v6.2d
986 ; CHECK-GI-NEXT: stp q4, q1, [x8, #176]
987 ; CHECK-GI-NEXT: stp q3, q2, [x8, #208]
988 ; CHECK-GI-NEXT: str q0, [x8, #240]
989 ; CHECK-GI-NEXT: ret
990 entry:
991 %c = fptoui <32 x double> %a to <32 x i64>
992 ret <32 x i64> %c
993 }
995 define <2 x i32> @fptos_v2f64_v2i32(<2 x double> %a) {
996 ; CHECK-LABEL: fptos_v2f64_v2i32:
997 ; CHECK: // %bb.0: // %entry
998 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
999 ; CHECK-NEXT: xtn v0.2s, v0.2d
1000 ; CHECK-NEXT: ret
1001 entry:
1002 %c = fptosi <2 x double> %a to <2 x i32>
1003 ret <2 x i32> %c
1004 }
1006 define <2 x i32> @fptou_v2f64_v2i32(<2 x double> %a) {
1007 ; CHECK-LABEL: fptou_v2f64_v2i32:
1008 ; CHECK: // %bb.0: // %entry
1009 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1010 ; CHECK-NEXT: xtn v0.2s, v0.2d
1011 ; CHECK-NEXT: ret
1012 entry:
1013 %c = fptoui <2 x double> %a to <2 x i32>
1014 ret <2 x i32> %c
1015 }
1017 define <3 x i32> @fptos_v3f64_v3i32(<3 x double> %a) {
1018 ; CHECK-LABEL: fptos_v3f64_v3i32:
1019 ; CHECK: // %bb.0: // %entry
1020 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1021 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1022 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1023 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1024 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1025 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1026 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1027 ; CHECK-NEXT: ret
1028 entry:
1029 %c = fptosi <3 x double> %a to <3 x i32>
1030 ret <3 x i32> %c
1031 }
1033 define <3 x i32> @fptou_v3f64_v3i32(<3 x double> %a) {
1034 ; CHECK-LABEL: fptou_v3f64_v3i32:
1035 ; CHECK: // %bb.0: // %entry
1036 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1037 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1038 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1039 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1040 ; CHECK-NEXT: fcvtzu v1.2d, v2.2d
1041 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1042 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1043 ; CHECK-NEXT: ret
1044 entry:
1045 %c = fptoui <3 x double> %a to <3 x i32>
1046 ret <3 x i32> %c
1047 }
1049 define <4 x i32> @fptos_v4f64_v4i32(<4 x double> %a) {
1050 ; CHECK-SD-LABEL: fptos_v4f64_v4i32:
1051 ; CHECK-SD: // %bb.0: // %entry
1052 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1053 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1054 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1055 ; CHECK-SD-NEXT: ret
1056 ;
1057 ; CHECK-GI-LABEL: fptos_v4f64_v4i32:
1058 ; CHECK-GI: // %bb.0: // %entry
1059 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1060 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1061 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1062 ; CHECK-GI-NEXT: ret
1063 entry:
1064 %c = fptosi <4 x double> %a to <4 x i32>
1065 ret <4 x i32> %c
1066 }
1068 define <4 x i32> @fptou_v4f64_v4i32(<4 x double> %a) {
1069 ; CHECK-SD-LABEL: fptou_v4f64_v4i32:
1070 ; CHECK-SD: // %bb.0: // %entry
1071 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1072 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1073 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1074 ; CHECK-SD-NEXT: ret
1075 ;
1076 ; CHECK-GI-LABEL: fptou_v4f64_v4i32:
1077 ; CHECK-GI: // %bb.0: // %entry
1078 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1079 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1080 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1081 ; CHECK-GI-NEXT: ret
1082 entry:
1083 %c = fptoui <4 x double> %a to <4 x i32>
1084 ret <4 x i32> %c
1085 }
1087 define <8 x i32> @fptos_v8f64_v8i32(<8 x double> %a) {
1088 ; CHECK-SD-LABEL: fptos_v8f64_v8i32:
1089 ; CHECK-SD: // %bb.0: // %entry
1090 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1091 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1092 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1093 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1094 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1095 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1096 ; CHECK-SD-NEXT: ret
1097 ;
1098 ; CHECK-GI-LABEL: fptos_v8f64_v8i32:
1099 ; CHECK-GI: // %bb.0: // %entry
1100 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1101 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1102 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1103 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1104 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1105 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1106 ; CHECK-GI-NEXT: ret
1107 entry:
1108 %c = fptosi <8 x double> %a to <8 x i32>
1109 ret <8 x i32> %c
1110 }
1112 define <8 x i32> @fptou_v8f64_v8i32(<8 x double> %a) {
1113 ; CHECK-SD-LABEL: fptou_v8f64_v8i32:
1114 ; CHECK-SD: // %bb.0: // %entry
1115 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1116 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1117 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1118 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1119 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1120 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1121 ; CHECK-SD-NEXT: ret
1122 ;
1123 ; CHECK-GI-LABEL: fptou_v8f64_v8i32:
1124 ; CHECK-GI: // %bb.0: // %entry
1125 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1126 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1127 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1128 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1129 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1130 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1131 ; CHECK-GI-NEXT: ret
1132 entry:
1133 %c = fptoui <8 x double> %a to <8 x i32>
1134 ret <8 x i32> %c
1135 }
1137 define <16 x i32> @fptos_v16f64_v16i32(<16 x double> %a) {
1138 ; CHECK-SD-LABEL: fptos_v16f64_v16i32:
1139 ; CHECK-SD: // %bb.0: // %entry
1140 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1141 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1142 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1143 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1144 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1145 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1146 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1147 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1148 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1149 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1150 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1151 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1152 ; CHECK-SD-NEXT: ret
1153 ;
1154 ; CHECK-GI-LABEL: fptos_v16f64_v16i32:
1155 ; CHECK-GI: // %bb.0: // %entry
1156 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1157 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1158 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1159 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1160 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1161 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1162 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1163 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1164 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1165 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1166 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1167 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1168 ; CHECK-GI-NEXT: ret
1169 entry:
1170 %c = fptosi <16 x double> %a to <16 x i32>
1171 ret <16 x i32> %c
1172 }
1174 define <16 x i32> @fptou_v16f64_v16i32(<16 x double> %a) {
1175 ; CHECK-SD-LABEL: fptou_v16f64_v16i32:
1176 ; CHECK-SD: // %bb.0: // %entry
1177 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1178 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1179 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1180 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1181 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
1182 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
1183 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
1184 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
1185 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1186 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1187 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1188 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1189 ; CHECK-SD-NEXT: ret
1190 ;
1191 ; CHECK-GI-LABEL: fptou_v16f64_v16i32:
1192 ; CHECK-GI: // %bb.0: // %entry
1193 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1194 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1195 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1196 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1197 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1198 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1199 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1200 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1201 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1202 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1203 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1204 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1205 ; CHECK-GI-NEXT: ret
1206 entry:
1207 %c = fptoui <16 x double> %a to <16 x i32>
1208 ret <16 x i32> %c
1209 }
1211 define <32 x i32> @fptos_v32f64_v32i32(<32 x double> %a) {
1212 ; CHECK-SD-LABEL: fptos_v32f64_v32i32:
1213 ; CHECK-SD: // %bb.0: // %entry
1214 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #96]
1215 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1216 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #64]
1217 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1218 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #32]
1219 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1220 ; CHECK-SD-NEXT: ldp q22, q23, [sp]
1221 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1222 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1223 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1224 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1225 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1226 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1227 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1228 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
1229 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
1230 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
1231 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1232 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1233 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1234 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1235 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1236 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1237 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1238 ; CHECK-SD-NEXT: uzp1 v5.4s, v20.4s, v21.4s
1239 ; CHECK-SD-NEXT: uzp1 v4.4s, v22.4s, v23.4s
1240 ; CHECK-SD-NEXT: uzp1 v6.4s, v18.4s, v19.4s
1241 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
1242 ; CHECK-SD-NEXT: ret
1243 ;
1244 ; CHECK-GI-LABEL: fptos_v32f64_v32i32:
1245 ; CHECK-GI: // %bb.0: // %entry
1246 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1247 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1248 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1249 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1250 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1251 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1252 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1253 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1254 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1255 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1256 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1257 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1258 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
1259 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
1260 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
1261 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
1262 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
1263 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
1264 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
1265 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
1266 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1267 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1268 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1269 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1270 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1271 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1272 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1273 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1274 ; CHECK-GI-NEXT: ret
1275 entry:
1276 %c = fptosi <32 x double> %a to <32 x i32>
1277 ret <32 x i32> %c
1278 }
1280 define <32 x i32> @fptou_v32f64_v32i32(<32 x double> %a) {
1281 ; CHECK-SD-LABEL: fptou_v32f64_v32i32:
1282 ; CHECK-SD: // %bb.0: // %entry
1283 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #96]
1284 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1285 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #64]
1286 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1287 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #32]
1288 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1289 ; CHECK-SD-NEXT: ldp q22, q23, [sp]
1290 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1291 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
1292 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
1293 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
1294 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
1295 ; CHECK-SD-NEXT: fcvtzu v21.2d, v21.2d
1296 ; CHECK-SD-NEXT: fcvtzu v20.2d, v20.2d
1297 ; CHECK-SD-NEXT: fcvtzu v23.2d, v23.2d
1298 ; CHECK-SD-NEXT: fcvtzu v22.2d, v22.2d
1299 ; CHECK-SD-NEXT: fcvtzu v19.2d, v19.2d
1300 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
1301 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
1302 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
1303 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1304 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1305 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1306 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1307 ; CHECK-SD-NEXT: uzp1 v5.4s, v20.4s, v21.4s
1308 ; CHECK-SD-NEXT: uzp1 v4.4s, v22.4s, v23.4s
1309 ; CHECK-SD-NEXT: uzp1 v6.4s, v18.4s, v19.4s
1310 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
1311 ; CHECK-SD-NEXT: ret
1312 ;
1313 ; CHECK-GI-LABEL: fptou_v32f64_v32i32:
1314 ; CHECK-GI: // %bb.0: // %entry
1315 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1316 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1317 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1318 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1319 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1320 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1321 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1322 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1323 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1324 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1325 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1326 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1327 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
1328 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
1329 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
1330 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
1331 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
1332 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
1333 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
1334 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
1335 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1336 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1337 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1338 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1339 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1340 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1341 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1342 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1343 ; CHECK-GI-NEXT: ret
1344 entry:
1345 %c = fptoui <32 x double> %a to <32 x i32>
1346 ret <32 x i32> %c
1347 }
1349 define <2 x i16> @fptos_v2f64_v2i16(<2 x double> %a) {
1350 ; CHECK-LABEL: fptos_v2f64_v2i16:
1351 ; CHECK: // %bb.0: // %entry
1352 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1353 ; CHECK-NEXT: xtn v0.2s, v0.2d
1354 ; CHECK-NEXT: ret
1355 entry:
1356 %c = fptosi <2 x double> %a to <2 x i16>
1357 ret <2 x i16> %c
1358 }
1360 define <2 x i16> @fptou_v2f64_v2i16(<2 x double> %a) {
1361 ; CHECK-SD-LABEL: fptou_v2f64_v2i16:
1362 ; CHECK-SD: // %bb.0: // %entry
1363 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1364 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
1365 ; CHECK-SD-NEXT: ret
1366 ;
1367 ; CHECK-GI-LABEL: fptou_v2f64_v2i16:
1368 ; CHECK-GI: // %bb.0: // %entry
1369 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1370 ; CHECK-GI-NEXT: xtn v0.2s, v0.2d
1371 ; CHECK-GI-NEXT: ret
1372 entry:
1373 %c = fptoui <2 x double> %a to <2 x i16>
1374 ret <2 x i16> %c
1375 }
1377 define <3 x i16> @fptos_v3f64_v3i16(<3 x double> %a) {
1378 ; CHECK-LABEL: fptos_v3f64_v3i16:
1379 ; CHECK: // %bb.0: // %entry
1380 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1381 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1382 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1383 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1384 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1385 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1386 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1387 ; CHECK-NEXT: xtn v0.4h, v0.4s
1388 ; CHECK-NEXT: ret
1389 entry:
1390 %c = fptosi <3 x double> %a to <3 x i16>
1391 ret <3 x i16> %c
1392 }
1394 define <3 x i16> @fptou_v3f64_v3i16(<3 x double> %a) {
1395 ; CHECK-SD-LABEL: fptou_v3f64_v3i16:
1396 ; CHECK-SD: // %bb.0: // %entry
1397 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1398 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1399 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1400 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1401 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1402 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1403 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1404 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1405 ; CHECK-SD-NEXT: ret
1406 ;
1407 ; CHECK-GI-LABEL: fptou_v3f64_v3i16:
1408 ; CHECK-GI: // %bb.0: // %entry
1409 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1410 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1411 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1412 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1413 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
1414 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1415 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1416 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1417 ; CHECK-GI-NEXT: ret
1418 entry:
1419 %c = fptoui <3 x double> %a to <3 x i16>
1420 ret <3 x i16> %c
1421 }
1423 define <4 x i16> @fptos_v4f64_v4i16(<4 x double> %a) {
1424 ; CHECK-SD-LABEL: fptos_v4f64_v4i16:
1425 ; CHECK-SD: // %bb.0: // %entry
1426 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1427 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1428 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1429 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1430 ; CHECK-SD-NEXT: ret
1431 ;
1432 ; CHECK-GI-LABEL: fptos_v4f64_v4i16:
1433 ; CHECK-GI: // %bb.0: // %entry
1434 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1435 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1436 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1437 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1438 ; CHECK-GI-NEXT: ret
1439 entry:
1440 %c = fptosi <4 x double> %a to <4 x i16>
1441 ret <4 x i16> %c
1442 }
1444 define <4 x i16> @fptou_v4f64_v4i16(<4 x double> %a) {
1445 ; CHECK-SD-LABEL: fptou_v4f64_v4i16:
1446 ; CHECK-SD: // %bb.0: // %entry
1447 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1448 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1449 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1450 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1451 ; CHECK-SD-NEXT: ret
1452 ;
1453 ; CHECK-GI-LABEL: fptou_v4f64_v4i16:
1454 ; CHECK-GI: // %bb.0: // %entry
1455 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1456 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1457 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1458 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1459 ; CHECK-GI-NEXT: ret
1460 entry:
1461 %c = fptoui <4 x double> %a to <4 x i16>
1462 ret <4 x i16> %c
1463 }
1465 define <8 x i16> @fptos_v8f64_v8i16(<8 x double> %a) {
1466 ; CHECK-SD-LABEL: fptos_v8f64_v8i16:
1467 ; CHECK-SD: // %bb.0: // %entry
1468 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1469 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1470 ; CHECK-SD-NEXT: adrp x8, .LCPI70_0
1471 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1472 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1473 ; CHECK-SD-NEXT: xtn v6.2s, v3.2d
1474 ; CHECK-SD-NEXT: xtn v5.2s, v2.2d
1475 ; CHECK-SD-NEXT: xtn v4.2s, v1.2d
1476 ; CHECK-SD-NEXT: xtn v3.2s, v0.2d
1477 ; CHECK-SD-NEXT: ldr q0, [x8, :lo12:.LCPI70_0]
1478 ; CHECK-SD-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1479 ; CHECK-SD-NEXT: ret
1480 ;
1481 ; CHECK-GI-LABEL: fptos_v8f64_v8i16:
1482 ; CHECK-GI: // %bb.0: // %entry
1483 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1484 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1485 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1486 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1487 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1488 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1489 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1490 ; CHECK-GI-NEXT: ret
1491 entry:
1492 %c = fptosi <8 x double> %a to <8 x i16>
1493 ret <8 x i16> %c
1494 }
1496 define <8 x i16> @fptou_v8f64_v8i16(<8 x double> %a) {
1497 ; CHECK-SD-LABEL: fptou_v8f64_v8i16:
1498 ; CHECK-SD: // %bb.0: // %entry
1499 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1500 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1501 ; CHECK-SD-NEXT: adrp x8, .LCPI71_0
1502 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1503 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1504 ; CHECK-SD-NEXT: xtn v6.2s, v3.2d
1505 ; CHECK-SD-NEXT: xtn v5.2s, v2.2d
1506 ; CHECK-SD-NEXT: xtn v4.2s, v1.2d
1507 ; CHECK-SD-NEXT: xtn v3.2s, v0.2d
1508 ; CHECK-SD-NEXT: ldr q0, [x8, :lo12:.LCPI71_0]
1509 ; CHECK-SD-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1510 ; CHECK-SD-NEXT: ret
1511 ;
1512 ; CHECK-GI-LABEL: fptou_v8f64_v8i16:
1513 ; CHECK-GI: // %bb.0: // %entry
1514 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1515 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1516 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1517 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1518 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1519 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1520 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1521 ; CHECK-GI-NEXT: ret
1522 entry:
1523 %c = fptoui <8 x double> %a to <8 x i16>
1524 ret <8 x i16> %c
1525 }
1527 define <16 x i16> @fptos_v16f64_v16i16(<16 x double> %a) {
1528 ; CHECK-SD-LABEL: fptos_v16f64_v16i16:
1529 ; CHECK-SD: // %bb.0: // %entry
1530 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1531 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1532 ; CHECK-SD-NEXT: adrp x8, .LCPI72_0
1533 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1534 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1535 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1536 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1537 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1538 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1539 ; CHECK-SD-NEXT: xtn v19.2s, v3.2d
1540 ; CHECK-SD-NEXT: xtn v23.2s, v7.2d
1541 ; CHECK-SD-NEXT: xtn v18.2s, v2.2d
1542 ; CHECK-SD-NEXT: xtn v22.2s, v6.2d
1543 ; CHECK-SD-NEXT: xtn v17.2s, v1.2d
1544 ; CHECK-SD-NEXT: xtn v21.2s, v5.2d
1545 ; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI72_0]
1546 ; CHECK-SD-NEXT: xtn v16.2s, v0.2d
1547 ; CHECK-SD-NEXT: xtn v20.2s, v4.2d
1548 ; CHECK-SD-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1549 ; CHECK-SD-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1550 ; CHECK-SD-NEXT: ret
1551 ;
1552 ; CHECK-GI-LABEL: fptos_v16f64_v16i16:
1553 ; CHECK-GI: // %bb.0: // %entry
1554 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1555 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1556 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1557 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1558 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1559 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1560 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1561 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1562 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1563 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1564 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1565 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1566 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1567 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1568 ; CHECK-GI-NEXT: ret
1569 entry:
1570 %c = fptosi <16 x double> %a to <16 x i16>
1571 ret <16 x i16> %c
1572 }
1574 define <16 x i16> @fptou_v16f64_v16i16(<16 x double> %a) {
1575 ; CHECK-SD-LABEL: fptou_v16f64_v16i16:
1576 ; CHECK-SD: // %bb.0: // %entry
1577 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1578 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1579 ; CHECK-SD-NEXT: adrp x8, .LCPI73_0
1580 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1581 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1582 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1583 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1584 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1585 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1586 ; CHECK-SD-NEXT: xtn v19.2s, v3.2d
1587 ; CHECK-SD-NEXT: xtn v23.2s, v7.2d
1588 ; CHECK-SD-NEXT: xtn v18.2s, v2.2d
1589 ; CHECK-SD-NEXT: xtn v22.2s, v6.2d
1590 ; CHECK-SD-NEXT: xtn v17.2s, v1.2d
1591 ; CHECK-SD-NEXT: xtn v21.2s, v5.2d
1592 ; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI73_0]
1593 ; CHECK-SD-NEXT: xtn v16.2s, v0.2d
1594 ; CHECK-SD-NEXT: xtn v20.2s, v4.2d
1595 ; CHECK-SD-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1596 ; CHECK-SD-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1597 ; CHECK-SD-NEXT: ret
1598 ;
1599 ; CHECK-GI-LABEL: fptou_v16f64_v16i16:
1600 ; CHECK-GI: // %bb.0: // %entry
1601 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1602 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1603 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1604 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1605 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1606 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1607 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1608 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1609 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1610 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1611 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1612 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1613 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1614 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1615 ; CHECK-GI-NEXT: ret
1616 entry:
1617 %c = fptoui <16 x double> %a to <16 x i16>
1618 ret <16 x i16> %c
1619 }
1621 define <32 x i16> @fptos_v32f64_v32i16(<32 x double> %a) {
1622 ; CHECK-SD-LABEL: fptos_v32f64_v32i16:
1623 ; CHECK-SD: // %bb.0: // %entry
1624 ; CHECK-SD-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1625 ; CHECK-SD-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1626 ; CHECK-SD-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1627 ; CHECK-SD-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1628 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
1629 ; CHECK-SD-NEXT: .cfi_offset b8, -8
1630 ; CHECK-SD-NEXT: .cfi_offset b9, -16
1631 ; CHECK-SD-NEXT: .cfi_offset b10, -24
1632 ; CHECK-SD-NEXT: .cfi_offset b11, -32
1633 ; CHECK-SD-NEXT: .cfi_offset b12, -40
1634 ; CHECK-SD-NEXT: .cfi_offset b13, -48
1635 ; CHECK-SD-NEXT: .cfi_offset b14, -56
1636 ; CHECK-SD-NEXT: .cfi_offset b15, -64
1637 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1638 ; CHECK-SD-NEXT: fcvtzs v18.2d, v2.2d
1639 ; CHECK-SD-NEXT: adrp x8, .LCPI74_0
1640 ; CHECK-SD-NEXT: fcvtzs v19.2d, v1.2d
1641 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #160]
1642 ; CHECK-SD-NEXT: fcvtzs v22.2d, v0.2d
1643 ; CHECK-SD-NEXT: ldp q23, q24, [sp, #96]
1644 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1645 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #128]
1646 ; CHECK-SD-NEXT: xtn v3.2s, v3.2d
1647 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1648 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1649 ; CHECK-SD-NEXT: xtn v2.2s, v18.2d
1650 ; CHECK-SD-NEXT: ldp q18, q25, [sp, #64]
1651 ; CHECK-SD-NEXT: xtn v1.2s, v19.2d
1652 ; CHECK-SD-NEXT: fcvtzs v19.2d, v24.2d
1653 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1654 ; CHECK-SD-NEXT: xtn v0.2s, v22.2d
1655 ; CHECK-SD-NEXT: fcvtzs v22.2d, v23.2d
1656 ; CHECK-SD-NEXT: xtn v29.2s, v7.2d
1657 ; CHECK-SD-NEXT: fcvtzs v7.2d, v25.2d
1658 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1659 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1660 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1661 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1662 ; CHECK-SD-NEXT: xtn v15.2s, v21.2d
1663 ; CHECK-SD-NEXT: xtn v11.2s, v19.2d
1664 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1665 ; CHECK-SD-NEXT: xtn v14.2s, v20.2d
1666 ; CHECK-SD-NEXT: xtn v10.2s, v22.2d
1667 ; CHECK-SD-NEXT: xtn v13.2s, v17.2d
1668 ; CHECK-SD-NEXT: xtn v9.2s, v7.2d
1669 ; CHECK-SD-NEXT: xtn v28.2s, v6.2d
1670 ; CHECK-SD-NEXT: xtn v8.2s, v18.2d
1671 ; CHECK-SD-NEXT: xtn v12.2s, v16.2d
1672 ; CHECK-SD-NEXT: xtn v27.2s, v5.2d
1673 ; CHECK-SD-NEXT: xtn v26.2s, v4.2d
1674 ; CHECK-SD-NEXT: ldr q4, [x8, :lo12:.LCPI74_0]
1675 ; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1676 ; CHECK-SD-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1677 ; CHECK-SD-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1678 ; CHECK-SD-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1679 ; CHECK-SD-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1680 ; CHECK-SD-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1681 ; CHECK-SD-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1682 ; CHECK-SD-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1683 ; CHECK-SD-NEXT: ret
1684 ;
1685 ; CHECK-GI-LABEL: fptos_v32f64_v32i16:
1686 ; CHECK-GI: // %bb.0: // %entry
1687 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1688 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1689 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1690 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1691 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1692 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1693 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1694 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1695 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1696 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1697 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1698 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1699 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
1700 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
1701 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
1702 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
1703 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
1704 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
1705 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
1706 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
1707 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1708 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1709 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1710 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1711 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1712 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1713 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1714 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1715 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1716 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1717 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
1718 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
1719 ; CHECK-GI-NEXT: ret
1720 entry:
1721 %c = fptosi <32 x double> %a to <32 x i16>
1722 ret <32 x i16> %c
1723 }
1725 define <32 x i16> @fptou_v32f64_v32i16(<32 x double> %a) {
1726 ; CHECK-SD-LABEL: fptou_v32f64_v32i16:
1727 ; CHECK-SD: // %bb.0: // %entry
1728 ; CHECK-SD-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1729 ; CHECK-SD-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1730 ; CHECK-SD-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1731 ; CHECK-SD-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1732 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
1733 ; CHECK-SD-NEXT: .cfi_offset b8, -8
1734 ; CHECK-SD-NEXT: .cfi_offset b9, -16
1735 ; CHECK-SD-NEXT: .cfi_offset b10, -24
1736 ; CHECK-SD-NEXT: .cfi_offset b11, -32
1737 ; CHECK-SD-NEXT: .cfi_offset b12, -40
1738 ; CHECK-SD-NEXT: .cfi_offset b13, -48
1739 ; CHECK-SD-NEXT: .cfi_offset b14, -56
1740 ; CHECK-SD-NEXT: .cfi_offset b15, -64
1741 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1742 ; CHECK-SD-NEXT: fcvtzs v18.2d, v2.2d
1743 ; CHECK-SD-NEXT: adrp x8, .LCPI75_0
1744 ; CHECK-SD-NEXT: fcvtzs v19.2d, v1.2d
1745 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #160]
1746 ; CHECK-SD-NEXT: fcvtzs v22.2d, v0.2d
1747 ; CHECK-SD-NEXT: ldp q23, q24, [sp, #96]
1748 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1749 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #128]
1750 ; CHECK-SD-NEXT: xtn v3.2s, v3.2d
1751 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1752 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1753 ; CHECK-SD-NEXT: xtn v2.2s, v18.2d
1754 ; CHECK-SD-NEXT: ldp q18, q25, [sp, #64]
1755 ; CHECK-SD-NEXT: xtn v1.2s, v19.2d
1756 ; CHECK-SD-NEXT: fcvtzs v19.2d, v24.2d
1757 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1758 ; CHECK-SD-NEXT: xtn v0.2s, v22.2d
1759 ; CHECK-SD-NEXT: fcvtzs v22.2d, v23.2d
1760 ; CHECK-SD-NEXT: xtn v29.2s, v7.2d
1761 ; CHECK-SD-NEXT: fcvtzs v7.2d, v25.2d
1762 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1763 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1764 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1765 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1766 ; CHECK-SD-NEXT: xtn v15.2s, v21.2d
1767 ; CHECK-SD-NEXT: xtn v11.2s, v19.2d
1768 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1769 ; CHECK-SD-NEXT: xtn v14.2s, v20.2d
1770 ; CHECK-SD-NEXT: xtn v10.2s, v22.2d
1771 ; CHECK-SD-NEXT: xtn v13.2s, v17.2d
1772 ; CHECK-SD-NEXT: xtn v9.2s, v7.2d
1773 ; CHECK-SD-NEXT: xtn v28.2s, v6.2d
1774 ; CHECK-SD-NEXT: xtn v8.2s, v18.2d
1775 ; CHECK-SD-NEXT: xtn v12.2s, v16.2d
1776 ; CHECK-SD-NEXT: xtn v27.2s, v5.2d
1777 ; CHECK-SD-NEXT: xtn v26.2s, v4.2d
1778 ; CHECK-SD-NEXT: ldr q4, [x8, :lo12:.LCPI75_0]
1779 ; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1780 ; CHECK-SD-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1781 ; CHECK-SD-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1782 ; CHECK-SD-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1783 ; CHECK-SD-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1784 ; CHECK-SD-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1785 ; CHECK-SD-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1786 ; CHECK-SD-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1787 ; CHECK-SD-NEXT: ret
1788 ;
1789 ; CHECK-GI-LABEL: fptou_v32f64_v32i16:
1790 ; CHECK-GI: // %bb.0: // %entry
1791 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1792 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1793 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1794 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1795 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1796 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1797 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1798 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1799 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1800 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1801 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1802 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1803 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
1804 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
1805 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
1806 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
1807 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
1808 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
1809 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
1810 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
1811 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1812 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1813 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1814 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1815 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1816 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1817 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1818 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1819 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1820 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1821 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
1822 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
1823 ; CHECK-GI-NEXT: ret
1824 entry:
1825 %c = fptoui <32 x double> %a to <32 x i16>
1826 ret <32 x i16> %c
1827 }
1829 define <2 x i8> @fptos_v2f64_v2i8(<2 x double> %a) {
1830 ; CHECK-LABEL: fptos_v2f64_v2i8:
1831 ; CHECK: // %bb.0: // %entry
1832 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1833 ; CHECK-NEXT: xtn v0.2s, v0.2d
1834 ; CHECK-NEXT: ret
1835 entry:
1836 %c = fptosi <2 x double> %a to <2 x i8>
1837 ret <2 x i8> %c
1838 }
1840 define <2 x i8> @fptou_v2f64_v2i8(<2 x double> %a) {
1841 ; CHECK-SD-LABEL: fptou_v2f64_v2i8:
1842 ; CHECK-SD: // %bb.0: // %entry
1843 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1844 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
1845 ; CHECK-SD-NEXT: ret
1846 ;
1847 ; CHECK-GI-LABEL: fptou_v2f64_v2i8:
1848 ; CHECK-GI: // %bb.0: // %entry
1849 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1850 ; CHECK-GI-NEXT: xtn v0.2s, v0.2d
1851 ; CHECK-GI-NEXT: ret
1852 entry:
1853 %c = fptoui <2 x double> %a to <2 x i8>
1854 ret <2 x i8> %c
1855 }
1857 define <3 x i8> @fptos_v3f64_v3i8(<3 x double> %a) {
1858 ; CHECK-SD-LABEL: fptos_v3f64_v3i8:
1859 ; CHECK-SD: // %bb.0: // %entry
1860 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1861 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1862 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1863 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1864 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1865 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1866 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1867 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1868 ; CHECK-SD-NEXT: umov w0, v0.h[0]
1869 ; CHECK-SD-NEXT: umov w1, v0.h[1]
1870 ; CHECK-SD-NEXT: umov w2, v0.h[2]
1871 ; CHECK-SD-NEXT: ret
1872 ;
1873 ; CHECK-GI-LABEL: fptos_v3f64_v3i8:
1874 ; CHECK-GI: // %bb.0: // %entry
1875 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1876 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1877 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1878 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1879 ; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d
1880 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1881 ; CHECK-GI-NEXT: fmov x2, d1
1882 ; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2
1883 ; CHECK-GI-NEXT: mov d2, v0.d[1]
1884 ; CHECK-GI-NEXT: fmov x0, d0
1885 ; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0
1886 ; CHECK-GI-NEXT: fmov x1, d2
1887 ; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1
1888 ; CHECK-GI-NEXT: ret
1889 entry:
1890 %c = fptosi <3 x double> %a to <3 x i8>
1891 ret <3 x i8> %c
1892 }
1894 define <3 x i8> @fptou_v3f64_v3i8(<3 x double> %a) {
1895 ; CHECK-SD-LABEL: fptou_v3f64_v3i8:
1896 ; CHECK-SD: // %bb.0: // %entry
1897 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1898 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1899 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1900 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1901 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1902 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1903 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1904 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1905 ; CHECK-SD-NEXT: umov w0, v0.h[0]
1906 ; CHECK-SD-NEXT: umov w1, v0.h[1]
1907 ; CHECK-SD-NEXT: umov w2, v0.h[2]
1908 ; CHECK-SD-NEXT: ret
1909 ;
1910 ; CHECK-GI-LABEL: fptou_v3f64_v3i8:
1911 ; CHECK-GI: // %bb.0: // %entry
1912 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1913 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1914 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1915 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1916 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
1917 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1918 ; CHECK-GI-NEXT: fmov x2, d1
1919 ; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2
1920 ; CHECK-GI-NEXT: mov d2, v0.d[1]
1921 ; CHECK-GI-NEXT: fmov x0, d0
1922 ; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0
1923 ; CHECK-GI-NEXT: fmov x1, d2
1924 ; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1
1925 ; CHECK-GI-NEXT: ret
1926 entry:
1927 %c = fptoui <3 x double> %a to <3 x i8>
1928 ret <3 x i8> %c
1929 }
1931 define <4 x i8> @fptos_v4f64_v4i8(<4 x double> %a) {
1932 ; CHECK-SD-LABEL: fptos_v4f64_v4i8:
1933 ; CHECK-SD: // %bb.0: // %entry
1934 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1935 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1936 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1937 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1938 ; CHECK-SD-NEXT: ret
1939 ;
1940 ; CHECK-GI-LABEL: fptos_v4f64_v4i8:
1941 ; CHECK-GI: // %bb.0: // %entry
1942 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1943 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1944 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1945 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1946 ; CHECK-GI-NEXT: ret
1947 entry:
1948 %c = fptosi <4 x double> %a to <4 x i8>
1949 ret <4 x i8> %c
1950 }
1952 define <4 x i8> @fptou_v4f64_v4i8(<4 x double> %a) {
1953 ; CHECK-SD-LABEL: fptou_v4f64_v4i8:
1954 ; CHECK-SD: // %bb.0: // %entry
1955 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1956 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1957 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1958 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1959 ; CHECK-SD-NEXT: ret
1960 ;
1961 ; CHECK-GI-LABEL: fptou_v4f64_v4i8:
1962 ; CHECK-GI: // %bb.0: // %entry
1963 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1964 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1965 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1966 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1967 ; CHECK-GI-NEXT: ret
1968 entry:
1969 %c = fptoui <4 x double> %a to <4 x i8>
1970 ret <4 x i8> %c
1971 }
1973 define <8 x i8> @fptos_v8f64_v8i8(<8 x double> %a) {
1974 ; CHECK-SD-LABEL: fptos_v8f64_v8i8:
1975 ; CHECK-SD: // %bb.0: // %entry
1976 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1977 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1978 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1979 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1980 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
1981 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1982 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
1983 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
1984 ; CHECK-SD-NEXT: ret
1985 ;
1986 ; CHECK-GI-LABEL: fptos_v8f64_v8i8:
1987 ; CHECK-GI: // %bb.0: // %entry
1988 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1989 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1990 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1991 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1992 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1993 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1994 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1995 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
1996 ; CHECK-GI-NEXT: ret
1997 entry:
1998 %c = fptosi <8 x double> %a to <8 x i8>
1999 ret <8 x i8> %c
2000 }
2002 define <8 x i8> @fptou_v8f64_v8i8(<8 x double> %a) {
2003 ; CHECK-SD-LABEL: fptou_v8f64_v8i8:
2004 ; CHECK-SD: // %bb.0: // %entry
2005 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2006 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2007 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2008 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2009 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2010 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2011 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2012 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
2013 ; CHECK-SD-NEXT: ret
2014 ;
2015 ; CHECK-GI-LABEL: fptou_v8f64_v8i8:
2016 ; CHECK-GI: // %bb.0: // %entry
2017 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2018 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2019 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2020 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2021 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2022 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2023 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2024 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
2025 ; CHECK-GI-NEXT: ret
2026 entry:
2027 %c = fptoui <8 x double> %a to <8 x i8>
2028 ret <8 x i8> %c
2029 }
2031 define <16 x i8> @fptos_v16f64_v16i8(<16 x double> %a) {
2032 ; CHECK-SD-LABEL: fptos_v16f64_v16i8:
2033 ; CHECK-SD: // %bb.0: // %entry
2034 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2035 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2036 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2037 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2038 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2039 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2040 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2041 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2042 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2043 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2044 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2045 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2046 ; CHECK-SD-NEXT: uzp1 v1.8h, v4.8h, v6.8h
2047 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2048 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2049 ; CHECK-SD-NEXT: ret
2050 ;
2051 ; CHECK-GI-LABEL: fptos_v16f64_v16i8:
2052 ; CHECK-GI: // %bb.0: // %entry
2053 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2054 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2055 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2056 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2057 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2058 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2059 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
2060 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
2061 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2062 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2063 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2064 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2065 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2066 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2067 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2068 ; CHECK-GI-NEXT: ret
2069 entry:
2070 %c = fptosi <16 x double> %a to <16 x i8>
2071 ret <16 x i8> %c
2072 }
2074 define <16 x i8> @fptou_v16f64_v16i8(<16 x double> %a) {
2075 ; CHECK-SD-LABEL: fptou_v16f64_v16i8:
2076 ; CHECK-SD: // %bb.0: // %entry
2077 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2078 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2079 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2080 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2081 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2082 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2083 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2084 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2085 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2086 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2087 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2088 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2089 ; CHECK-SD-NEXT: uzp1 v1.8h, v4.8h, v6.8h
2090 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2091 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2092 ; CHECK-SD-NEXT: ret
2093 ;
2094 ; CHECK-GI-LABEL: fptou_v16f64_v16i8:
2095 ; CHECK-GI: // %bb.0: // %entry
2096 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2097 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2098 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2099 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2100 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2101 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2102 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
2103 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
2104 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2105 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2106 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2107 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2108 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2109 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2110 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2111 ; CHECK-GI-NEXT: ret
2112 entry:
2113 %c = fptoui <16 x double> %a to <16 x i8>
2114 ret <16 x i8> %c
2115 }
2117 define <32 x i8> @fptos_v32f64_v32i8(<32 x double> %a) {
2118 ; CHECK-SD-LABEL: fptos_v32f64_v32i8:
2119 ; CHECK-SD: // %bb.0: // %entry
2120 ; CHECK-SD-NEXT: ldp q16, q17, [sp]
2121 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2122 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #32]
2123 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2124 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #64]
2125 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2126 ; CHECK-SD-NEXT: ldp q22, q23, [sp, #96]
2127 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2128 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2129 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2130 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2131 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2132 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
2133 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
2134 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
2135 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
2136 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
2137 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2138 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2139 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2140 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2141 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2142 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2143 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2144 ; CHECK-SD-NEXT: uzp1 v3.4s, v20.4s, v21.4s
2145 ; CHECK-SD-NEXT: uzp1 v1.4s, v22.4s, v23.4s
2146 ; CHECK-SD-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2147 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
2148 ; CHECK-SD-NEXT: uzp1 v4.8h, v4.8h, v6.8h
2149 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2150 ; CHECK-SD-NEXT: uzp1 v1.8h, v3.8h, v1.8h
2151 ; CHECK-SD-NEXT: uzp1 v2.8h, v7.8h, v5.8h
2152 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v4.16b
2153 ; CHECK-SD-NEXT: uzp1 v1.16b, v2.16b, v1.16b
2154 ; CHECK-SD-NEXT: ret
2155 ;
2156 ; CHECK-GI-LABEL: fptos_v32f64_v32i8:
2157 ; CHECK-GI: // %bb.0: // %entry
2158 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
2159 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2160 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
2161 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2162 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
2163 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2164 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
2165 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2166 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2167 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2168 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
2169 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
2170 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
2171 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
2172 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
2173 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
2174 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
2175 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
2176 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
2177 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
2178 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2179 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2180 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2181 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2182 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
2183 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2184 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
2185 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
2186 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2187 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2188 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2189 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2190 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2191 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
2192 ; CHECK-GI-NEXT: ret
2193 entry:
2194 %c = fptosi <32 x double> %a to <32 x i8>
2195 ret <32 x i8> %c
2196 }
2198 define <32 x i8> @fptou_v32f64_v32i8(<32 x double> %a) {
2199 ; CHECK-SD-LABEL: fptou_v32f64_v32i8:
2200 ; CHECK-SD: // %bb.0: // %entry
2201 ; CHECK-SD-NEXT: ldp q16, q17, [sp]
2202 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2203 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #32]
2204 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2205 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #64]
2206 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2207 ; CHECK-SD-NEXT: ldp q22, q23, [sp, #96]
2208 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2209 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2210 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2211 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2212 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2213 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
2214 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
2215 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
2216 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
2217 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
2218 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2219 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2220 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2221 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2222 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2223 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2224 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2225 ; CHECK-SD-NEXT: uzp1 v3.4s, v20.4s, v21.4s
2226 ; CHECK-SD-NEXT: uzp1 v1.4s, v22.4s, v23.4s
2227 ; CHECK-SD-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2228 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
2229 ; CHECK-SD-NEXT: uzp1 v4.8h, v4.8h, v6.8h
2230 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2231 ; CHECK-SD-NEXT: uzp1 v1.8h, v3.8h, v1.8h
2232 ; CHECK-SD-NEXT: uzp1 v2.8h, v7.8h, v5.8h
2233 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v4.16b
2234 ; CHECK-SD-NEXT: uzp1 v1.16b, v2.16b, v1.16b
2235 ; CHECK-SD-NEXT: ret
2236 ;
2237 ; CHECK-GI-LABEL: fptou_v32f64_v32i8:
2238 ; CHECK-GI: // %bb.0: // %entry
2239 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
2240 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2241 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
2242 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2243 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
2244 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2245 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
2246 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2247 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2248 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2249 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
2250 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
2251 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
2252 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
2253 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
2254 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
2255 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
2256 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
2257 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
2258 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
2259 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2260 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2261 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2262 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2263 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
2264 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2265 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
2266 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
2267 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2268 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2269 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2270 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2271 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2272 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
2273 ; CHECK-GI-NEXT: ret
2274 entry:
2275 %c = fptoui <32 x double> %a to <32 x i8>
2276 ret <32 x i8> %c
2277 }
2279 define <2 x i128> @fptos_v2f64_v2i128(<2 x double> %a) {
2280 ; CHECK-SD-LABEL: fptos_v2f64_v2i128:
2281 ; CHECK-SD: // %bb.0: // %entry
2282 ; CHECK-SD-NEXT: sub sp, sp, #48
2283 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2284 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
2285 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
2286 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2287 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2288 ; CHECK-SD-NEXT: .cfi_offset w30, -32
2289 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
2290 ; CHECK-SD-NEXT: mov d0, v0.d[1]
2291 ; CHECK-SD-NEXT: bl __fixdfti
2292 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
2293 ; CHECK-SD-NEXT: mov x19, x0
2294 ; CHECK-SD-NEXT: mov x20, x1
2295 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
2296 ; CHECK-SD-NEXT: bl __fixdfti
2297 ; CHECK-SD-NEXT: fmov d0, x0
2298 ; CHECK-SD-NEXT: mov x2, x19
2299 ; CHECK-SD-NEXT: mov x3, x20
2300 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
2301 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2302 ; CHECK-SD-NEXT: mov v0.d[1], x1
2303 ; CHECK-SD-NEXT: fmov x0, d0
2304 ; CHECK-SD-NEXT: add sp, sp, #48
2305 ; CHECK-SD-NEXT: ret
2306 ;
2307 ; CHECK-GI-LABEL: fptos_v2f64_v2i128:
2308 ; CHECK-GI: // %bb.0: // %entry
2309 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
2310 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
2311 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
2312 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
2313 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2314 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2315 ; CHECK-GI-NEXT: .cfi_offset w30, -24
2316 ; CHECK-GI-NEXT: .cfi_offset b8, -32
2317 ; CHECK-GI-NEXT: mov d8, v0.d[1]
2318 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2319 ; CHECK-GI-NEXT: bl __fixdfti
2320 ; CHECK-GI-NEXT: fmov d0, d8
2321 ; CHECK-GI-NEXT: mov x19, x0
2322 ; CHECK-GI-NEXT: mov x20, x1
2323 ; CHECK-GI-NEXT: bl __fixdfti
2324 ; CHECK-GI-NEXT: mov x2, x0
2325 ; CHECK-GI-NEXT: mov x3, x1
2326 ; CHECK-GI-NEXT: mov x0, x19
2327 ; CHECK-GI-NEXT: mov x1, x20
2328 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
2329 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
2330 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
2331 ; CHECK-GI-NEXT: ret
2332 entry:
2333 %c = fptosi <2 x double> %a to <2 x i128>
2334 ret <2 x i128> %c
2335 }
2337 define <2 x i128> @fptou_v2f64_v2i128(<2 x double> %a) {
2338 ; CHECK-SD-LABEL: fptou_v2f64_v2i128:
2339 ; CHECK-SD: // %bb.0: // %entry
2340 ; CHECK-SD-NEXT: sub sp, sp, #48
2341 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2342 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
2343 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
2344 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2345 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2346 ; CHECK-SD-NEXT: .cfi_offset w30, -32
2347 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
2348 ; CHECK-SD-NEXT: mov d0, v0.d[1]
2349 ; CHECK-SD-NEXT: bl __fixunsdfti
2350 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
2351 ; CHECK-SD-NEXT: mov x19, x0
2352 ; CHECK-SD-NEXT: mov x20, x1
2353 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
2354 ; CHECK-SD-NEXT: bl __fixunsdfti
2355 ; CHECK-SD-NEXT: fmov d0, x0
2356 ; CHECK-SD-NEXT: mov x2, x19
2357 ; CHECK-SD-NEXT: mov x3, x20
2358 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
2359 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2360 ; CHECK-SD-NEXT: mov v0.d[1], x1
2361 ; CHECK-SD-NEXT: fmov x0, d0
2362 ; CHECK-SD-NEXT: add sp, sp, #48
2363 ; CHECK-SD-NEXT: ret
2364 ;
2365 ; CHECK-GI-LABEL: fptou_v2f64_v2i128:
2366 ; CHECK-GI: // %bb.0: // %entry
2367 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
2368 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
2369 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
2370 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
2371 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2372 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2373 ; CHECK-GI-NEXT: .cfi_offset w30, -24
2374 ; CHECK-GI-NEXT: .cfi_offset b8, -32
2375 ; CHECK-GI-NEXT: mov d8, v0.d[1]
2376 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2377 ; CHECK-GI-NEXT: bl __fixunsdfti
2378 ; CHECK-GI-NEXT: fmov d0, d8
2379 ; CHECK-GI-NEXT: mov x19, x0
2380 ; CHECK-GI-NEXT: mov x20, x1
2381 ; CHECK-GI-NEXT: bl __fixunsdfti
2382 ; CHECK-GI-NEXT: mov x2, x0
2383 ; CHECK-GI-NEXT: mov x3, x1
2384 ; CHECK-GI-NEXT: mov x0, x19
2385 ; CHECK-GI-NEXT: mov x1, x20
2386 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
2387 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
2388 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
2389 ; CHECK-GI-NEXT: ret
2390 entry:
2391 %c = fptoui <2 x double> %a to <2 x i128>
2392 ret <2 x i128> %c
2393 }
2395 define <3 x i128> @fptos_v3f64_v3i128(<3 x double> %a) {
2396 ; CHECK-SD-LABEL: fptos_v3f64_v3i128:
2397 ; CHECK-SD: // %bb.0: // %entry
2398 ; CHECK-SD-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2399 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2400 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2401 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2402 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
2403 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2404 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2405 ; CHECK-SD-NEXT: .cfi_offset w21, -24
2406 ; CHECK-SD-NEXT: .cfi_offset w22, -32
2407 ; CHECK-SD-NEXT: .cfi_offset w30, -48
2408 ; CHECK-SD-NEXT: .cfi_offset b8, -56
2409 ; CHECK-SD-NEXT: .cfi_offset b9, -64
2410 ; CHECK-SD-NEXT: fmov d9, d0
2411 ; CHECK-SD-NEXT: fmov d0, d1
2412 ; CHECK-SD-NEXT: fmov d8, d2
2413 ; CHECK-SD-NEXT: bl __fixdfti
2414 ; CHECK-SD-NEXT: fmov d0, d8
2415 ; CHECK-SD-NEXT: mov x19, x0
2416 ; CHECK-SD-NEXT: mov x20, x1
2417 ; CHECK-SD-NEXT: bl __fixdfti
2418 ; CHECK-SD-NEXT: fmov d0, d9
2419 ; CHECK-SD-NEXT: mov x21, x0
2420 ; CHECK-SD-NEXT: mov x22, x1
2421 ; CHECK-SD-NEXT: bl __fixdfti
2422 ; CHECK-SD-NEXT: fmov d0, x0
2423 ; CHECK-SD-NEXT: mov x2, x19
2424 ; CHECK-SD-NEXT: mov x3, x20
2425 ; CHECK-SD-NEXT: mov x4, x21
2426 ; CHECK-SD-NEXT: mov x5, x22
2427 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2428 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2429 ; CHECK-SD-NEXT: mov v0.d[1], x1
2430 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2431 ; CHECK-SD-NEXT: fmov x0, d0
2432 ; CHECK-SD-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2433 ; CHECK-SD-NEXT: ret
2434 ;
2435 ; CHECK-GI-LABEL: fptos_v3f64_v3i128:
2436 ; CHECK-GI: // %bb.0: // %entry
2437 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2438 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2439 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2440 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2441 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
2442 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2443 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2444 ; CHECK-GI-NEXT: .cfi_offset w21, -24
2445 ; CHECK-GI-NEXT: .cfi_offset w22, -32
2446 ; CHECK-GI-NEXT: .cfi_offset w30, -48
2447 ; CHECK-GI-NEXT: .cfi_offset b8, -56
2448 ; CHECK-GI-NEXT: .cfi_offset b9, -64
2449 ; CHECK-GI-NEXT: fmov d8, d1
2450 ; CHECK-GI-NEXT: fmov d9, d2
2451 ; CHECK-GI-NEXT: bl __fixdfti
2452 ; CHECK-GI-NEXT: fmov d0, d8
2453 ; CHECK-GI-NEXT: mov x19, x0
2454 ; CHECK-GI-NEXT: mov x20, x1
2455 ; CHECK-GI-NEXT: bl __fixdfti
2456 ; CHECK-GI-NEXT: fmov d0, d9
2457 ; CHECK-GI-NEXT: mov x21, x0
2458 ; CHECK-GI-NEXT: mov x22, x1
2459 ; CHECK-GI-NEXT: bl __fixdfti
2460 ; CHECK-GI-NEXT: mov x4, x0
2461 ; CHECK-GI-NEXT: mov x5, x1
2462 ; CHECK-GI-NEXT: mov x0, x19
2463 ; CHECK-GI-NEXT: mov x1, x20
2464 ; CHECK-GI-NEXT: mov x2, x21
2465 ; CHECK-GI-NEXT: mov x3, x22
2466 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2467 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2468 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2469 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2470 ; CHECK-GI-NEXT: ret
2471 entry:
2472 %c = fptosi <3 x double> %a to <3 x i128>
2473 ret <3 x i128> %c
2474 }
2476 define <3 x i128> @fptou_v3f64_v3i128(<3 x double> %a) {
2477 ; CHECK-SD-LABEL: fptou_v3f64_v3i128:
2478 ; CHECK-SD: // %bb.0: // %entry
2479 ; CHECK-SD-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2480 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2481 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2482 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2483 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
2484 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2485 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2486 ; CHECK-SD-NEXT: .cfi_offset w21, -24
2487 ; CHECK-SD-NEXT: .cfi_offset w22, -32
2488 ; CHECK-SD-NEXT: .cfi_offset w30, -48
2489 ; CHECK-SD-NEXT: .cfi_offset b8, -56
2490 ; CHECK-SD-NEXT: .cfi_offset b9, -64
2491 ; CHECK-SD-NEXT: fmov d9, d0
2492 ; CHECK-SD-NEXT: fmov d0, d1
2493 ; CHECK-SD-NEXT: fmov d8, d2
2494 ; CHECK-SD-NEXT: bl __fixunsdfti
2495 ; CHECK-SD-NEXT: fmov d0, d8
2496 ; CHECK-SD-NEXT: mov x19, x0
2497 ; CHECK-SD-NEXT: mov x20, x1
2498 ; CHECK-SD-NEXT: bl __fixunsdfti
2499 ; CHECK-SD-NEXT: fmov d0, d9
2500 ; CHECK-SD-NEXT: mov x21, x0
2501 ; CHECK-SD-NEXT: mov x22, x1
2502 ; CHECK-SD-NEXT: bl __fixunsdfti
2503 ; CHECK-SD-NEXT: fmov d0, x0
2504 ; CHECK-SD-NEXT: mov x2, x19
2505 ; CHECK-SD-NEXT: mov x3, x20
2506 ; CHECK-SD-NEXT: mov x4, x21
2507 ; CHECK-SD-NEXT: mov x5, x22
2508 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2509 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2510 ; CHECK-SD-NEXT: mov v0.d[1], x1
2511 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2512 ; CHECK-SD-NEXT: fmov x0, d0
2513 ; CHECK-SD-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2514 ; CHECK-SD-NEXT: ret
2515 ;
2516 ; CHECK-GI-LABEL: fptou_v3f64_v3i128:
2517 ; CHECK-GI: // %bb.0: // %entry
2518 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2519 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2520 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2521 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2522 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
2523 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2524 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2525 ; CHECK-GI-NEXT: .cfi_offset w21, -24
2526 ; CHECK-GI-NEXT: .cfi_offset w22, -32
2527 ; CHECK-GI-NEXT: .cfi_offset w30, -48
2528 ; CHECK-GI-NEXT: .cfi_offset b8, -56
2529 ; CHECK-GI-NEXT: .cfi_offset b9, -64
2530 ; CHECK-GI-NEXT: fmov d8, d1
2531 ; CHECK-GI-NEXT: fmov d9, d2
2532 ; CHECK-GI-NEXT: bl __fixunsdfti
2533 ; CHECK-GI-NEXT: fmov d0, d8
2534 ; CHECK-GI-NEXT: mov x19, x0
2535 ; CHECK-GI-NEXT: mov x20, x1
2536 ; CHECK-GI-NEXT: bl __fixunsdfti
2537 ; CHECK-GI-NEXT: fmov d0, d9
2538 ; CHECK-GI-NEXT: mov x21, x0
2539 ; CHECK-GI-NEXT: mov x22, x1
2540 ; CHECK-GI-NEXT: bl __fixunsdfti
2541 ; CHECK-GI-NEXT: mov x4, x0
2542 ; CHECK-GI-NEXT: mov x5, x1
2543 ; CHECK-GI-NEXT: mov x0, x19
2544 ; CHECK-GI-NEXT: mov x1, x20
2545 ; CHECK-GI-NEXT: mov x2, x21
2546 ; CHECK-GI-NEXT: mov x3, x22
2547 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2548 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2549 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2550 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2551 ; CHECK-GI-NEXT: ret
2552 entry:
2553 %c = fptoui <3 x double> %a to <3 x i128>
2554 ret <3 x i128> %c
2555 }
2557 define <2 x i64> @fptos_v2f32_v2i64(<2 x float> %a) {
2558 ; CHECK-LABEL: fptos_v2f32_v2i64:
2559 ; CHECK: // %bb.0: // %entry
2560 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
2561 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
2562 ; CHECK-NEXT: ret
2563 entry:
2564 %c = fptosi <2 x float> %a to <2 x i64>
2565 ret <2 x i64> %c
2566 }
2568 define <2 x i64> @fptou_v2f32_v2i64(<2 x float> %a) {
2569 ; CHECK-LABEL: fptou_v2f32_v2i64:
2570 ; CHECK: // %bb.0: // %entry
2571 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
2572 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
2573 ; CHECK-NEXT: ret
2574 entry:
2575 %c = fptoui <2 x float> %a to <2 x i64>
2576 ret <2 x i64> %c
2577 }
2579 define <3 x i64> @fptos_v3f32_v3i64(<3 x float> %a) {
2580 ; CHECK-SD-LABEL: fptos_v3f32_v3i64:
2581 ; CHECK-SD: // %bb.0: // %entry
2582 ; CHECK-SD-NEXT: fcvtl v1.2d, v0.2s
2583 ; CHECK-SD-NEXT: fcvtl2 v0.2d, v0.4s
2584 ; CHECK-SD-NEXT: fcvtzs v3.2d, v1.2d
2585 ; CHECK-SD-NEXT: fcvtzs v2.2d, v0.2d
2586 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
2587 ; CHECK-SD-NEXT: fmov d0, d3
2588 ; CHECK-SD-NEXT: ext v1.16b, v3.16b, v3.16b, #8
2589 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
2590 ; CHECK-SD-NEXT: ret
2591 ;
2592 ; CHECK-GI-LABEL: fptos_v3f32_v3i64:
2593 ; CHECK-GI: // %bb.0: // %entry
2594 ; CHECK-GI-NEXT: mov s1, v0.s[2]
2595 ; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
2596 ; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
2597 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2598 ; CHECK-GI-NEXT: fcvtzs v2.2d, v1.2d
2599 ; CHECK-GI-NEXT: mov d1, v0.d[1]
2600 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2601 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
2602 ; CHECK-GI-NEXT: ret
2603 entry:
2604 %c = fptosi <3 x float> %a to <3 x i64>
2605 ret <3 x i64> %c
2606 }
2608 define <3 x i64> @fptou_v3f32_v3i64(<3 x float> %a) {
2609 ; CHECK-SD-LABEL: fptou_v3f32_v3i64:
2610 ; CHECK-SD: // %bb.0: // %entry
2611 ; CHECK-SD-NEXT: fcvtl v1.2d, v0.2s
2612 ; CHECK-SD-NEXT: fcvtl2 v0.2d, v0.4s
2613 ; CHECK-SD-NEXT: fcvtzu v3.2d, v1.2d
2614 ; CHECK-SD-NEXT: fcvtzu v2.2d, v0.2d
2615 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
2616 ; CHECK-SD-NEXT: fmov d0, d3
2617 ; CHECK-SD-NEXT: ext v1.16b, v3.16b, v3.16b, #8
2618 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
2619 ; CHECK-SD-NEXT: ret
2620 ;
2621 ; CHECK-GI-LABEL: fptou_v3f32_v3i64:
2622 ; CHECK-GI: // %bb.0: // %entry
2623 ; CHECK-GI-NEXT: mov s1, v0.s[2]
2624 ; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
2625 ; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
2626 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2627 ; CHECK-GI-NEXT: fcvtzu v2.2d, v1.2d
2628 ; CHECK-GI-NEXT: mov d1, v0.d[1]
2629 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2630 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
2631 ; CHECK-GI-NEXT: ret
2632 entry:
2633 %c = fptoui <3 x float> %a to <3 x i64>
2634 ret <3 x i64> %c
2635 }
2637 define <4 x i64> @fptos_v4f32_v4i64(<4 x float> %a) {
2638 ; CHECK-SD-LABEL: fptos_v4f32_v4i64:
2639 ; CHECK-SD: // %bb.0: // %entry
2640 ; CHECK-SD-NEXT: fcvtl2 v1.2d, v0.4s
2641 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2642 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2643 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2644 ; CHECK-SD-NEXT: ret
2645 ;
2646 ; CHECK-GI-LABEL: fptos_v4f32_v4i64:
2647 ; CHECK-GI: // %bb.0: // %entry
2648 ; CHECK-GI-NEXT: fcvtl v1.2d, v0.2s
2649 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v0.4s
2650 ; CHECK-GI-NEXT: fcvtzs v0.2d, v1.2d
2651 ; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d
2652 ; CHECK-GI-NEXT: ret
2653 entry:
2654 %c = fptosi <4 x float> %a to <4 x i64>
2655 ret <4 x i64> %c
2656 }
2658 define <4 x i64> @fptou_v4f32_v4i64(<4 x float> %a) {
2659 ; CHECK-SD-LABEL: fptou_v4f32_v4i64:
2660 ; CHECK-SD: // %bb.0: // %entry
2661 ; CHECK-SD-NEXT: fcvtl2 v1.2d, v0.4s
2662 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2663 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
2664 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2665 ; CHECK-SD-NEXT: ret
2666 ;
2667 ; CHECK-GI-LABEL: fptou_v4f32_v4i64:
2668 ; CHECK-GI: // %bb.0: // %entry
2669 ; CHECK-GI-NEXT: fcvtl v1.2d, v0.2s
2670 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v0.4s
2671 ; CHECK-GI-NEXT: fcvtzu v0.2d, v1.2d
2672 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
2673 ; CHECK-GI-NEXT: ret
2674 entry:
2675 %c = fptoui <4 x float> %a to <4 x i64>
2676 ret <4 x i64> %c
2677 }
2679 define <8 x i64> @fptos_v8f32_v8i64(<8 x float> %a) {
2680 ; CHECK-SD-LABEL: fptos_v8f32_v8i64:
2681 ; CHECK-SD: // %bb.0: // %entry
2682 ; CHECK-SD-NEXT: fcvtl v2.2d, v0.2s
2683 ; CHECK-SD-NEXT: fcvtl2 v3.2d, v0.4s
2684 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v1.4s
2685 ; CHECK-SD-NEXT: fcvtl v5.2d, v1.2s
2686 ; CHECK-SD-NEXT: fcvtzs v0.2d, v2.2d
2687 ; CHECK-SD-NEXT: fcvtzs v1.2d, v3.2d
2688 ; CHECK-SD-NEXT: fcvtzs v3.2d, v4.2d
2689 ; CHECK-SD-NEXT: fcvtzs v2.2d, v5.2d
2690 ; CHECK-SD-NEXT: ret
2691 ;
2692 ; CHECK-GI-LABEL: fptos_v8f32_v8i64:
2693 ; CHECK-GI: // %bb.0: // %entry
2694 ; CHECK-GI-NEXT: fcvtl v2.2d, v0.2s
2695 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v0.4s
2696 ; CHECK-GI-NEXT: fcvtl v4.2d, v1.2s
2697 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v1.4s
2698 ; CHECK-GI-NEXT: fcvtzs v0.2d, v2.2d
2699 ; CHECK-GI-NEXT: fcvtzs v1.2d, v3.2d
2700 ; CHECK-GI-NEXT: fcvtzs v2.2d, v4.2d
2701 ; CHECK-GI-NEXT: fcvtzs v3.2d, v5.2d
2702 ; CHECK-GI-NEXT: ret
2703 entry:
2704 %c = fptosi <8 x float> %a to <8 x i64>
2705 ret <8 x i64> %c
2706 }
2708 define <8 x i64> @fptou_v8f32_v8i64(<8 x float> %a) {
2709 ; CHECK-SD-LABEL: fptou_v8f32_v8i64:
2710 ; CHECK-SD: // %bb.0: // %entry
2711 ; CHECK-SD-NEXT: fcvtl v2.2d, v0.2s
2712 ; CHECK-SD-NEXT: fcvtl2 v3.2d, v0.4s
2713 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v1.4s
2714 ; CHECK-SD-NEXT: fcvtl v5.2d, v1.2s
2715 ; CHECK-SD-NEXT: fcvtzu v0.2d, v2.2d
2716 ; CHECK-SD-NEXT: fcvtzu v1.2d, v3.2d
2717 ; CHECK-SD-NEXT: fcvtzu v3.2d, v4.2d
2718 ; CHECK-SD-NEXT: fcvtzu v2.2d, v5.2d
2719 ; CHECK-SD-NEXT: ret
2720 ;
2721 ; CHECK-GI-LABEL: fptou_v8f32_v8i64:
2722 ; CHECK-GI: // %bb.0: // %entry
2723 ; CHECK-GI-NEXT: fcvtl v2.2d, v0.2s
2724 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v0.4s
2725 ; CHECK-GI-NEXT: fcvtl v4.2d, v1.2s
2726 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v1.4s
2727 ; CHECK-GI-NEXT: fcvtzu v0.2d, v2.2d
2728 ; CHECK-GI-NEXT: fcvtzu v1.2d, v3.2d
2729 ; CHECK-GI-NEXT: fcvtzu v2.2d, v4.2d
2730 ; CHECK-GI-NEXT: fcvtzu v3.2d, v5.2d
2731 ; CHECK-GI-NEXT: ret
2732 entry:
2733 %c = fptoui <8 x float> %a to <8 x i64>
2734 ret <8 x i64> %c
2735 }
2737 define <16 x i64> @fptos_v16f32_v16i64(<16 x float> %a) {
2738 ; CHECK-SD-LABEL: fptos_v16f32_v16i64:
2739 ; CHECK-SD: // %bb.0: // %entry
2740 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v0.4s
2741 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2742 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v1.4s
2743 ; CHECK-SD-NEXT: fcvtl v6.2d, v1.2s
2744 ; CHECK-SD-NEXT: fcvtl v7.2d, v2.2s
2745 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v2.4s
2746 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v3.4s
2747 ; CHECK-SD-NEXT: fcvtl v18.2d, v3.2s
2748 ; CHECK-SD-NEXT: fcvtzs v1.2d, v4.2d
2749 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2750 ; CHECK-SD-NEXT: fcvtzs v3.2d, v5.2d
2751 ; CHECK-SD-NEXT: fcvtzs v2.2d, v6.2d
2752 ; CHECK-SD-NEXT: fcvtzs v4.2d, v7.2d
2753 ; CHECK-SD-NEXT: fcvtzs v5.2d, v16.2d
2754 ; CHECK-SD-NEXT: fcvtzs v7.2d, v17.2d
2755 ; CHECK-SD-NEXT: fcvtzs v6.2d, v18.2d
2756 ; CHECK-SD-NEXT: ret
2757 ;
2758 ; CHECK-GI-LABEL: fptos_v16f32_v16i64:
2759 ; CHECK-GI: // %bb.0: // %entry
2760 ; CHECK-GI-NEXT: fcvtl v4.2d, v0.2s
2761 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v0.4s
2762 ; CHECK-GI-NEXT: fcvtl v6.2d, v1.2s
2763 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v1.4s
2764 ; CHECK-GI-NEXT: fcvtl v16.2d, v2.2s
2765 ; CHECK-GI-NEXT: fcvtl2 v17.2d, v2.4s
2766 ; CHECK-GI-NEXT: fcvtl v18.2d, v3.2s
2767 ; CHECK-GI-NEXT: fcvtl2 v19.2d, v3.4s
2768 ; CHECK-GI-NEXT: fcvtzs v0.2d, v4.2d
2769 ; CHECK-GI-NEXT: fcvtzs v1.2d, v5.2d
2770 ; CHECK-GI-NEXT: fcvtzs v2.2d, v6.2d
2771 ; CHECK-GI-NEXT: fcvtzs v3.2d, v7.2d
2772 ; CHECK-GI-NEXT: fcvtzs v4.2d, v16.2d
2773 ; CHECK-GI-NEXT: fcvtzs v5.2d, v17.2d
2774 ; CHECK-GI-NEXT: fcvtzs v6.2d, v18.2d
2775 ; CHECK-GI-NEXT: fcvtzs v7.2d, v19.2d
2776 ; CHECK-GI-NEXT: ret
2777 entry:
2778 %c = fptosi <16 x float> %a to <16 x i64>
2779 ret <16 x i64> %c
2780 }
2782 define <16 x i64> @fptou_v16f32_v16i64(<16 x float> %a) {
2783 ; CHECK-SD-LABEL: fptou_v16f32_v16i64:
2784 ; CHECK-SD: // %bb.0: // %entry
2785 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v0.4s
2786 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2787 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v1.4s
2788 ; CHECK-SD-NEXT: fcvtl v6.2d, v1.2s
2789 ; CHECK-SD-NEXT: fcvtl v7.2d, v2.2s
2790 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v2.4s
2791 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v3.4s
2792 ; CHECK-SD-NEXT: fcvtl v18.2d, v3.2s
2793 ; CHECK-SD-NEXT: fcvtzu v1.2d, v4.2d
2794 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2795 ; CHECK-SD-NEXT: fcvtzu v3.2d, v5.2d
2796 ; CHECK-SD-NEXT: fcvtzu v2.2d, v6.2d
2797 ; CHECK-SD-NEXT: fcvtzu v4.2d, v7.2d
2798 ; CHECK-SD-NEXT: fcvtzu v5.2d, v16.2d
2799 ; CHECK-SD-NEXT: fcvtzu v7.2d, v17.2d
2800 ; CHECK-SD-NEXT: fcvtzu v6.2d, v18.2d
2801 ; CHECK-SD-NEXT: ret
2802 ;
2803 ; CHECK-GI-LABEL: fptou_v16f32_v16i64:
2804 ; CHECK-GI: // %bb.0: // %entry
2805 ; CHECK-GI-NEXT: fcvtl v4.2d, v0.2s
2806 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v0.4s
2807 ; CHECK-GI-NEXT: fcvtl v6.2d, v1.2s
2808 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v1.4s
2809 ; CHECK-GI-NEXT: fcvtl v16.2d, v2.2s
2810 ; CHECK-GI-NEXT: fcvtl2 v17.2d, v2.4s
2811 ; CHECK-GI-NEXT: fcvtl v18.2d, v3.2s
2812 ; CHECK-GI-NEXT: fcvtl2 v19.2d, v3.4s
2813 ; CHECK-GI-NEXT: fcvtzu v0.2d, v4.2d
2814 ; CHECK-GI-NEXT: fcvtzu v1.2d, v5.2d
2815 ; CHECK-GI-NEXT: fcvtzu v2.2d, v6.2d
2816 ; CHECK-GI-NEXT: fcvtzu v3.2d, v7.2d
2817 ; CHECK-GI-NEXT: fcvtzu v4.2d, v16.2d
2818 ; CHECK-GI-NEXT: fcvtzu v5.2d, v17.2d
2819 ; CHECK-GI-NEXT: fcvtzu v6.2d, v18.2d
2820 ; CHECK-GI-NEXT: fcvtzu v7.2d, v19.2d
2821 ; CHECK-GI-NEXT: ret
2822 entry:
2823 %c = fptoui <16 x float> %a to <16 x i64>
2824 ret <16 x i64> %c
2825 }
2827 define <32 x i64> @fptos_v32f32_v32i64(<32 x float> %a) {
2828 ; CHECK-SD-LABEL: fptos_v32f32_v32i64:
2829 ; CHECK-SD: // %bb.0: // %entry
2830 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v7.4s
2831 ; CHECK-SD-NEXT: fcvtl v7.2d, v7.2s
2832 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v6.4s
2833 ; CHECK-SD-NEXT: fcvtl v6.2d, v6.2s
2834 ; CHECK-SD-NEXT: fcvtl2 v18.2d, v5.4s
2835 ; CHECK-SD-NEXT: fcvtl v5.2d, v5.2s
2836 ; CHECK-SD-NEXT: fcvtl2 v19.2d, v4.4s
2837 ; CHECK-SD-NEXT: fcvtl v4.2d, v4.2s
2838 ; CHECK-SD-NEXT: fcvtl2 v20.2d, v3.4s
2839 ; CHECK-SD-NEXT: fcvtl v3.2d, v3.2s
2840 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2841 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2842 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2843 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2844 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2845 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2846 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2847 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2848 ; CHECK-SD-NEXT: stp q7, q16, [x8, #224]
2849 ; CHECK-SD-NEXT: fcvtl2 v7.2d, v2.4s
2850 ; CHECK-SD-NEXT: fcvtzs v16.2d, v19.2d
2851 ; CHECK-SD-NEXT: stp q5, q18, [x8, #160]
2852 ; CHECK-SD-NEXT: fcvtl v2.2d, v2.2s
2853 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v0.4s
2854 ; CHECK-SD-NEXT: stp q6, q17, [x8, #192]
2855 ; CHECK-SD-NEXT: fcvtl2 v6.2d, v1.4s
2856 ; CHECK-SD-NEXT: fcvtzs v17.2d, v20.2d
2857 ; CHECK-SD-NEXT: fcvtl v1.2d, v1.2s
2858 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2859 ; CHECK-SD-NEXT: stp q4, q16, [x8, #128]
2860 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2861 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2862 ; CHECK-SD-NEXT: fcvtzs v4.2d, v6.2d
2863 ; CHECK-SD-NEXT: stp q3, q17, [x8, #96]
2864 ; CHECK-SD-NEXT: fcvtzs v3.2d, v5.2d
2865 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2866 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2867 ; CHECK-SD-NEXT: stp q2, q7, [x8, #64]
2868 ; CHECK-SD-NEXT: stp q0, q3, [x8]
2869 ; CHECK-SD-NEXT: stp q1, q4, [x8, #32]
2870 ; CHECK-SD-NEXT: ret
2871 ;
2872 ; CHECK-GI-LABEL: fptos_v32f32_v32i64:
2873 ; CHECK-GI: // %bb.0: // %entry
2874 ; CHECK-GI-NEXT: fcvtl v16.2d, v0.2s
2875 ; CHECK-GI-NEXT: fcvtl2 v0.2d, v0.4s
2876 ; CHECK-GI-NEXT: fcvtl v17.2d, v1.2s
2877 ; CHECK-GI-NEXT: fcvtl2 v1.2d, v1.4s
2878 ; CHECK-GI-NEXT: fcvtl v18.2d, v2.2s
2879 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v2.4s
2880 ; CHECK-GI-NEXT: fcvtl v19.2d, v3.2s
2881 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v3.4s
2882 ; CHECK-GI-NEXT: fcvtl v20.2d, v4.2s
2883 ; CHECK-GI-NEXT: fcvtl2 v4.2d, v4.4s
2884 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
2885 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2886 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
2887 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2888 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
2889 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2890 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2891 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2892 ; CHECK-GI-NEXT: stp q16, q0, [x8]
2893 ; CHECK-GI-NEXT: fcvtl v0.2d, v5.2s
2894 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v5.4s
2895 ; CHECK-GI-NEXT: stp q17, q1, [x8, #32]
2896 ; CHECK-GI-NEXT: fcvtzs v16.2d, v19.2d
2897 ; CHECK-GI-NEXT: fcvtl v1.2d, v6.2s
2898 ; CHECK-GI-NEXT: stp q18, q2, [x8, #64]
2899 ; CHECK-GI-NEXT: fcvtl2 v6.2d, v6.4s
2900 ; CHECK-GI-NEXT: fcvtl v2.2d, v7.2s
2901 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v7.4s
2902 ; CHECK-GI-NEXT: fcvtzs v17.2d, v20.2d
2903 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2904 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2905 ; CHECK-GI-NEXT: stp q16, q3, [x8, #96]
2906 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2907 ; CHECK-GI-NEXT: fcvtzs v3.2d, v6.2d
2908 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2909 ; CHECK-GI-NEXT: stp q17, q4, [x8, #128]
2910 ; CHECK-GI-NEXT: stp q0, q5, [x8, #160]
2911 ; CHECK-GI-NEXT: fcvtzs v0.2d, v7.2d
2912 ; CHECK-GI-NEXT: stp q1, q3, [x8, #192]
2913 ; CHECK-GI-NEXT: stp q2, q0, [x8, #224]
2914 ; CHECK-GI-NEXT: ret
2915 entry:
2916 %c = fptosi <32 x float> %a to <32 x i64>
2917 ret <32 x i64> %c
2918 }
2920 define <32 x i64> @fptou_v32f32_v32i64(<32 x float> %a) {
2921 ; CHECK-SD-LABEL: fptou_v32f32_v32i64:
2922 ; CHECK-SD: // %bb.0: // %entry
2923 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v7.4s
2924 ; CHECK-SD-NEXT: fcvtl v7.2d, v7.2s
2925 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v6.4s
2926 ; CHECK-SD-NEXT: fcvtl v6.2d, v6.2s
2927 ; CHECK-SD-NEXT: fcvtl2 v18.2d, v5.4s
2928 ; CHECK-SD-NEXT: fcvtl v5.2d, v5.2s
2929 ; CHECK-SD-NEXT: fcvtl2 v19.2d, v4.4s
2930 ; CHECK-SD-NEXT: fcvtl v4.2d, v4.2s
2931 ; CHECK-SD-NEXT: fcvtl2 v20.2d, v3.4s
2932 ; CHECK-SD-NEXT: fcvtl v3.2d, v3.2s
2933 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
2934 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
2935 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
2936 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
2937 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
2938 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
2939 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
2940 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
2941 ; CHECK-SD-NEXT: stp q7, q16, [x8, #224]
2942 ; CHECK-SD-NEXT: fcvtl2 v7.2d, v2.4s
2943 ; CHECK-SD-NEXT: fcvtzu v16.2d, v19.2d
2944 ; CHECK-SD-NEXT: stp q5, q18, [x8, #160]
2945 ; CHECK-SD-NEXT: fcvtl v2.2d, v2.2s
2946 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v0.4s
2947 ; CHECK-SD-NEXT: stp q6, q17, [x8, #192]
2948 ; CHECK-SD-NEXT: fcvtl2 v6.2d, v1.4s
2949 ; CHECK-SD-NEXT: fcvtzu v17.2d, v20.2d
2950 ; CHECK-SD-NEXT: fcvtl v1.2d, v1.2s
2951 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2952 ; CHECK-SD-NEXT: stp q4, q16, [x8, #128]
2953 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
2954 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
2955 ; CHECK-SD-NEXT: fcvtzu v4.2d, v6.2d
2956 ; CHECK-SD-NEXT: stp q3, q17, [x8, #96]
2957 ; CHECK-SD-NEXT: fcvtzu v3.2d, v5.2d
2958 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
2959 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2960 ; CHECK-SD-NEXT: stp q2, q7, [x8, #64]
2961 ; CHECK-SD-NEXT: stp q0, q3, [x8]
2962 ; CHECK-SD-NEXT: stp q1, q4, [x8, #32]
2963 ; CHECK-SD-NEXT: ret
2964 ;
2965 ; CHECK-GI-LABEL: fptou_v32f32_v32i64:
2966 ; CHECK-GI: // %bb.0: // %entry
2967 ; CHECK-GI-NEXT: fcvtl v16.2d, v0.2s
2968 ; CHECK-GI-NEXT: fcvtl2 v0.2d, v0.4s
2969 ; CHECK-GI-NEXT: fcvtl v17.2d, v1.2s
2970 ; CHECK-GI-NEXT: fcvtl2 v1.2d, v1.4s
2971 ; CHECK-GI-NEXT: fcvtl v18.2d, v2.2s
2972 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v2.4s
2973 ; CHECK-GI-NEXT: fcvtl v19.2d, v3.2s
2974 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v3.4s
2975 ; CHECK-GI-NEXT: fcvtl v20.2d, v4.2s
2976 ; CHECK-GI-NEXT: fcvtl2 v4.2d, v4.4s
2977 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
2978 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2979 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
2980 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2981 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
2982 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2983 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2984 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2985 ; CHECK-GI-NEXT: stp q16, q0, [x8]
2986 ; CHECK-GI-NEXT: fcvtl v0.2d, v5.2s
2987 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v5.4s
2988 ; CHECK-GI-NEXT: stp q17, q1, [x8, #32]
2989 ; CHECK-GI-NEXT: fcvtzu v16.2d, v19.2d
2990 ; CHECK-GI-NEXT: fcvtl v1.2d, v6.2s
2991 ; CHECK-GI-NEXT: stp q18, q2, [x8, #64]
2992 ; CHECK-GI-NEXT: fcvtl2 v6.2d, v6.4s
2993 ; CHECK-GI-NEXT: fcvtl v2.2d, v7.2s
2994 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v7.4s
2995 ; CHECK-GI-NEXT: fcvtzu v17.2d, v20.2d
2996 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2997 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2998 ; CHECK-GI-NEXT: stp q16, q3, [x8, #96]
2999 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
3000 ; CHECK-GI-NEXT: fcvtzu v3.2d, v6.2d
3001 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
3002 ; CHECK-GI-NEXT: stp q17, q4, [x8, #128]
3003 ; CHECK-GI-NEXT: stp q0, q5, [x8, #160]
3004 ; CHECK-GI-NEXT: fcvtzu v0.2d, v7.2d
3005 ; CHECK-GI-NEXT: stp q1, q3, [x8, #192]
3006 ; CHECK-GI-NEXT: stp q2, q0, [x8, #224]
3007 ; CHECK-GI-NEXT: ret
3008 entry:
3009 %c = fptoui <32 x float> %a to <32 x i64>
3010 ret <32 x i64> %c
3011 }
3013 define <2 x i32> @fptos_v2f32_v2i32(<2 x float> %a) {
3014 ; CHECK-LABEL: fptos_v2f32_v2i32:
3015 ; CHECK: // %bb.0: // %entry
3016 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3017 ; CHECK-NEXT: ret
3018 entry:
3019 %c = fptosi <2 x float> %a to <2 x i32>
3020 ret <2 x i32> %c
3021 }
3023 define <2 x i32> @fptou_v2f32_v2i32(<2 x float> %a) {
3024 ; CHECK-LABEL: fptou_v2f32_v2i32:
3025 ; CHECK: // %bb.0: // %entry
3026 ; CHECK-NEXT: fcvtzu v0.2s, v0.2s
3027 ; CHECK-NEXT: ret
3028 entry:
3029 %c = fptoui <2 x float> %a to <2 x i32>
3030 ret <2 x i32> %c
3031 }
3033 define <3 x i32> @fptos_v3f32_v3i32(<3 x float> %a) {
3034 ; CHECK-LABEL: fptos_v3f32_v3i32:
3035 ; CHECK: // %bb.0: // %entry
3036 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3037 ; CHECK-NEXT: ret
3038 entry:
3039 %c = fptosi <3 x float> %a to <3 x i32>
3040 ret <3 x i32> %c
3041 }
3043 define <3 x i32> @fptou_v3f32_v3i32(<3 x float> %a) {
3044 ; CHECK-LABEL: fptou_v3f32_v3i32:
3045 ; CHECK: // %bb.0: // %entry
3046 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3047 ; CHECK-NEXT: ret
3048 entry:
3049 %c = fptoui <3 x float> %a to <3 x i32>
3050 ret <3 x i32> %c
3051 }
3053 define <4 x i32> @fptos_v4f32_v4i32(<4 x float> %a) {
3054 ; CHECK-LABEL: fptos_v4f32_v4i32:
3055 ; CHECK: // %bb.0: // %entry
3056 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3057 ; CHECK-NEXT: ret
3058 entry:
3059 %c = fptosi <4 x float> %a to <4 x i32>
3060 ret <4 x i32> %c
3061 }
3063 define <4 x i32> @fptou_v4f32_v4i32(<4 x float> %a) {
3064 ; CHECK-LABEL: fptou_v4f32_v4i32:
3065 ; CHECK: // %bb.0: // %entry
3066 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3067 ; CHECK-NEXT: ret
3068 entry:
3069 %c = fptoui <4 x float> %a to <4 x i32>
3070 ret <4 x i32> %c
3071 }
3073 define <8 x i32> @fptos_v8f32_v8i32(<8 x float> %a) {
3074 ; CHECK-LABEL: fptos_v8f32_v8i32:
3075 ; CHECK: // %bb.0: // %entry
3076 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3077 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3078 ; CHECK-NEXT: ret
3079 entry:
3080 %c = fptosi <8 x float> %a to <8 x i32>
3081 ret <8 x i32> %c
3082 }
3084 define <8 x i32> @fptou_v8f32_v8i32(<8 x float> %a) {
3085 ; CHECK-LABEL: fptou_v8f32_v8i32:
3086 ; CHECK: // %bb.0: // %entry
3087 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3088 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3089 ; CHECK-NEXT: ret
3090 entry:
3091 %c = fptoui <8 x float> %a to <8 x i32>
3092 ret <8 x i32> %c
3093 }
3095 define <16 x i32> @fptos_v16f32_v16i32(<16 x float> %a) {
3096 ; CHECK-LABEL: fptos_v16f32_v16i32:
3097 ; CHECK: // %bb.0: // %entry
3098 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3099 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3100 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
3101 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
3102 ; CHECK-NEXT: ret
3103 entry:
3104 %c = fptosi <16 x float> %a to <16 x i32>
3105 ret <16 x i32> %c
3106 }
3108 define <16 x i32> @fptou_v16f32_v16i32(<16 x float> %a) {
3109 ; CHECK-LABEL: fptou_v16f32_v16i32:
3110 ; CHECK: // %bb.0: // %entry
3111 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3112 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3113 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
3114 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
3115 ; CHECK-NEXT: ret
3116 entry:
3117 %c = fptoui <16 x float> %a to <16 x i32>
3118 ret <16 x i32> %c
3119 }
3121 define <32 x i32> @fptos_v32f32_v32i32(<32 x float> %a) {
3122 ; CHECK-LABEL: fptos_v32f32_v32i32:
3123 ; CHECK: // %bb.0: // %entry
3124 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3125 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3126 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
3127 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
3128 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
3129 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
3130 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
3131 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
3132 ; CHECK-NEXT: ret
3133 entry:
3134 %c = fptosi <32 x float> %a to <32 x i32>
3135 ret <32 x i32> %c
3136 }
3138 define <32 x i32> @fptou_v32f32_v32i32(<32 x float> %a) {
3139 ; CHECK-LABEL: fptou_v32f32_v32i32:
3140 ; CHECK: // %bb.0: // %entry
3141 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3142 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3143 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
3144 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
3145 ; CHECK-NEXT: fcvtzu v4.4s, v4.4s
3146 ; CHECK-NEXT: fcvtzu v5.4s, v5.4s
3147 ; CHECK-NEXT: fcvtzu v6.4s, v6.4s
3148 ; CHECK-NEXT: fcvtzu v7.4s, v7.4s
3149 ; CHECK-NEXT: ret
3150 entry:
3151 %c = fptoui <32 x float> %a to <32 x i32>
3152 ret <32 x i32> %c
3153 }
3155 define <2 x i16> @fptos_v2f32_v2i16(<2 x float> %a) {
3156 ; CHECK-LABEL: fptos_v2f32_v2i16:
3157 ; CHECK: // %bb.0: // %entry
3158 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3159 ; CHECK-NEXT: ret
3160 entry:
3161 %c = fptosi <2 x float> %a to <2 x i16>
3162 ret <2 x i16> %c
3163 }
3165 define <2 x i16> @fptou_v2f32_v2i16(<2 x float> %a) {
3166 ; CHECK-SD-LABEL: fptou_v2f32_v2i16:
3167 ; CHECK-SD: // %bb.0: // %entry
3168 ; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s
3169 ; CHECK-SD-NEXT: ret
3170 ;
3171 ; CHECK-GI-LABEL: fptou_v2f32_v2i16:
3172 ; CHECK-GI: // %bb.0: // %entry
3173 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
3174 ; CHECK-GI-NEXT: ret
3175 entry:
3176 %c = fptoui <2 x float> %a to <2 x i16>
3177 ret <2 x i16> %c
3178 }
3180 define <3 x i16> @fptos_v3f32_v3i16(<3 x float> %a) {
3181 ; CHECK-SD-LABEL: fptos_v3f32_v3i16:
3182 ; CHECK-SD: // %bb.0: // %entry
3183 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3184 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3185 ; CHECK-SD-NEXT: ret
3186 ;
3187 ; CHECK-GI-LABEL: fptos_v3f32_v3i16:
3188 ; CHECK-GI: // %bb.0: // %entry
3189 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3190 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3191 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3192 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
3193 ; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
3194 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
3195 ; CHECK-GI-NEXT: ret
3196 entry:
3197 %c = fptosi <3 x float> %a to <3 x i16>
3198 ret <3 x i16> %c
3199 }
3201 define <3 x i16> @fptou_v3f32_v3i16(<3 x float> %a) {
3202 ; CHECK-SD-LABEL: fptou_v3f32_v3i16:
3203 ; CHECK-SD: // %bb.0: // %entry
3204 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3205 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3206 ; CHECK-SD-NEXT: ret
3207 ;
3208 ; CHECK-GI-LABEL: fptou_v3f32_v3i16:
3209 ; CHECK-GI: // %bb.0: // %entry
3210 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3211 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3212 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3213 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
3214 ; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
3215 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
3216 ; CHECK-GI-NEXT: ret
3217 entry:
3218 %c = fptoui <3 x float> %a to <3 x i16>
3219 ret <3 x i16> %c
3220 }
3222 define <4 x i16> @fptos_v4f32_v4i16(<4 x float> %a) {
3223 ; CHECK-LABEL: fptos_v4f32_v4i16:
3224 ; CHECK: // %bb.0: // %entry
3225 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3226 ; CHECK-NEXT: xtn v0.4h, v0.4s
3227 ; CHECK-NEXT: ret
3228 entry:
3229 %c = fptosi <4 x float> %a to <4 x i16>
3230 ret <4 x i16> %c
3231 }
3233 define <4 x i16> @fptou_v4f32_v4i16(<4 x float> %a) {
3234 ; CHECK-LABEL: fptou_v4f32_v4i16:
3235 ; CHECK: // %bb.0: // %entry
3236 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3237 ; CHECK-NEXT: xtn v0.4h, v0.4s
3238 ; CHECK-NEXT: ret
3239 entry:
3240 %c = fptoui <4 x float> %a to <4 x i16>
3241 ret <4 x i16> %c
3242 }
3244 define <8 x i16> @fptos_v8f32_v8i16(<8 x float> %a) {
3245 ; CHECK-SD-LABEL: fptos_v8f32_v8i16:
3246 ; CHECK-SD: // %bb.0: // %entry
3247 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3248 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3249 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3250 ; CHECK-SD-NEXT: ret
3251 ;
3252 ; CHECK-GI-LABEL: fptos_v8f32_v8i16:
3253 ; CHECK-GI: // %bb.0: // %entry
3254 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3255 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3256 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3257 ; CHECK-GI-NEXT: ret
3258 entry:
3259 %c = fptosi <8 x float> %a to <8 x i16>
3260 ret <8 x i16> %c
3261 }
3263 define <8 x i16> @fptou_v8f32_v8i16(<8 x float> %a) {
3264 ; CHECK-SD-LABEL: fptou_v8f32_v8i16:
3265 ; CHECK-SD: // %bb.0: // %entry
3266 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3267 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3268 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3269 ; CHECK-SD-NEXT: ret
3270 ;
3271 ; CHECK-GI-LABEL: fptou_v8f32_v8i16:
3272 ; CHECK-GI: // %bb.0: // %entry
3273 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3274 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3275 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3276 ; CHECK-GI-NEXT: ret
3277 entry:
3278 %c = fptoui <8 x float> %a to <8 x i16>
3279 ret <8 x i16> %c
3280 }
3282 define <16 x i16> @fptos_v16f32_v16i16(<16 x float> %a) {
3283 ; CHECK-SD-LABEL: fptos_v16f32_v16i16:
3284 ; CHECK-SD: // %bb.0: // %entry
3285 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3286 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3287 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3288 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3289 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3290 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3291 ; CHECK-SD-NEXT: ret
3292 ;
3293 ; CHECK-GI-LABEL: fptos_v16f32_v16i16:
3294 ; CHECK-GI: // %bb.0: // %entry
3295 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3296 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3297 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3298 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3299 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3300 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3301 ; CHECK-GI-NEXT: ret
3302 entry:
3303 %c = fptosi <16 x float> %a to <16 x i16>
3304 ret <16 x i16> %c
3305 }
3307 define <16 x i16> @fptou_v16f32_v16i16(<16 x float> %a) {
3308 ; CHECK-SD-LABEL: fptou_v16f32_v16i16:
3309 ; CHECK-SD: // %bb.0: // %entry
3310 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3311 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3312 ; CHECK-SD-NEXT: fcvtzu v3.4s, v3.4s
3313 ; CHECK-SD-NEXT: fcvtzu v2.4s, v2.4s
3314 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3315 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3316 ; CHECK-SD-NEXT: ret
3317 ;
3318 ; CHECK-GI-LABEL: fptou_v16f32_v16i16:
3319 ; CHECK-GI: // %bb.0: // %entry
3320 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3321 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3322 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3323 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3324 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3325 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3326 ; CHECK-GI-NEXT: ret
3327 entry:
3328 %c = fptoui <16 x float> %a to <16 x i16>
3329 ret <16 x i16> %c
3330 }
3332 define <32 x i16> @fptos_v32f32_v32i16(<32 x float> %a) {
3333 ; CHECK-SD-LABEL: fptos_v32f32_v32i16:
3334 ; CHECK-SD: // %bb.0: // %entry
3335 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3336 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3337 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3338 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3339 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3340 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3341 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3342 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3343 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3344 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3345 ; CHECK-SD-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3346 ; CHECK-SD-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3347 ; CHECK-SD-NEXT: ret
3348 ;
3349 ; CHECK-GI-LABEL: fptos_v32f32_v32i16:
3350 ; CHECK-GI: // %bb.0: // %entry
3351 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3352 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3353 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3354 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3355 ; CHECK-GI-NEXT: fcvtzs v4.4s, v4.4s
3356 ; CHECK-GI-NEXT: fcvtzs v5.4s, v5.4s
3357 ; CHECK-GI-NEXT: fcvtzs v6.4s, v6.4s
3358 ; CHECK-GI-NEXT: fcvtzs v7.4s, v7.4s
3359 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3360 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3361 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3362 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3363 ; CHECK-GI-NEXT: ret
3364 entry:
3365 %c = fptosi <32 x float> %a to <32 x i16>
3366 ret <32 x i16> %c
3367 }
3369 define <32 x i16> @fptou_v32f32_v32i16(<32 x float> %a) {
3370 ; CHECK-SD-LABEL: fptou_v32f32_v32i16:
3371 ; CHECK-SD: // %bb.0: // %entry
3372 ; CHECK-SD-NEXT: fcvtzu v3.4s, v3.4s
3373 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3374 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3375 ; CHECK-SD-NEXT: fcvtzu v2.4s, v2.4s
3376 ; CHECK-SD-NEXT: fcvtzu v5.4s, v5.4s
3377 ; CHECK-SD-NEXT: fcvtzu v4.4s, v4.4s
3378 ; CHECK-SD-NEXT: fcvtzu v7.4s, v7.4s
3379 ; CHECK-SD-NEXT: fcvtzu v6.4s, v6.4s
3380 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3381 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3382 ; CHECK-SD-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3383 ; CHECK-SD-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3384 ; CHECK-SD-NEXT: ret
3385 ;
3386 ; CHECK-GI-LABEL: fptou_v32f32_v32i16:
3387 ; CHECK-GI: // %bb.0: // %entry
3388 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3389 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3390 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3391 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3392 ; CHECK-GI-NEXT: fcvtzu v4.4s, v4.4s
3393 ; CHECK-GI-NEXT: fcvtzu v5.4s, v5.4s
3394 ; CHECK-GI-NEXT: fcvtzu v6.4s, v6.4s
3395 ; CHECK-GI-NEXT: fcvtzu v7.4s, v7.4s
3396 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3397 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3398 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3399 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3400 ; CHECK-GI-NEXT: ret
3401 entry:
3402 %c = fptoui <32 x float> %a to <32 x i16>
3403 ret <32 x i16> %c
3404 }
3406 define <2 x i8> @fptos_v2f32_v2i8(<2 x float> %a) {
3407 ; CHECK-LABEL: fptos_v2f32_v2i8:
3408 ; CHECK: // %bb.0: // %entry
3409 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3410 ; CHECK-NEXT: ret
3411 entry:
3412 %c = fptosi <2 x float> %a to <2 x i8>
3413 ret <2 x i8> %c
3414 }
3416 define <2 x i8> @fptou_v2f32_v2i8(<2 x float> %a) {
3417 ; CHECK-SD-LABEL: fptou_v2f32_v2i8:
3418 ; CHECK-SD: // %bb.0: // %entry
3419 ; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s
3420 ; CHECK-SD-NEXT: ret
3421 ;
3422 ; CHECK-GI-LABEL: fptou_v2f32_v2i8:
3423 ; CHECK-GI: // %bb.0: // %entry
3424 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
3425 ; CHECK-GI-NEXT: ret
3426 entry:
3427 %c = fptoui <2 x float> %a to <2 x i8>
3428 ret <2 x i8> %c
3429 }
3431 define <3 x i8> @fptos_v3f32_v3i8(<3 x float> %a) {
3432 ; CHECK-SD-LABEL: fptos_v3f32_v3i8:
3433 ; CHECK-SD: // %bb.0: // %entry
3434 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3435 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3436 ; CHECK-SD-NEXT: umov w0, v0.h[0]
3437 ; CHECK-SD-NEXT: umov w1, v0.h[1]
3438 ; CHECK-SD-NEXT: umov w2, v0.h[2]
3439 ; CHECK-SD-NEXT: ret
3440 ;
3441 ; CHECK-GI-LABEL: fptos_v3f32_v3i8:
3442 ; CHECK-GI: // %bb.0: // %entry
3443 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3444 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3445 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3446 ; CHECK-GI-NEXT: fmov w0, s0
3447 ; CHECK-GI-NEXT: fmov w1, s1
3448 ; CHECK-GI-NEXT: fmov w2, s2
3449 ; CHECK-GI-NEXT: ret
3450 entry:
3451 %c = fptosi <3 x float> %a to <3 x i8>
3452 ret <3 x i8> %c
3453 }
3455 define <3 x i8> @fptou_v3f32_v3i8(<3 x float> %a) {
3456 ; CHECK-SD-LABEL: fptou_v3f32_v3i8:
3457 ; CHECK-SD: // %bb.0: // %entry
3458 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3459 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3460 ; CHECK-SD-NEXT: umov w0, v0.h[0]
3461 ; CHECK-SD-NEXT: umov w1, v0.h[1]
3462 ; CHECK-SD-NEXT: umov w2, v0.h[2]
3463 ; CHECK-SD-NEXT: ret
3464 ;
3465 ; CHECK-GI-LABEL: fptou_v3f32_v3i8:
3466 ; CHECK-GI: // %bb.0: // %entry
3467 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3468 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3469 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3470 ; CHECK-GI-NEXT: fmov w0, s0
3471 ; CHECK-GI-NEXT: fmov w1, s1
3472 ; CHECK-GI-NEXT: fmov w2, s2
3473 ; CHECK-GI-NEXT: ret
3474 entry:
3475 %c = fptoui <3 x float> %a to <3 x i8>
3476 ret <3 x i8> %c
3477 }
3479 define <4 x i8> @fptos_v4f32_v4i8(<4 x float> %a) {
3480 ; CHECK-LABEL: fptos_v4f32_v4i8:
3481 ; CHECK: // %bb.0: // %entry
3482 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3483 ; CHECK-NEXT: xtn v0.4h, v0.4s
3484 ; CHECK-NEXT: ret
3485 entry:
3486 %c = fptosi <4 x float> %a to <4 x i8>
3487 ret <4 x i8> %c
3488 }
3490 define <4 x i8> @fptou_v4f32_v4i8(<4 x float> %a) {
3491 ; CHECK-SD-LABEL: fptou_v4f32_v4i8:
3492 ; CHECK-SD: // %bb.0: // %entry
3493 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3494 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3495 ; CHECK-SD-NEXT: ret
3496 ;
3497 ; CHECK-GI-LABEL: fptou_v4f32_v4i8:
3498 ; CHECK-GI: // %bb.0: // %entry
3499 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3500 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
3501 ; CHECK-GI-NEXT: ret
3502 entry:
3503 %c = fptoui <4 x float> %a to <4 x i8>
3504 ret <4 x i8> %c
3505 }
3507 define <8 x i8> @fptos_v8f32_v8i8(<8 x float> %a) {
3508 ; CHECK-SD-LABEL: fptos_v8f32_v8i8:
3509 ; CHECK-SD: // %bb.0: // %entry
3510 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3511 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3512 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3513 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
3514 ; CHECK-SD-NEXT: ret
3515 ;
3516 ; CHECK-GI-LABEL: fptos_v8f32_v8i8:
3517 ; CHECK-GI: // %bb.0: // %entry
3518 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3519 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3520 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3521 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
3522 ; CHECK-GI-NEXT: ret
3523 entry:
3524 %c = fptosi <8 x float> %a to <8 x i8>
3525 ret <8 x i8> %c
3526 }
3528 define <8 x i8> @fptou_v8f32_v8i8(<8 x float> %a) {
3529 ; CHECK-SD-LABEL: fptou_v8f32_v8i8:
3530 ; CHECK-SD: // %bb.0: // %entry
3531 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3532 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3533 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3534 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
3535 ; CHECK-SD-NEXT: ret
3536 ;
3537 ; CHECK-GI-LABEL: fptou_v8f32_v8i8:
3538 ; CHECK-GI: // %bb.0: // %entry
3539 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3540 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3541 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3542 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
3543 ; CHECK-GI-NEXT: ret
3544 entry:
3545 %c = fptoui <8 x float> %a to <8 x i8>
3546 ret <8 x i8> %c
3547 }
3549 define <16 x i8> @fptos_v16f32_v16i8(<16 x float> %a) {
3550 ; CHECK-SD-LABEL: fptos_v16f32_v16i8:
3551 ; CHECK-SD: // %bb.0: // %entry
3552 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3553 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3554 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3555 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3556 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3557 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3558 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3559 ; CHECK-SD-NEXT: ret
3560 ;
3561 ; CHECK-GI-LABEL: fptos_v16f32_v16i8:
3562 ; CHECK-GI: // %bb.0: // %entry
3563 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3564 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3565 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3566 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3567 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3568 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3569 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3570 ; CHECK-GI-NEXT: ret
3571 entry:
3572 %c = fptosi <16 x float> %a to <16 x i8>
3573 ret <16 x i8> %c
3574 }
3576 define <16 x i8> @fptou_v16f32_v16i8(<16 x float> %a) {
3577 ; CHECK-SD-LABEL: fptou_v16f32_v16i8:
3578 ; CHECK-SD: // %bb.0: // %entry
3579 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3580 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3581 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3582 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3583 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3584 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3585 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3586 ; CHECK-SD-NEXT: ret
3587 ;
3588 ; CHECK-GI-LABEL: fptou_v16f32_v16i8:
3589 ; CHECK-GI: // %bb.0: // %entry
3590 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3591 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3592 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3593 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3594 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3595 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3596 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3597 ; CHECK-GI-NEXT: ret
3598 entry:
3599 %c = fptoui <16 x float> %a to <16 x i8>
3600 ret <16 x i8> %c
3601 }
3603 define <32 x i8> @fptos_v32f32_v32i8(<32 x float> %a) {
3604 ; CHECK-SD-LABEL: fptos_v32f32_v32i8:
3605 ; CHECK-SD: // %bb.0: // %entry
3606 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3607 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3608 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3609 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3610 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3611 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3612 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3613 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3614 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3615 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3616 ; CHECK-SD-NEXT: uzp1 v1.8h, v6.8h, v7.8h
3617 ; CHECK-SD-NEXT: uzp1 v3.8h, v4.8h, v5.8h
3618 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3619 ; CHECK-SD-NEXT: uzp1 v1.16b, v3.16b, v1.16b
3620 ; CHECK-SD-NEXT: ret
3621 ;
3622 ; CHECK-GI-LABEL: fptos_v32f32_v32i8:
3623 ; CHECK-GI: // %bb.0: // %entry
3624 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3625 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3626 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3627 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3628 ; CHECK-GI-NEXT: fcvtzs v4.4s, v4.4s
3629 ; CHECK-GI-NEXT: fcvtzs v5.4s, v5.4s
3630 ; CHECK-GI-NEXT: fcvtzs v6.4s, v6.4s
3631 ; CHECK-GI-NEXT: fcvtzs v7.4s, v7.4s
3632 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3633 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3634 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3635 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3636 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3637 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
3638 ; CHECK-GI-NEXT: ret
3639 entry:
3640 %c = fptosi <32 x float> %a to <32 x i8>
3641 ret <32 x i8> %c
3642 }
3644 define <32 x i8> @fptou_v32f32_v32i8(<32 x float> %a) {
3645 ; CHECK-SD-LABEL: fptou_v32f32_v32i8:
3646 ; CHECK-SD: // %bb.0: // %entry
3647 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3648 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3649 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3650 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3651 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3652 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3653 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3654 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3655 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3656 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3657 ; CHECK-SD-NEXT: uzp1 v1.8h, v6.8h, v7.8h
3658 ; CHECK-SD-NEXT: uzp1 v3.8h, v4.8h, v5.8h
3659 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3660 ; CHECK-SD-NEXT: uzp1 v1.16b, v3.16b, v1.16b
3661 ; CHECK-SD-NEXT: ret
3662 ;
3663 ; CHECK-GI-LABEL: fptou_v32f32_v32i8:
3664 ; CHECK-GI: // %bb.0: // %entry
3665 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3666 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3667 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3668 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3669 ; CHECK-GI-NEXT: fcvtzu v4.4s, v4.4s
3670 ; CHECK-GI-NEXT: fcvtzu v5.4s, v5.4s
3671 ; CHECK-GI-NEXT: fcvtzu v6.4s, v6.4s
3672 ; CHECK-GI-NEXT: fcvtzu v7.4s, v7.4s
3673 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3674 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3675 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3676 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3677 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3678 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
3679 ; CHECK-GI-NEXT: ret
3680 entry:
3681 %c = fptoui <32 x float> %a to <32 x i8>
3682 ret <32 x i8> %c
3683 }
3685 define <2 x i128> @fptos_v2f32_v2i128(<2 x float> %a) {
3686 ; CHECK-SD-LABEL: fptos_v2f32_v2i128:
3687 ; CHECK-SD: // %bb.0: // %entry
3688 ; CHECK-SD-NEXT: sub sp, sp, #48
3689 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3690 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
3691 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
3692 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3693 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3694 ; CHECK-SD-NEXT: .cfi_offset w30, -32
3695 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
3696 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3697 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3698 ; CHECK-SD-NEXT: bl __fixsfti
3699 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3700 ; CHECK-SD-NEXT: mov x19, x0
3701 ; CHECK-SD-NEXT: mov x20, x1
3702 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3703 ; CHECK-SD-NEXT: bl __fixsfti
3704 ; CHECK-SD-NEXT: fmov d0, x0
3705 ; CHECK-SD-NEXT: mov x2, x19
3706 ; CHECK-SD-NEXT: mov x3, x20
3707 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
3708 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3709 ; CHECK-SD-NEXT: mov v0.d[1], x1
3710 ; CHECK-SD-NEXT: fmov x0, d0
3711 ; CHECK-SD-NEXT: add sp, sp, #48
3712 ; CHECK-SD-NEXT: ret
3713 ;
3714 ; CHECK-GI-LABEL: fptos_v2f32_v2i128:
3715 ; CHECK-GI: // %bb.0: // %entry
3716 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
3717 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
3718 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
3719 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
3720 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3721 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3722 ; CHECK-GI-NEXT: .cfi_offset w30, -24
3723 ; CHECK-GI-NEXT: .cfi_offset b8, -32
3724 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
3725 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3726 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3727 ; CHECK-GI-NEXT: bl __fixsfti
3728 ; CHECK-GI-NEXT: fmov s0, s8
3729 ; CHECK-GI-NEXT: mov x19, x0
3730 ; CHECK-GI-NEXT: mov x20, x1
3731 ; CHECK-GI-NEXT: bl __fixsfti
3732 ; CHECK-GI-NEXT: mov x2, x0
3733 ; CHECK-GI-NEXT: mov x3, x1
3734 ; CHECK-GI-NEXT: mov x0, x19
3735 ; CHECK-GI-NEXT: mov x1, x20
3736 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
3737 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
3738 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
3739 ; CHECK-GI-NEXT: ret
3740 entry:
3741 %c = fptosi <2 x float> %a to <2 x i128>
3742 ret <2 x i128> %c
3743 }
3745 define <2 x i128> @fptou_v2f32_v2i128(<2 x float> %a) {
3746 ; CHECK-SD-LABEL: fptou_v2f32_v2i128:
3747 ; CHECK-SD: // %bb.0: // %entry
3748 ; CHECK-SD-NEXT: sub sp, sp, #48
3749 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3750 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
3751 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
3752 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3753 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3754 ; CHECK-SD-NEXT: .cfi_offset w30, -32
3755 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
3756 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3757 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3758 ; CHECK-SD-NEXT: bl __fixunssfti
3759 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3760 ; CHECK-SD-NEXT: mov x19, x0
3761 ; CHECK-SD-NEXT: mov x20, x1
3762 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3763 ; CHECK-SD-NEXT: bl __fixunssfti
3764 ; CHECK-SD-NEXT: fmov d0, x0
3765 ; CHECK-SD-NEXT: mov x2, x19
3766 ; CHECK-SD-NEXT: mov x3, x20
3767 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
3768 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3769 ; CHECK-SD-NEXT: mov v0.d[1], x1
3770 ; CHECK-SD-NEXT: fmov x0, d0
3771 ; CHECK-SD-NEXT: add sp, sp, #48
3772 ; CHECK-SD-NEXT: ret
3773 ;
3774 ; CHECK-GI-LABEL: fptou_v2f32_v2i128:
3775 ; CHECK-GI: // %bb.0: // %entry
3776 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
3777 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
3778 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
3779 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
3780 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3781 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3782 ; CHECK-GI-NEXT: .cfi_offset w30, -24
3783 ; CHECK-GI-NEXT: .cfi_offset b8, -32
3784 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
3785 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3786 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3787 ; CHECK-GI-NEXT: bl __fixunssfti
3788 ; CHECK-GI-NEXT: fmov s0, s8
3789 ; CHECK-GI-NEXT: mov x19, x0
3790 ; CHECK-GI-NEXT: mov x20, x1
3791 ; CHECK-GI-NEXT: bl __fixunssfti
3792 ; CHECK-GI-NEXT: mov x2, x0
3793 ; CHECK-GI-NEXT: mov x3, x1
3794 ; CHECK-GI-NEXT: mov x0, x19
3795 ; CHECK-GI-NEXT: mov x1, x20
3796 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
3797 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
3798 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
3799 ; CHECK-GI-NEXT: ret
3800 entry:
3801 %c = fptoui <2 x float> %a to <2 x i128>
3802 ret <2 x i128> %c
3803 }
3805 define <3 x i128> @fptos_v3f32_v3i128(<3 x float> %a) {
3806 ; CHECK-SD-LABEL: fptos_v3f32_v3i128:
3807 ; CHECK-SD: // %bb.0: // %entry
3808 ; CHECK-SD-NEXT: sub sp, sp, #64
3809 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3810 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3811 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3812 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
3813 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3814 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3815 ; CHECK-SD-NEXT: .cfi_offset w21, -24
3816 ; CHECK-SD-NEXT: .cfi_offset w22, -32
3817 ; CHECK-SD-NEXT: .cfi_offset w30, -48
3818 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3819 ; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3820 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3821 ; CHECK-SD-NEXT: bl __fixsfti
3822 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3823 ; CHECK-SD-NEXT: mov x19, x0
3824 ; CHECK-SD-NEXT: mov x20, x1
3825 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3826 ; CHECK-SD-NEXT: bl __fixsfti
3827 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3828 ; CHECK-SD-NEXT: mov x21, x0
3829 ; CHECK-SD-NEXT: mov x22, x1
3830 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3831 ; CHECK-SD-NEXT: bl __fixsfti
3832 ; CHECK-SD-NEXT: fmov d0, x0
3833 ; CHECK-SD-NEXT: mov x2, x21
3834 ; CHECK-SD-NEXT: mov x3, x22
3835 ; CHECK-SD-NEXT: mov x4, x19
3836 ; CHECK-SD-NEXT: mov x5, x20
3837 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3838 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3839 ; CHECK-SD-NEXT: mov v0.d[1], x1
3840 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3841 ; CHECK-SD-NEXT: fmov x0, d0
3842 ; CHECK-SD-NEXT: add sp, sp, #64
3843 ; CHECK-SD-NEXT: ret
3844 ;
3845 ; CHECK-GI-LABEL: fptos_v3f32_v3i128:
3846 ; CHECK-GI: // %bb.0: // %entry
3847 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
3848 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3849 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3850 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3851 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
3852 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3853 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3854 ; CHECK-GI-NEXT: .cfi_offset w21, -24
3855 ; CHECK-GI-NEXT: .cfi_offset w22, -32
3856 ; CHECK-GI-NEXT: .cfi_offset w30, -48
3857 ; CHECK-GI-NEXT: .cfi_offset b8, -56
3858 ; CHECK-GI-NEXT: .cfi_offset b9, -64
3859 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3860 ; CHECK-GI-NEXT: mov s9, v0.s[2]
3861 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3862 ; CHECK-GI-NEXT: bl __fixsfti
3863 ; CHECK-GI-NEXT: fmov s0, s8
3864 ; CHECK-GI-NEXT: mov x19, x0
3865 ; CHECK-GI-NEXT: mov x20, x1
3866 ; CHECK-GI-NEXT: bl __fixsfti
3867 ; CHECK-GI-NEXT: fmov s0, s9
3868 ; CHECK-GI-NEXT: mov x21, x0
3869 ; CHECK-GI-NEXT: mov x22, x1
3870 ; CHECK-GI-NEXT: bl __fixsfti
3871 ; CHECK-GI-NEXT: mov x4, x0
3872 ; CHECK-GI-NEXT: mov x5, x1
3873 ; CHECK-GI-NEXT: mov x0, x19
3874 ; CHECK-GI-NEXT: mov x1, x20
3875 ; CHECK-GI-NEXT: mov x2, x21
3876 ; CHECK-GI-NEXT: mov x3, x22
3877 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3878 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3879 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3880 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
3881 ; CHECK-GI-NEXT: ret
3882 entry:
3883 %c = fptosi <3 x float> %a to <3 x i128>
3884 ret <3 x i128> %c
3885 }
3887 define <3 x i128> @fptou_v3f32_v3i128(<3 x float> %a) {
3888 ; CHECK-SD-LABEL: fptou_v3f32_v3i128:
3889 ; CHECK-SD: // %bb.0: // %entry
3890 ; CHECK-SD-NEXT: sub sp, sp, #64
3891 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3892 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3893 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3894 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
3895 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3896 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3897 ; CHECK-SD-NEXT: .cfi_offset w21, -24
3898 ; CHECK-SD-NEXT: .cfi_offset w22, -32
3899 ; CHECK-SD-NEXT: .cfi_offset w30, -48
3900 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3901 ; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3902 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3903 ; CHECK-SD-NEXT: bl __fixunssfti
3904 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3905 ; CHECK-SD-NEXT: mov x19, x0
3906 ; CHECK-SD-NEXT: mov x20, x1
3907 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3908 ; CHECK-SD-NEXT: bl __fixunssfti
3909 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3910 ; CHECK-SD-NEXT: mov x21, x0
3911 ; CHECK-SD-NEXT: mov x22, x1
3912 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3913 ; CHECK-SD-NEXT: bl __fixunssfti
3914 ; CHECK-SD-NEXT: fmov d0, x0
3915 ; CHECK-SD-NEXT: mov x2, x21
3916 ; CHECK-SD-NEXT: mov x3, x22
3917 ; CHECK-SD-NEXT: mov x4, x19
3918 ; CHECK-SD-NEXT: mov x5, x20
3919 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3920 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3921 ; CHECK-SD-NEXT: mov v0.d[1], x1
3922 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3923 ; CHECK-SD-NEXT: fmov x0, d0
3924 ; CHECK-SD-NEXT: add sp, sp, #64
3925 ; CHECK-SD-NEXT: ret
3926 ;
3927 ; CHECK-GI-LABEL: fptou_v3f32_v3i128:
3928 ; CHECK-GI: // %bb.0: // %entry
3929 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
3930 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3931 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3932 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3933 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
3934 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3935 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3936 ; CHECK-GI-NEXT: .cfi_offset w21, -24
3937 ; CHECK-GI-NEXT: .cfi_offset w22, -32
3938 ; CHECK-GI-NEXT: .cfi_offset w30, -48
3939 ; CHECK-GI-NEXT: .cfi_offset b8, -56
3940 ; CHECK-GI-NEXT: .cfi_offset b9, -64
3941 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3942 ; CHECK-GI-NEXT: mov s9, v0.s[2]
3943 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3944 ; CHECK-GI-NEXT: bl __fixunssfti
3945 ; CHECK-GI-NEXT: fmov s0, s8
3946 ; CHECK-GI-NEXT: mov x19, x0
3947 ; CHECK-GI-NEXT: mov x20, x1
3948 ; CHECK-GI-NEXT: bl __fixunssfti
3949 ; CHECK-GI-NEXT: fmov s0, s9
3950 ; CHECK-GI-NEXT: mov x21, x0
3951 ; CHECK-GI-NEXT: mov x22, x1
3952 ; CHECK-GI-NEXT: bl __fixunssfti
3953 ; CHECK-GI-NEXT: mov x4, x0
3954 ; CHECK-GI-NEXT: mov x5, x1
3955 ; CHECK-GI-NEXT: mov x0, x19
3956 ; CHECK-GI-NEXT: mov x1, x20
3957 ; CHECK-GI-NEXT: mov x2, x21
3958 ; CHECK-GI-NEXT: mov x3, x22
3959 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3960 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3961 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3962 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
3963 ; CHECK-GI-NEXT: ret
3964 entry:
3965 %c = fptoui <3 x float> %a to <3 x i128>
3966 ret <3 x i128> %c
3967 }
3969 define <2 x i64> @fptos_v2f16_v2i64(<2 x half> %a) {
3970 ; CHECK-SD-NOFP16-LABEL: fptos_v2f16_v2i64:
3971 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3972 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
3973 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
3974 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
3975 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3976 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
3977 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
3978 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
3979 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
3980 ; CHECK-SD-NOFP16-NEXT: ret
3981 ;
3982 ; CHECK-SD-FP16-LABEL: fptos_v2f16_v2i64:
3983 ; CHECK-SD-FP16: // %bb.0: // %entry
3984 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
3985 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
3986 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
3987 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
3988 ; CHECK-SD-FP16-NEXT: fmov d0, x8
3989 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
3990 ; CHECK-SD-FP16-NEXT: ret
3991 ;
3992 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i64:
3993 ; CHECK-GI-NOFP16: // %bb.0: // %entry
3994 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
3995 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
3996 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
3997 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
3998 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v0.2s
3999 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
4000 ; CHECK-GI-NOFP16-NEXT: ret
4001 ;
4002 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i64:
4003 ; CHECK-GI-FP16: // %bb.0: // %entry
4004 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4005 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4006 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4007 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4008 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4009 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4010 ; CHECK-GI-FP16-NEXT: ret
4011 entry:
4012 %c = fptosi <2 x half> %a to <2 x i64>
4013 ret <2 x i64> %c
4014 }
4016 define <2 x i64> @fptou_v2f16_v2i64(<2 x half> %a) {
4017 ; CHECK-SD-NOFP16-LABEL: fptou_v2f16_v2i64:
4018 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4019 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4020 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
4021 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4022 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4023 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
4024 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4025 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4026 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
4027 ; CHECK-SD-NOFP16-NEXT: ret
4028 ;
4029 ; CHECK-SD-FP16-LABEL: fptou_v2f16_v2i64:
4030 ; CHECK-SD-FP16: // %bb.0: // %entry
4031 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4032 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4033 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4034 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4035 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4036 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
4037 ; CHECK-SD-FP16-NEXT: ret
4038 ;
4039 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i64:
4040 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4041 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4042 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
4043 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
4044 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4045 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v0.2s
4046 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
4047 ; CHECK-GI-NOFP16-NEXT: ret
4048 ;
4049 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i64:
4050 ; CHECK-GI-FP16: // %bb.0: // %entry
4051 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4052 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4053 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4054 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4055 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4056 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4057 ; CHECK-GI-FP16-NEXT: ret
4058 entry:
4059 %c = fptoui <2 x half> %a to <2 x i64>
4060 ret <2 x i64> %c
4061 }
4063 define <3 x i64> @fptos_v3f16_v3i64(<3 x half> %a) {
4064 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i64:
4065 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4066 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4067 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
4068 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
4069 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4070 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4071 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4072 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
4073 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4074 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4075 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4076 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4077 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
4078 ; CHECK-SD-NOFP16-NEXT: ret
4079 ;
4080 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i64:
4081 ; CHECK-SD-FP16: // %bb.0: // %entry
4082 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4083 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4084 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
4085 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4086 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4087 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4088 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4089 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4090 ; CHECK-SD-FP16-NEXT: fmov d2, x10
4091 ; CHECK-SD-FP16-NEXT: ret
4092 ;
4093 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i64:
4094 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4095 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4096 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4097 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4098 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v1.2d
4099 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v2.2d
4100 ; CHECK-GI-NOFP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4101 ; CHECK-GI-NOFP16-NEXT: mov d1, v0.d[1]
4102 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4103 ; CHECK-GI-NOFP16-NEXT: ret
4104 ;
4105 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i64:
4106 ; CHECK-GI-FP16: // %bb.0: // %entry
4107 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4108 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4109 ; CHECK-GI-FP16-NEXT: fcvt d1, h0
4110 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[2]
4111 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4112 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4113 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4114 ; CHECK-GI-FP16-NEXT: fcvt d2, h3
4115 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4116 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v1.d[0]
4117 ; CHECK-GI-FP16-NEXT: mov d1, v0.d[1]
4118 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v2.2d
4119 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4120 ; CHECK-GI-FP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4121 ; CHECK-GI-FP16-NEXT: ret
4122 entry:
4123 %c = fptosi <3 x half> %a to <3 x i64>
4124 ret <3 x i64> %c
4125 }
4127 define <3 x i64> @fptou_v3f16_v3i64(<3 x half> %a) {
4128 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i64:
4129 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4130 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4131 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
4132 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
4133 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4134 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4135 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4136 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
4137 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4138 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4139 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4140 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4141 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
4142 ; CHECK-SD-NOFP16-NEXT: ret
4143 ;
4144 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i64:
4145 ; CHECK-SD-FP16: // %bb.0: // %entry
4146 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4147 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4148 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
4149 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4150 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4151 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4152 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4153 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4154 ; CHECK-SD-FP16-NEXT: fmov d2, x10
4155 ; CHECK-SD-FP16-NEXT: ret
4156 ;
4157 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i64:
4158 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4159 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4160 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4161 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4162 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v1.2d
4163 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v2.2d
4164 ; CHECK-GI-NOFP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4165 ; CHECK-GI-NOFP16-NEXT: mov d1, v0.d[1]
4166 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4167 ; CHECK-GI-NOFP16-NEXT: ret
4168 ;
4169 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i64:
4170 ; CHECK-GI-FP16: // %bb.0: // %entry
4171 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4172 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4173 ; CHECK-GI-FP16-NEXT: fcvt d1, h0
4174 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[2]
4175 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4176 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4177 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4178 ; CHECK-GI-FP16-NEXT: fcvt d2, h3
4179 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4180 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v1.d[0]
4181 ; CHECK-GI-FP16-NEXT: mov d1, v0.d[1]
4182 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v2.2d
4183 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4184 ; CHECK-GI-FP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4185 ; CHECK-GI-FP16-NEXT: ret
4186 entry:
4187 %c = fptoui <3 x half> %a to <3 x i64>
4188 ret <3 x i64> %c
4189 }
4191 define <4 x i64> @fptos_v4f16_v4i64(<4 x half> %a) {
4192 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i64:
4193 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4194 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4195 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
4196 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
4197 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
4198 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4199 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4200 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4201 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4202 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
4203 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4204 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4205 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
4206 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4207 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4208 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
4209 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
4210 ; CHECK-SD-NOFP16-NEXT: ret
4211 ;
4212 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i64:
4213 ; CHECK-SD-FP16: // %bb.0: // %entry
4214 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4215 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
4216 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
4217 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
4218 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4219 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4220 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4221 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
4222 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4223 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4224 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4225 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
4226 ; CHECK-SD-FP16-NEXT: ret
4227 ;
4228 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i64:
4229 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4230 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4231 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4232 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4233 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v1.2d
4234 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v2.2d
4235 ; CHECK-GI-NOFP16-NEXT: ret
4236 ;
4237 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i64:
4238 ; CHECK-GI-FP16: // %bb.0: // %entry
4239 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4240 ; CHECK-GI-FP16-NEXT: mov s1, v0.s[1]
4241 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4242 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4243 ; CHECK-GI-FP16-NEXT: mov h3, v1.h[1]
4244 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4245 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4246 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4247 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4248 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v3.d[0]
4249 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4250 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v1.2d
4251 ; CHECK-GI-FP16-NEXT: ret
4252 entry:
4253 %c = fptosi <4 x half> %a to <4 x i64>
4254 ret <4 x i64> %c
4255 }
4257 define <4 x i64> @fptou_v4f16_v4i64(<4 x half> %a) {
4258 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i64:
4259 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4260 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4261 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
4262 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
4263 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
4264 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4265 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4266 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4267 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4268 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
4269 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4270 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4271 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
4272 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4273 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4274 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
4275 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
4276 ; CHECK-SD-NOFP16-NEXT: ret
4277 ;
4278 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i64:
4279 ; CHECK-SD-FP16: // %bb.0: // %entry
4280 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4281 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
4282 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
4283 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
4284 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4285 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4286 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4287 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
4288 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4289 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4290 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4291 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
4292 ; CHECK-SD-FP16-NEXT: ret
4293 ;
4294 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i64:
4295 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4296 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4297 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4298 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4299 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v1.2d
4300 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v2.2d
4301 ; CHECK-GI-NOFP16-NEXT: ret
4302 ;
4303 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i64:
4304 ; CHECK-GI-FP16: // %bb.0: // %entry
4305 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4306 ; CHECK-GI-FP16-NEXT: mov s1, v0.s[1]
4307 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4308 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4309 ; CHECK-GI-FP16-NEXT: mov h3, v1.h[1]
4310 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4311 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4312 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4313 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4314 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v3.d[0]
4315 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4316 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v1.2d
4317 ; CHECK-GI-FP16-NEXT: ret
4318 entry:
4319 %c = fptoui <4 x half> %a to <4 x i64>
4320 ret <4 x i64> %c
4321 }
4323 define <8 x i64> @fptos_v8f16_v8i64(<8 x half> %a) {
4324 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i64:
4325 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4326 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4327 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
4328 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
4329 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
4330 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4331 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
4332 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4333 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
4334 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4335 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4336 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4337 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
4338 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s0
4339 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4340 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4341 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4342 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s1
4343 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
4344 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
4345 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s7
4346 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
4347 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4348 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
4349 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
4350 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
4351 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
4352 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4353 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
4354 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
4355 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
4356 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4357 ; CHECK-SD-NOFP16-NEXT: ret
4358 ;
4359 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i64:
4360 ; CHECK-SD-FP16: // %bb.0: // %entry
4361 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4362 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
4363 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
4364 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
4365 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
4366 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
4367 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
4368 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
4369 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h1
4370 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h4
4371 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
4372 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h7
4373 ; CHECK-SD-FP16-NEXT: fmov d0, x9
4374 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4375 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h5
4376 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
4377 ; CHECK-SD-FP16-NEXT: fmov d2, x8
4378 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4379 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
4380 ; CHECK-SD-FP16-NEXT: fmov d3, x10
4381 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
4382 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
4383 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
4384 ; CHECK-SD-FP16-NEXT: ret
4385 ;
4386 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i64:
4387 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4388 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
4389 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4390 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.2d, v1.2s
4391 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
4392 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.2d, v0.2s
4393 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v0.4s
4394 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v2.2d
4395 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
4396 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v3.2d
4397 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v4.2d
4398 ; CHECK-GI-NOFP16-NEXT: ret
4399 ;
4400 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i64:
4401 ; CHECK-GI-FP16: // %bb.0: // %entry
4402 ; CHECK-GI-FP16-NEXT: mov s1, v0.s[1]
4403 ; CHECK-GI-FP16-NEXT: mov s2, v0.s[2]
4404 ; CHECK-GI-FP16-NEXT: mov s3, v0.s[3]
4405 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
4406 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4407 ; CHECK-GI-FP16-NEXT: mov h5, v1.h[1]
4408 ; CHECK-GI-FP16-NEXT: mov h6, v2.h[1]
4409 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[1]
4410 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4411 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4412 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4413 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4414 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4415 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4416 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4417 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v4.d[0]
4418 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v5.d[0]
4419 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v6.d[0]
4420 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v7.d[0]
4421 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4422 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v1.2d
4423 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v2.2d
4424 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v3.2d
4425 ; CHECK-GI-FP16-NEXT: ret
4426 entry:
4427 %c = fptosi <8 x half> %a to <8 x i64>
4428 ret <8 x i64> %c
4429 }
4431 define <8 x i64> @fptou_v8f16_v8i64(<8 x half> %a) {
4432 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i64:
4433 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4434 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4435 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
4436 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
4437 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
4438 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4439 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
4440 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4441 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
4442 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4443 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4444 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4445 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
4446 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s0
4447 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4448 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4449 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4450 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s1
4451 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
4452 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
4453 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s7
4454 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
4455 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4456 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
4457 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
4458 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
4459 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
4460 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4461 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
4462 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
4463 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
4464 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4465 ; CHECK-SD-NOFP16-NEXT: ret
4466 ;
4467 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i64:
4468 ; CHECK-SD-FP16: // %bb.0: // %entry
4469 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4470 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
4471 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
4472 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
4473 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
4474 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
4475 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
4476 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
4477 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h1
4478 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h4
4479 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
4480 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h7
4481 ; CHECK-SD-FP16-NEXT: fmov d0, x9
4482 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4483 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h5
4484 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
4485 ; CHECK-SD-FP16-NEXT: fmov d2, x8
4486 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4487 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
4488 ; CHECK-SD-FP16-NEXT: fmov d3, x10
4489 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
4490 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
4491 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
4492 ; CHECK-SD-FP16-NEXT: ret
4493 ;
4494 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i64:
4495 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4496 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
4497 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4498 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.2d, v1.2s
4499 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
4500 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.2d, v0.2s
4501 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v0.4s
4502 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v2.2d
4503 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
4504 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v3.2d
4505 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v4.2d
4506 ; CHECK-GI-NOFP16-NEXT: ret
4507 ;
4508 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i64:
4509 ; CHECK-GI-FP16: // %bb.0: // %entry
4510 ; CHECK-GI-FP16-NEXT: mov s1, v0.s[1]
4511 ; CHECK-GI-FP16-NEXT: mov s2, v0.s[2]
4512 ; CHECK-GI-FP16-NEXT: mov s3, v0.s[3]
4513 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
4514 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4515 ; CHECK-GI-FP16-NEXT: mov h5, v1.h[1]
4516 ; CHECK-GI-FP16-NEXT: mov h6, v2.h[1]
4517 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[1]
4518 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4519 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4520 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4521 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4522 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4523 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4524 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4525 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v4.d[0]
4526 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v5.d[0]
4527 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v6.d[0]
4528 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v7.d[0]
4529 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4530 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v1.2d
4531 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v2.2d
4532 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v3.2d
4533 ; CHECK-GI-FP16-NEXT: ret
4534 entry:
4535 %c = fptoui <8 x half> %a to <8 x i64>
4536 ret <8 x i64> %c
4537 }
4539 define <16 x i64> @fptos_v16f16_v16i64(<16 x half> %a) {
4540 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i64:
4541 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4542 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4543 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4544 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
4545 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
4546 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
4547 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
4548 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
4549 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
4550 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
4551 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
4552 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4553 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4554 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s5
4555 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4556 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
4557 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4558 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4559 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s6
4560 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
4561 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4562 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
4563 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4564 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
4565 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
4566 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s4
4567 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
4568 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
4569 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4570 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4571 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s7
4572 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s6
4573 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
4574 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4575 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s17
4576 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
4577 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
4578 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4579 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
4580 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4581 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4582 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
4583 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
4584 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
4585 ; CHECK-SD-NOFP16-NEXT: fcvtzs x16, s5
4586 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s7
4587 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
4588 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
4589 ; CHECK-SD-NOFP16-NEXT: fcvtzs x17, s17
4590 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s4
4591 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4592 ; CHECK-SD-NOFP16-NEXT: fcvtzs x18, s19
4593 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
4594 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
4595 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
4596 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
4597 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4598 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4599 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
4600 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
4601 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
4602 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
4603 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
4604 ; CHECK-SD-NOFP16-NEXT: ret
4605 ;
4606 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i64:
4607 ; CHECK-SD-FP16: // %bb.0: // %entry
4608 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4609 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4610 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
4611 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
4612 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4613 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
4614 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4615 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
4616 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
4617 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
4618 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h4
4619 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
4620 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
4621 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h5
4622 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
4623 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
4624 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h3
4625 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
4626 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
4627 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
4628 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
4629 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h16
4630 ; CHECK-SD-FP16-NEXT: fcvtzs x16, h0
4631 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h4
4632 ; CHECK-SD-FP16-NEXT: fcvtzs x17, h7
4633 ; CHECK-SD-FP16-NEXT: fmov d2, x11
4634 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h5
4635 ; CHECK-SD-FP16-NEXT: fcvtzs x18, h17
4636 ; CHECK-SD-FP16-NEXT: fmov d6, x13
4637 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h18
4638 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4639 ; CHECK-SD-FP16-NEXT: fmov d4, x9
4640 ; CHECK-SD-FP16-NEXT: fmov d3, x14
4641 ; CHECK-SD-FP16-NEXT: fmov d7, x15
4642 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
4643 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h1
4644 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4645 ; CHECK-SD-FP16-NEXT: fmov d5, x0
4646 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4647 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
4648 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
4649 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
4650 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
4651 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
4652 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
4653 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
4654 ; CHECK-SD-FP16-NEXT: ret
4655 ;
4656 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i64:
4657 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4658 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
4659 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4660 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
4661 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
4662 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
4663 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
4664 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.2d, v0.2s
4665 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v0.4s
4666 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v3.2s
4667 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v16.2d, v3.4s
4668 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v1.2s
4669 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v18.2d, v1.4s
4670 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v4.2d
4671 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v2.2d
4672 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v5.2d
4673 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v6.2d
4674 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v7.2d
4675 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v16.2d
4676 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v17.2d
4677 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v18.2d
4678 ; CHECK-GI-NOFP16-NEXT: ret
4679 ;
4680 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i64:
4681 ; CHECK-GI-FP16: // %bb.0: // %entry
4682 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
4683 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
4684 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[3]
4685 ; CHECK-GI-FP16-NEXT: fcvt d2, h0
4686 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[4]
4687 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[5]
4688 ; CHECK-GI-FP16-NEXT: mov h16, v0.h[6]
4689 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]
4690 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[1]
4691 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[2]
4692 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[3]
4693 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[4]
4694 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[5]
4695 ; CHECK-GI-FP16-NEXT: mov h22, v1.h[6]
4696 ; CHECK-GI-FP16-NEXT: mov h23, v1.h[7]
4697 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4698 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4699 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4700 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4701 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4702 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
4703 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4704 ; CHECK-GI-FP16-NEXT: fcvt d24, h1
4705 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
4706 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
4707 ; CHECK-GI-FP16-NEXT: fcvt d18, h19
4708 ; CHECK-GI-FP16-NEXT: fcvt d19, h20
4709 ; CHECK-GI-FP16-NEXT: fcvt d20, h21
4710 ; CHECK-GI-FP16-NEXT: fcvt d21, h22
4711 ; CHECK-GI-FP16-NEXT: fcvt d22, h23
4712 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4713 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4714 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4715 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v0.d[0]
4716 ; CHECK-GI-FP16-NEXT: mov v24.d[1], v1.d[0]
4717 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v18.d[0]
4718 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v20.d[0]
4719 ; CHECK-GI-FP16-NEXT: mov v21.d[1], v22.d[0]
4720 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v2.2d
4721 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v4.2d
4722 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v6.2d
4723 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v16.2d
4724 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v24.2d
4725 ; CHECK-GI-FP16-NEXT: fcvtzs v5.2d, v17.2d
4726 ; CHECK-GI-FP16-NEXT: fcvtzs v6.2d, v19.2d
4727 ; CHECK-GI-FP16-NEXT: fcvtzs v7.2d, v21.2d
4728 ; CHECK-GI-FP16-NEXT: ret
4729 entry:
4730 %c = fptosi <16 x half> %a to <16 x i64>
4731 ret <16 x i64> %c
4732 }
4734 define <16 x i64> @fptou_v16f16_v16i64(<16 x half> %a) {
4735 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i64:
4736 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4737 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4738 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4739 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
4740 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
4741 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
4742 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
4743 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
4744 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
4745 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
4746 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
4747 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4748 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4749 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s5
4750 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4751 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
4752 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4753 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4754 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s6
4755 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
4756 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4757 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
4758 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4759 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
4760 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
4761 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s4
4762 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
4763 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
4764 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4765 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4766 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s7
4767 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s6
4768 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
4769 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4770 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s17
4771 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
4772 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
4773 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4774 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
4775 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4776 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4777 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
4778 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
4779 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
4780 ; CHECK-SD-NOFP16-NEXT: fcvtzu x16, s5
4781 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s7
4782 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
4783 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
4784 ; CHECK-SD-NOFP16-NEXT: fcvtzu x17, s17
4785 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s4
4786 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4787 ; CHECK-SD-NOFP16-NEXT: fcvtzu x18, s19
4788 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
4789 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
4790 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
4791 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
4792 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4793 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4794 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
4795 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
4796 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
4797 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
4798 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
4799 ; CHECK-SD-NOFP16-NEXT: ret
4800 ;
4801 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i64:
4802 ; CHECK-SD-FP16: // %bb.0: // %entry
4803 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4804 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4805 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
4806 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
4807 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4808 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
4809 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4810 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
4811 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
4812 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
4813 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h4
4814 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
4815 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
4816 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h5
4817 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
4818 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
4819 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h3
4820 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
4821 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
4822 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
4823 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
4824 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h16
4825 ; CHECK-SD-FP16-NEXT: fcvtzu x16, h0
4826 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h4
4827 ; CHECK-SD-FP16-NEXT: fcvtzu x17, h7
4828 ; CHECK-SD-FP16-NEXT: fmov d2, x11
4829 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h5
4830 ; CHECK-SD-FP16-NEXT: fcvtzu x18, h17
4831 ; CHECK-SD-FP16-NEXT: fmov d6, x13
4832 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h18
4833 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4834 ; CHECK-SD-FP16-NEXT: fmov d4, x9
4835 ; CHECK-SD-FP16-NEXT: fmov d3, x14
4836 ; CHECK-SD-FP16-NEXT: fmov d7, x15
4837 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
4838 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h1
4839 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4840 ; CHECK-SD-FP16-NEXT: fmov d5, x0
4841 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4842 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
4843 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
4844 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
4845 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
4846 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
4847 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
4848 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
4849 ; CHECK-SD-FP16-NEXT: ret
4850 ;
4851 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i64:
4852 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4853 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
4854 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4855 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
4856 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
4857 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
4858 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
4859 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.2d, v0.2s
4860 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v0.4s
4861 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v3.2s
4862 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v16.2d, v3.4s
4863 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v1.2s
4864 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v18.2d, v1.4s
4865 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v4.2d
4866 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v2.2d
4867 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v5.2d
4868 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v6.2d
4869 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v7.2d
4870 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v16.2d
4871 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v17.2d
4872 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v18.2d
4873 ; CHECK-GI-NOFP16-NEXT: ret
4874 ;
4875 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i64:
4876 ; CHECK-GI-FP16: // %bb.0: // %entry
4877 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
4878 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
4879 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[3]
4880 ; CHECK-GI-FP16-NEXT: fcvt d2, h0
4881 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[4]
4882 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[5]
4883 ; CHECK-GI-FP16-NEXT: mov h16, v0.h[6]
4884 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]
4885 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[1]
4886 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[2]
4887 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[3]
4888 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[4]
4889 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[5]
4890 ; CHECK-GI-FP16-NEXT: mov h22, v1.h[6]
4891 ; CHECK-GI-FP16-NEXT: mov h23, v1.h[7]
4892 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4893 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4894 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4895 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4896 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4897 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
4898 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4899 ; CHECK-GI-FP16-NEXT: fcvt d24, h1
4900 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
4901 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
4902 ; CHECK-GI-FP16-NEXT: fcvt d18, h19
4903 ; CHECK-GI-FP16-NEXT: fcvt d19, h20
4904 ; CHECK-GI-FP16-NEXT: fcvt d20, h21
4905 ; CHECK-GI-FP16-NEXT: fcvt d21, h22
4906 ; CHECK-GI-FP16-NEXT: fcvt d22, h23
4907 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4908 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4909 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4910 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v0.d[0]
4911 ; CHECK-GI-FP16-NEXT: mov v24.d[1], v1.d[0]
4912 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v18.d[0]
4913 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v20.d[0]
4914 ; CHECK-GI-FP16-NEXT: mov v21.d[1], v22.d[0]
4915 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v2.2d
4916 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v4.2d
4917 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v6.2d
4918 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v16.2d
4919 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v24.2d
4920 ; CHECK-GI-FP16-NEXT: fcvtzu v5.2d, v17.2d
4921 ; CHECK-GI-FP16-NEXT: fcvtzu v6.2d, v19.2d
4922 ; CHECK-GI-FP16-NEXT: fcvtzu v7.2d, v21.2d
4923 ; CHECK-GI-FP16-NEXT: ret
4924 entry:
4925 %c = fptoui <16 x half> %a to <16 x i64>
4926 ret <16 x i64> %c
4927 }
4929 define <32 x i64> @fptos_v32f16_v32i64(<32 x half> %a) {
4930 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i64:
4931 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4932 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
4933 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
4934 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
4935 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
4936 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
4937 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
4938 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
4939 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
4940 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
4941 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
4942 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
4943 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
4944 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
4945 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
4946 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
4947 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
4948 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s21
4949 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
4950 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
4951 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
4952 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
4953 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
4954 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
4955 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
4956 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4957 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
4958 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s24
4959 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
4960 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
4961 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
4962 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
4963 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
4964 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s22
4965 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
4966 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
4967 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
4968 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s17
4969 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
4970 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
4971 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
4972 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
4973 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
4974 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
4975 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
4976 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
4977 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
4978 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s21
4979 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
4980 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
4981 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s22
4982 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s27
4983 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
4984 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4985 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
4986 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
4987 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
4988 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4989 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
4990 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s24
4991 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
4992 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
4993 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
4994 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
4995 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
4996 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s21
4997 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
4998 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
4999 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
5000 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
5001 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
5002 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
5003 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s1
5004 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
5005 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
5006 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
5007 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
5008 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
5009 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
5010 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5011 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
5012 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
5013 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
5014 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
5015 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
5016 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
5017 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
5018 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
5019 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
5020 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
5021 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
5022 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s20
5023 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
5024 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
5025 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
5026 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
5027 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
5028 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
5029 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
5030 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
5031 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
5032 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
5033 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
5034 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s6
5035 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5036 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
5037 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s5
5038 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
5039 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
5040 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s22
5041 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
5042 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
5043 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
5044 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
5045 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s24
5046 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
5047 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
5048 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
5049 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
5050 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
5051 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
5052 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
5053 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
5054 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
5055 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
5056 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
5057 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
5058 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
5059 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
5060 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
5061 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
5062 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
5063 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
5064 ; CHECK-SD-NOFP16-NEXT: ret
5065 ;
5066 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i64:
5067 ; CHECK-SD-FP16: // %bb.0: // %entry
5068 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5069 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5070 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5071 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
5072 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
5073 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
5074 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
5075 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h3
5076 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
5077 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
5078 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
5079 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
5080 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
5081 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
5082 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
5083 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h5
5084 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h16
5085 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h6
5086 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
5087 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
5088 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h17
5089 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h18
5090 ; CHECK-SD-FP16-NEXT: fmov d18, x9
5091 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h22
5092 ; CHECK-SD-FP16-NEXT: fmov d3, x10
5093 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h23
5094 ; CHECK-SD-FP16-NEXT: fmov d22, x12
5095 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h25
5096 ; CHECK-SD-FP16-NEXT: fmov d23, x15
5097 ; CHECK-SD-FP16-NEXT: fmov d16, x11
5098 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
5099 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
5100 ; CHECK-SD-FP16-NEXT: fmov d2, x13
5101 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h24
5102 ; CHECK-SD-FP16-NEXT: fmov d17, x14
5103 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
5104 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
5105 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
5106 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
5107 ; CHECK-SD-FP16-NEXT: fmov d19, x9
5108 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h26
5109 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5110 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5111 ; CHECK-SD-FP16-NEXT: fmov d21, x11
5112 ; CHECK-SD-FP16-NEXT: fmov d1, x13
5113 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h7
5114 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
5115 ; CHECK-SD-FP16-NEXT: fmov d7, x14
5116 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
5117 ; CHECK-SD-FP16-NEXT: fmov d22, x10
5118 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
5119 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
5120 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
5121 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h20
5122 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
5123 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
5124 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
5125 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
5126 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
5127 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h24
5128 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
5129 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
5130 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
5131 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5132 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5133 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h0
5134 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
5135 ; CHECK-SD-FP16-NEXT: fmov d7, x9
5136 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h23
5137 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
5138 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
5139 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h6
5140 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
5141 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h5
5142 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
5143 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
5144 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
5145 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
5146 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
5147 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h4
5148 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5149 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
5150 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
5151 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h22
5152 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
5153 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
5154 ; CHECK-SD-FP16-NEXT: fmov d4, x11
5155 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
5156 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h0
5157 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
5158 ; CHECK-SD-FP16-NEXT: fmov d0, x9
5159 ; CHECK-SD-FP16-NEXT: fmov d1, x12
5160 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
5161 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
5162 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
5163 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
5164 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
5165 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
5166 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
5167 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
5168 ; CHECK-SD-FP16-NEXT: ret
5169 ;
5170 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i64:
5171 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5172 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
5173 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
5174 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
5175 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
5176 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v2.4h
5177 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
5178 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v3.4h
5179 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
5180 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.2d, v4.2s
5181 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v4.4s
5182 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v0.2s
5183 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.2d, v0.4s
5184 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v5.2s
5185 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v5.4s
5186 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.2d, v1.2s
5187 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
5188 ; CHECK-GI-NOFP16-NEXT: fcvtl v20.2d, v16.2s
5189 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v6.2d
5190 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v4.2d
5191 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v7.2d
5192 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
5193 ; CHECK-GI-NOFP16-NEXT: fcvtzs v17.2d, v17.2d
5194 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v5.2d
5195 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
5196 ; CHECK-GI-NOFP16-NEXT: stp q6, q4, [x8]
5197 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v16.4s
5198 ; CHECK-GI-NOFP16-NEXT: fcvtzs v16.2d, v19.2d
5199 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
5200 ; CHECK-GI-NOFP16-NEXT: stp q7, q0, [x8, #32]
5201 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
5202 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v18.2s
5203 ; CHECK-GI-NOFP16-NEXT: stp q17, q5, [x8, #64]
5204 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v18.4s
5205 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v3.2s
5206 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v20.2d
5207 ; CHECK-GI-NOFP16-NEXT: stp q16, q1, [x8, #96]
5208 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v3.4s
5209 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v6.2d
5210 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v4.2d
5211 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v2.2d
5212 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
5213 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v5.2d
5214 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v17.2d
5215 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
5216 ; CHECK-GI-NOFP16-NEXT: stp q7, q6, [x8, #128]
5217 ; CHECK-GI-NOFP16-NEXT: stp q4, q2, [x8, #160]
5218 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #192]
5219 ; CHECK-GI-NOFP16-NEXT: stp q5, q1, [x8, #224]
5220 ; CHECK-GI-NOFP16-NEXT: ret
5221 ;
5222 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i64:
5223 ; CHECK-GI-FP16: // %bb.0: // %entry
5224 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
5225 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
5226 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
5227 ; CHECK-GI-FP16-NEXT: mov h17, v0.h[4]
5228 ; CHECK-GI-FP16-NEXT: mov h18, v0.h[5]
5229 ; CHECK-GI-FP16-NEXT: mov h19, v0.h[6]
5230 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[7]
5231 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[1]
5232 ; CHECK-GI-FP16-NEXT: fcvt d16, h0
5233 ; CHECK-GI-FP16-NEXT: fcvt d0, h1
5234 ; CHECK-GI-FP16-NEXT: mov h23, v2.h[2]
5235 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[3]
5236 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
5237 ; CHECK-GI-FP16-NEXT: fcvt d7, h5
5238 ; CHECK-GI-FP16-NEXT: fcvt d22, h6
5239 ; CHECK-GI-FP16-NEXT: fcvt d6, h17
5240 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
5241 ; CHECK-GI-FP16-NEXT: fcvt d5, h19
5242 ; CHECK-GI-FP16-NEXT: fcvt d18, h20
5243 ; CHECK-GI-FP16-NEXT: fcvt d19, h21
5244 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[2]
5245 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[3]
5246 ; CHECK-GI-FP16-NEXT: mov h25, v2.h[4]
5247 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[5]
5248 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v4.d[0]
5249 ; CHECK-GI-FP16-NEXT: mov v7.d[1], v22.d[0]
5250 ; CHECK-GI-FP16-NEXT: mov h22, v2.h[1]
5251 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v17.d[0]
5252 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[4]
5253 ; CHECK-GI-FP16-NEXT: mov h27, v2.h[6]
5254 ; CHECK-GI-FP16-NEXT: mov v5.d[1], v18.d[0]
5255 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v19.d[0]
5256 ; CHECK-GI-FP16-NEXT: fcvt d4, h20
5257 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[5]
5258 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[6]
5259 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[7]
5260 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5261 ; CHECK-GI-FP16-NEXT: mov h28, v2.h[7]
5262 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5263 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
5264 ; CHECK-GI-FP16-NEXT: fcvt d17, h23
5265 ; CHECK-GI-FP16-NEXT: fcvt d23, h24
5266 ; CHECK-GI-FP16-NEXT: fcvtzs v16.2d, v16.2d
5267 ; CHECK-GI-FP16-NEXT: fcvtzs v7.2d, v7.2d
5268 ; CHECK-GI-FP16-NEXT: fcvtzs v6.2d, v6.2d
5269 ; CHECK-GI-FP16-NEXT: fcvt d29, h18
5270 ; CHECK-GI-FP16-NEXT: fcvt d19, h19
5271 ; CHECK-GI-FP16-NEXT: fcvt d30, h20
5272 ; CHECK-GI-FP16-NEXT: fcvt d20, h2
5273 ; CHECK-GI-FP16-NEXT: fcvtzs v5.2d, v5.2d
5274 ; CHECK-GI-FP16-NEXT: fcvt d18, h25
5275 ; CHECK-GI-FP16-NEXT: fcvt d24, h26
5276 ; CHECK-GI-FP16-NEXT: fcvt d2, h27
5277 ; CHECK-GI-FP16-NEXT: fcvt d25, h28
5278 ; CHECK-GI-FP16-NEXT: stp q16, q7, [x8]
5279 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v21.d[0]
5280 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v23.d[0]
5281 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v29.d[0]
5282 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v30.d[0]
5283 ; CHECK-GI-FP16-NEXT: mov h21, v3.h[1]
5284 ; CHECK-GI-FP16-NEXT: stp q6, q5, [x8, #32]
5285 ; CHECK-GI-FP16-NEXT: mov v20.d[1], v22.d[0]
5286 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
5287 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[3]
5288 ; CHECK-GI-FP16-NEXT: mov h22, v3.h[4]
5289 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[5]
5290 ; CHECK-GI-FP16-NEXT: mov h6, v3.h[6]
5291 ; CHECK-GI-FP16-NEXT: mov h5, v3.h[7]
5292 ; CHECK-GI-FP16-NEXT: mov v18.d[1], v24.d[0]
5293 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v25.d[0]
5294 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
5295 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5296 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
5297 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
5298 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v4.2d
5299 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
5300 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5301 ; CHECK-GI-FP16-NEXT: fcvt d23, h23
5302 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v1.2d
5303 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
5304 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
5305 ; CHECK-GI-FP16-NEXT: fcvtzs v19.2d, v19.2d
5306 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v21.d[0]
5307 ; CHECK-GI-FP16-NEXT: fcvtzs v20.2d, v20.2d
5308 ; CHECK-GI-FP16-NEXT: stp q0, q4, [x8, #64]
5309 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v17.2d
5310 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v18.2d
5311 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v7.d[0]
5312 ; CHECK-GI-FP16-NEXT: mov v22.d[1], v23.d[0]
5313 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v5.d[0]
5314 ; CHECK-GI-FP16-NEXT: stp q1, q19, [x8, #96]
5315 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d
5316 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v3.2d
5317 ; CHECK-GI-FP16-NEXT: stp q20, q0, [x8, #128]
5318 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v16.2d
5319 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v22.2d
5320 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #160]
5321 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v6.2d
5322 ; CHECK-GI-FP16-NEXT: stp q2, q0, [x8, #192]
5323 ; CHECK-GI-FP16-NEXT: stp q3, q1, [x8, #224]
5324 ; CHECK-GI-FP16-NEXT: ret
5325 entry:
5326 %c = fptosi <32 x half> %a to <32 x i64>
5327 ret <32 x i64> %c
5328 }
5330 define <32 x i64> @fptou_v32f16_v32i64(<32 x half> %a) {
5331 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i64:
5332 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5333 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5334 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5335 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5336 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
5337 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
5338 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
5339 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
5340 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
5341 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
5342 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
5343 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
5344 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
5345 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
5346 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
5347 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
5348 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
5349 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s21
5350 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
5351 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
5352 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
5353 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
5354 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
5355 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5356 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
5357 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
5358 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
5359 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s24
5360 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
5361 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
5362 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
5363 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
5364 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
5365 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s22
5366 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
5367 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
5368 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
5369 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s17
5370 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
5371 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
5372 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
5373 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
5374 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
5375 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
5376 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
5377 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
5378 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
5379 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s21
5380 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
5381 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
5382 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s22
5383 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s27
5384 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
5385 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
5386 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
5387 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
5388 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
5389 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
5390 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
5391 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s24
5392 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
5393 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
5394 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
5395 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
5396 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
5397 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s21
5398 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
5399 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
5400 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
5401 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
5402 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
5403 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
5404 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s1
5405 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
5406 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
5407 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
5408 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
5409 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
5410 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
5411 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5412 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
5413 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
5414 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
5415 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
5416 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
5417 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
5418 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
5419 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
5420 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
5421 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
5422 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
5423 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s20
5424 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
5425 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
5426 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
5427 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
5428 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
5429 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
5430 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
5431 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
5432 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
5433 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
5434 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
5435 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s6
5436 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5437 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
5438 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s5
5439 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
5440 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
5441 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s22
5442 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
5443 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
5444 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
5445 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
5446 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s24
5447 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
5448 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
5449 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
5450 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
5451 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
5452 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
5453 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
5454 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
5455 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
5456 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
5457 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
5458 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
5459 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
5460 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
5461 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
5462 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
5463 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
5464 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
5465 ; CHECK-SD-NOFP16-NEXT: ret
5466 ;
5467 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i64:
5468 ; CHECK-SD-FP16: // %bb.0: // %entry
5469 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5470 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5471 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5472 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
5473 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
5474 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
5475 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
5476 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h3
5477 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
5478 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
5479 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
5480 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
5481 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
5482 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
5483 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
5484 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h5
5485 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h16
5486 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h6
5487 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
5488 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
5489 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h17
5490 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h18
5491 ; CHECK-SD-FP16-NEXT: fmov d18, x9
5492 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h22
5493 ; CHECK-SD-FP16-NEXT: fmov d3, x10
5494 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h23
5495 ; CHECK-SD-FP16-NEXT: fmov d22, x12
5496 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h25
5497 ; CHECK-SD-FP16-NEXT: fmov d23, x15
5498 ; CHECK-SD-FP16-NEXT: fmov d16, x11
5499 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
5500 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
5501 ; CHECK-SD-FP16-NEXT: fmov d2, x13
5502 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h24
5503 ; CHECK-SD-FP16-NEXT: fmov d17, x14
5504 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
5505 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
5506 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
5507 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
5508 ; CHECK-SD-FP16-NEXT: fmov d19, x9
5509 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h26
5510 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5511 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5512 ; CHECK-SD-FP16-NEXT: fmov d21, x11
5513 ; CHECK-SD-FP16-NEXT: fmov d1, x13
5514 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h7
5515 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
5516 ; CHECK-SD-FP16-NEXT: fmov d7, x14
5517 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
5518 ; CHECK-SD-FP16-NEXT: fmov d22, x10
5519 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
5520 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
5521 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
5522 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h20
5523 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
5524 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
5525 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
5526 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
5527 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
5528 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h24
5529 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
5530 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
5531 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
5532 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5533 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5534 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h0
5535 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
5536 ; CHECK-SD-FP16-NEXT: fmov d7, x9
5537 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h23
5538 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
5539 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
5540 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h6
5541 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
5542 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h5
5543 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
5544 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
5545 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
5546 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
5547 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
5548 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h4
5549 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5550 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
5551 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
5552 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h22
5553 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
5554 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
5555 ; CHECK-SD-FP16-NEXT: fmov d4, x11
5556 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
5557 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h0
5558 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
5559 ; CHECK-SD-FP16-NEXT: fmov d0, x9
5560 ; CHECK-SD-FP16-NEXT: fmov d1, x12
5561 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
5562 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
5563 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
5564 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
5565 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
5566 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
5567 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
5568 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
5569 ; CHECK-SD-FP16-NEXT: ret
5570 ;
5571 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i64:
5572 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5573 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
5574 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
5575 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
5576 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
5577 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v2.4h
5578 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
5579 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v3.4h
5580 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
5581 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.2d, v4.2s
5582 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v4.4s
5583 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v0.2s
5584 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.2d, v0.4s
5585 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v5.2s
5586 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v5.4s
5587 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.2d, v1.2s
5588 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
5589 ; CHECK-GI-NOFP16-NEXT: fcvtl v20.2d, v16.2s
5590 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v6.2d
5591 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v4.2d
5592 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v7.2d
5593 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
5594 ; CHECK-GI-NOFP16-NEXT: fcvtzu v17.2d, v17.2d
5595 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v5.2d
5596 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
5597 ; CHECK-GI-NOFP16-NEXT: stp q6, q4, [x8]
5598 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v16.4s
5599 ; CHECK-GI-NOFP16-NEXT: fcvtzu v16.2d, v19.2d
5600 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
5601 ; CHECK-GI-NOFP16-NEXT: stp q7, q0, [x8, #32]
5602 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
5603 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v18.2s
5604 ; CHECK-GI-NOFP16-NEXT: stp q17, q5, [x8, #64]
5605 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v18.4s
5606 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v3.2s
5607 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v20.2d
5608 ; CHECK-GI-NOFP16-NEXT: stp q16, q1, [x8, #96]
5609 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v3.4s
5610 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v6.2d
5611 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v4.2d
5612 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v2.2d
5613 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
5614 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v5.2d
5615 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v17.2d
5616 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
5617 ; CHECK-GI-NOFP16-NEXT: stp q7, q6, [x8, #128]
5618 ; CHECK-GI-NOFP16-NEXT: stp q4, q2, [x8, #160]
5619 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #192]
5620 ; CHECK-GI-NOFP16-NEXT: stp q5, q1, [x8, #224]
5621 ; CHECK-GI-NOFP16-NEXT: ret
5622 ;
5623 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i64:
5624 ; CHECK-GI-FP16: // %bb.0: // %entry
5625 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
5626 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
5627 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
5628 ; CHECK-GI-FP16-NEXT: mov h17, v0.h[4]
5629 ; CHECK-GI-FP16-NEXT: mov h18, v0.h[5]
5630 ; CHECK-GI-FP16-NEXT: mov h19, v0.h[6]
5631 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[7]
5632 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[1]
5633 ; CHECK-GI-FP16-NEXT: fcvt d16, h0
5634 ; CHECK-GI-FP16-NEXT: fcvt d0, h1
5635 ; CHECK-GI-FP16-NEXT: mov h23, v2.h[2]
5636 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[3]
5637 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
5638 ; CHECK-GI-FP16-NEXT: fcvt d7, h5
5639 ; CHECK-GI-FP16-NEXT: fcvt d22, h6
5640 ; CHECK-GI-FP16-NEXT: fcvt d6, h17
5641 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
5642 ; CHECK-GI-FP16-NEXT: fcvt d5, h19
5643 ; CHECK-GI-FP16-NEXT: fcvt d18, h20
5644 ; CHECK-GI-FP16-NEXT: fcvt d19, h21
5645 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[2]
5646 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[3]
5647 ; CHECK-GI-FP16-NEXT: mov h25, v2.h[4]
5648 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[5]
5649 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v4.d[0]
5650 ; CHECK-GI-FP16-NEXT: mov v7.d[1], v22.d[0]
5651 ; CHECK-GI-FP16-NEXT: mov h22, v2.h[1]
5652 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v17.d[0]
5653 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[4]
5654 ; CHECK-GI-FP16-NEXT: mov h27, v2.h[6]
5655 ; CHECK-GI-FP16-NEXT: mov v5.d[1], v18.d[0]
5656 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v19.d[0]
5657 ; CHECK-GI-FP16-NEXT: fcvt d4, h20
5658 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[5]
5659 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[6]
5660 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[7]
5661 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5662 ; CHECK-GI-FP16-NEXT: mov h28, v2.h[7]
5663 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5664 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
5665 ; CHECK-GI-FP16-NEXT: fcvt d17, h23
5666 ; CHECK-GI-FP16-NEXT: fcvt d23, h24
5667 ; CHECK-GI-FP16-NEXT: fcvtzu v16.2d, v16.2d
5668 ; CHECK-GI-FP16-NEXT: fcvtzu v7.2d, v7.2d
5669 ; CHECK-GI-FP16-NEXT: fcvtzu v6.2d, v6.2d
5670 ; CHECK-GI-FP16-NEXT: fcvt d29, h18
5671 ; CHECK-GI-FP16-NEXT: fcvt d19, h19
5672 ; CHECK-GI-FP16-NEXT: fcvt d30, h20
5673 ; CHECK-GI-FP16-NEXT: fcvt d20, h2
5674 ; CHECK-GI-FP16-NEXT: fcvtzu v5.2d, v5.2d
5675 ; CHECK-GI-FP16-NEXT: fcvt d18, h25
5676 ; CHECK-GI-FP16-NEXT: fcvt d24, h26
5677 ; CHECK-GI-FP16-NEXT: fcvt d2, h27
5678 ; CHECK-GI-FP16-NEXT: fcvt d25, h28
5679 ; CHECK-GI-FP16-NEXT: stp q16, q7, [x8]
5680 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v21.d[0]
5681 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v23.d[0]
5682 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v29.d[0]
5683 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v30.d[0]
5684 ; CHECK-GI-FP16-NEXT: mov h21, v3.h[1]
5685 ; CHECK-GI-FP16-NEXT: stp q6, q5, [x8, #32]
5686 ; CHECK-GI-FP16-NEXT: mov v20.d[1], v22.d[0]
5687 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
5688 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[3]
5689 ; CHECK-GI-FP16-NEXT: mov h22, v3.h[4]
5690 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[5]
5691 ; CHECK-GI-FP16-NEXT: mov h6, v3.h[6]
5692 ; CHECK-GI-FP16-NEXT: mov h5, v3.h[7]
5693 ; CHECK-GI-FP16-NEXT: mov v18.d[1], v24.d[0]
5694 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v25.d[0]
5695 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
5696 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5697 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
5698 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
5699 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v4.2d
5700 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
5701 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5702 ; CHECK-GI-FP16-NEXT: fcvt d23, h23
5703 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v1.2d
5704 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
5705 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
5706 ; CHECK-GI-FP16-NEXT: fcvtzu v19.2d, v19.2d
5707 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v21.d[0]
5708 ; CHECK-GI-FP16-NEXT: fcvtzu v20.2d, v20.2d
5709 ; CHECK-GI-FP16-NEXT: stp q0, q4, [x8, #64]
5710 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v17.2d
5711 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v18.2d
5712 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v7.d[0]
5713 ; CHECK-GI-FP16-NEXT: mov v22.d[1], v23.d[0]
5714 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v5.d[0]
5715 ; CHECK-GI-FP16-NEXT: stp q1, q19, [x8, #96]
5716 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v2.2d
5717 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v3.2d
5718 ; CHECK-GI-FP16-NEXT: stp q20, q0, [x8, #128]
5719 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v16.2d
5720 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v22.2d
5721 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #160]
5722 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v6.2d
5723 ; CHECK-GI-FP16-NEXT: stp q2, q0, [x8, #192]
5724 ; CHECK-GI-FP16-NEXT: stp q3, q1, [x8, #224]
5725 ; CHECK-GI-FP16-NEXT: ret
5726 entry:
5727 %c = fptoui <32 x half> %a to <32 x i64>
5728 ret <32 x i64> %c
5729 }
5731 define <2 x i32> @fptos_v2f16_v2i32(<2 x half> %a) {
5732 ; CHECK-SD-LABEL: fptos_v2f16_v2i32:
5733 ; CHECK-SD: // %bb.0: // %entry
5734 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5735 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5736 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5737 ; CHECK-SD-NEXT: ret
5738 ;
5739 ; CHECK-GI-LABEL: fptos_v2f16_v2i32:
5740 ; CHECK-GI: // %bb.0: // %entry
5741 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
5742 ; CHECK-GI-NEXT: mov h1, v0.h[1]
5743 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
5744 ; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h
5745 ; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s
5746 ; CHECK-GI-NEXT: ret
5747 entry:
5748 %c = fptosi <2 x half> %a to <2 x i32>
5749 ret <2 x i32> %c
5750 }
5752 define <2 x i32> @fptou_v2f16_v2i32(<2 x half> %a) {
5753 ; CHECK-SD-LABEL: fptou_v2f16_v2i32:
5754 ; CHECK-SD: // %bb.0: // %entry
5755 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5756 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5757 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5758 ; CHECK-SD-NEXT: ret
5759 ;
5760 ; CHECK-GI-LABEL: fptou_v2f16_v2i32:
5761 ; CHECK-GI: // %bb.0: // %entry
5762 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
5763 ; CHECK-GI-NEXT: mov h1, v0.h[1]
5764 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
5765 ; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h
5766 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
5767 ; CHECK-GI-NEXT: ret
5768 entry:
5769 %c = fptoui <2 x half> %a to <2 x i32>
5770 ret <2 x i32> %c
5771 }
5773 define <3 x i32> @fptos_v3f16_v3i32(<3 x half> %a) {
5774 ; CHECK-LABEL: fptos_v3f16_v3i32:
5775 ; CHECK: // %bb.0: // %entry
5776 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5777 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5778 ; CHECK-NEXT: ret
5779 entry:
5780 %c = fptosi <3 x half> %a to <3 x i32>
5781 ret <3 x i32> %c
5782 }
5784 define <3 x i32> @fptou_v3f16_v3i32(<3 x half> %a) {
5785 ; CHECK-LABEL: fptou_v3f16_v3i32:
5786 ; CHECK: // %bb.0: // %entry
5787 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5788 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
5789 ; CHECK-NEXT: ret
5790 entry:
5791 %c = fptoui <3 x half> %a to <3 x i32>
5792 ret <3 x i32> %c
5793 }
5795 define <4 x i32> @fptos_v4f16_v4i32(<4 x half> %a) {
5796 ; CHECK-LABEL: fptos_v4f16_v4i32:
5797 ; CHECK: // %bb.0: // %entry
5798 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5799 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5800 ; CHECK-NEXT: ret
5801 entry:
5802 %c = fptosi <4 x half> %a to <4 x i32>
5803 ret <4 x i32> %c
5804 }
5806 define <4 x i32> @fptou_v4f16_v4i32(<4 x half> %a) {
5807 ; CHECK-LABEL: fptou_v4f16_v4i32:
5808 ; CHECK: // %bb.0: // %entry
5809 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5810 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
5811 ; CHECK-NEXT: ret
5812 entry:
5813 %c = fptoui <4 x half> %a to <4 x i32>
5814 ret <4 x i32> %c
5815 }
5817 define <8 x i32> @fptos_v8f16_v8i32(<8 x half> %a) {
5818 ; CHECK-SD-LABEL: fptos_v8f16_v8i32:
5819 ; CHECK-SD: // %bb.0: // %entry
5820 ; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h
5821 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5822 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
5823 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5824 ; CHECK-SD-NEXT: ret
5825 ;
5826 ; CHECK-GI-LABEL: fptos_v8f16_v8i32:
5827 ; CHECK-GI: // %bb.0: // %entry
5828 ; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h
5829 ; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h
5830 ; CHECK-GI-NEXT: fcvtzs v0.4s, v1.4s
5831 ; CHECK-GI-NEXT: fcvtzs v1.4s, v2.4s
5832 ; CHECK-GI-NEXT: ret
5833 entry:
5834 %c = fptosi <8 x half> %a to <8 x i32>
5835 ret <8 x i32> %c
5836 }
5838 define <8 x i32> @fptou_v8f16_v8i32(<8 x half> %a) {
5839 ; CHECK-SD-LABEL: fptou_v8f16_v8i32:
5840 ; CHECK-SD: // %bb.0: // %entry
5841 ; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h
5842 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5843 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
5844 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5845 ; CHECK-SD-NEXT: ret
5846 ;
5847 ; CHECK-GI-LABEL: fptou_v8f16_v8i32:
5848 ; CHECK-GI: // %bb.0: // %entry
5849 ; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h
5850 ; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h
5851 ; CHECK-GI-NEXT: fcvtzu v0.4s, v1.4s
5852 ; CHECK-GI-NEXT: fcvtzu v1.4s, v2.4s
5853 ; CHECK-GI-NEXT: ret
5854 entry:
5855 %c = fptoui <8 x half> %a to <8 x i32>
5856 ret <8 x i32> %c
5857 }
5859 define <16 x i32> @fptos_v16f16_v16i32(<16 x half> %a) {
5860 ; CHECK-SD-LABEL: fptos_v16f16_v16i32:
5861 ; CHECK-SD: // %bb.0: // %entry
5862 ; CHECK-SD-NEXT: fcvtl v2.4s, v0.4h
5863 ; CHECK-SD-NEXT: fcvtl2 v3.4s, v0.8h
5864 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v1.8h
5865 ; CHECK-SD-NEXT: fcvtl v5.4s, v1.4h
5866 ; CHECK-SD-NEXT: fcvtzs v0.4s, v2.4s
5867 ; CHECK-SD-NEXT: fcvtzs v1.4s, v3.4s
5868 ; CHECK-SD-NEXT: fcvtzs v3.4s, v4.4s
5869 ; CHECK-SD-NEXT: fcvtzs v2.4s, v5.4s
5870 ; CHECK-SD-NEXT: ret
5871 ;
5872 ; CHECK-GI-LABEL: fptos_v16f16_v16i32:
5873 ; CHECK-GI: // %bb.0: // %entry
5874 ; CHECK-GI-NEXT: fcvtl v2.4s, v0.4h
5875 ; CHECK-GI-NEXT: fcvtl2 v3.4s, v0.8h
5876 ; CHECK-GI-NEXT: fcvtl v4.4s, v1.4h
5877 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v1.8h
5878 ; CHECK-GI-NEXT: fcvtzs v0.4s, v2.4s
5879 ; CHECK-GI-NEXT: fcvtzs v1.4s, v3.4s
5880 ; CHECK-GI-NEXT: fcvtzs v2.4s, v4.4s
5881 ; CHECK-GI-NEXT: fcvtzs v3.4s, v5.4s
5882 ; CHECK-GI-NEXT: ret
5883 entry:
5884 %c = fptosi <16 x half> %a to <16 x i32>
5885 ret <16 x i32> %c
5886 }
5888 define <16 x i32> @fptou_v16f16_v16i32(<16 x half> %a) {
5889 ; CHECK-SD-LABEL: fptou_v16f16_v16i32:
5890 ; CHECK-SD: // %bb.0: // %entry
5891 ; CHECK-SD-NEXT: fcvtl v2.4s, v0.4h
5892 ; CHECK-SD-NEXT: fcvtl2 v3.4s, v0.8h
5893 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v1.8h
5894 ; CHECK-SD-NEXT: fcvtl v5.4s, v1.4h
5895 ; CHECK-SD-NEXT: fcvtzu v0.4s, v2.4s
5896 ; CHECK-SD-NEXT: fcvtzu v1.4s, v3.4s
5897 ; CHECK-SD-NEXT: fcvtzu v3.4s, v4.4s
5898 ; CHECK-SD-NEXT: fcvtzu v2.4s, v5.4s
5899 ; CHECK-SD-NEXT: ret
5900 ;
5901 ; CHECK-GI-LABEL: fptou_v16f16_v16i32:
5902 ; CHECK-GI: // %bb.0: // %entry
5903 ; CHECK-GI-NEXT: fcvtl v2.4s, v0.4h
5904 ; CHECK-GI-NEXT: fcvtl2 v3.4s, v0.8h
5905 ; CHECK-GI-NEXT: fcvtl v4.4s, v1.4h
5906 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v1.8h
5907 ; CHECK-GI-NEXT: fcvtzu v0.4s, v2.4s
5908 ; CHECK-GI-NEXT: fcvtzu v1.4s, v3.4s
5909 ; CHECK-GI-NEXT: fcvtzu v2.4s, v4.4s
5910 ; CHECK-GI-NEXT: fcvtzu v3.4s, v5.4s
5911 ; CHECK-GI-NEXT: ret
5912 entry:
5913 %c = fptoui <16 x half> %a to <16 x i32>
5914 ret <16 x i32> %c
5915 }
5917 define <32 x i32> @fptos_v32f16_v32i32(<32 x half> %a) {
5918 ; CHECK-SD-LABEL: fptos_v32f16_v32i32:
5919 ; CHECK-SD: // %bb.0: // %entry
5920 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v0.8h
5921 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5922 ; CHECK-SD-NEXT: fcvtl2 v5.4s, v1.8h
5923 ; CHECK-SD-NEXT: fcvtl v6.4s, v1.4h
5924 ; CHECK-SD-NEXT: fcvtl v7.4s, v2.4h
5925 ; CHECK-SD-NEXT: fcvtl2 v16.4s, v2.8h
5926 ; CHECK-SD-NEXT: fcvtl2 v17.4s, v3.8h
5927 ; CHECK-SD-NEXT: fcvtl v18.4s, v3.4h
5928 ; CHECK-SD-NEXT: fcvtzs v1.4s, v4.4s
5929 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5930 ; CHECK-SD-NEXT: fcvtzs v3.4s, v5.4s
5931 ; CHECK-SD-NEXT: fcvtzs v2.4s, v6.4s
5932 ; CHECK-SD-NEXT: fcvtzs v4.4s, v7.4s
5933 ; CHECK-SD-NEXT: fcvtzs v5.4s, v16.4s
5934 ; CHECK-SD-NEXT: fcvtzs v7.4s, v17.4s
5935 ; CHECK-SD-NEXT: fcvtzs v6.4s, v18.4s
5936 ; CHECK-SD-NEXT: ret
5937 ;
5938 ; CHECK-GI-LABEL: fptos_v32f16_v32i32:
5939 ; CHECK-GI: // %bb.0: // %entry
5940 ; CHECK-GI-NEXT: fcvtl v4.4s, v0.4h
5941 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v0.8h
5942 ; CHECK-GI-NEXT: fcvtl v6.4s, v1.4h
5943 ; CHECK-GI-NEXT: fcvtl2 v7.4s, v1.8h
5944 ; CHECK-GI-NEXT: fcvtl v16.4s, v2.4h
5945 ; CHECK-GI-NEXT: fcvtl2 v17.4s, v2.8h
5946 ; CHECK-GI-NEXT: fcvtl v18.4s, v3.4h
5947 ; CHECK-GI-NEXT: fcvtl2 v19.4s, v3.8h
5948 ; CHECK-GI-NEXT: fcvtzs v0.4s, v4.4s
5949 ; CHECK-GI-NEXT: fcvtzs v1.4s, v5.4s
5950 ; CHECK-GI-NEXT: fcvtzs v2.4s, v6.4s
5951 ; CHECK-GI-NEXT: fcvtzs v3.4s, v7.4s
5952 ; CHECK-GI-NEXT: fcvtzs v4.4s, v16.4s
5953 ; CHECK-GI-NEXT: fcvtzs v5.4s, v17.4s
5954 ; CHECK-GI-NEXT: fcvtzs v6.4s, v18.4s
5955 ; CHECK-GI-NEXT: fcvtzs v7.4s, v19.4s
5956 ; CHECK-GI-NEXT: ret
5957 entry:
5958 %c = fptosi <32 x half> %a to <32 x i32>
5959 ret <32 x i32> %c
5960 }
5962 define <32 x i32> @fptou_v32f16_v32i32(<32 x half> %a) {
5963 ; CHECK-SD-LABEL: fptou_v32f16_v32i32:
5964 ; CHECK-SD: // %bb.0: // %entry
5965 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v0.8h
5966 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5967 ; CHECK-SD-NEXT: fcvtl2 v5.4s, v1.8h
5968 ; CHECK-SD-NEXT: fcvtl v6.4s, v1.4h
5969 ; CHECK-SD-NEXT: fcvtl v7.4s, v2.4h
5970 ; CHECK-SD-NEXT: fcvtl2 v16.4s, v2.8h
5971 ; CHECK-SD-NEXT: fcvtl2 v17.4s, v3.8h
5972 ; CHECK-SD-NEXT: fcvtl v18.4s, v3.4h
5973 ; CHECK-SD-NEXT: fcvtzu v1.4s, v4.4s
5974 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5975 ; CHECK-SD-NEXT: fcvtzu v3.4s, v5.4s
5976 ; CHECK-SD-NEXT: fcvtzu v2.4s, v6.4s
5977 ; CHECK-SD-NEXT: fcvtzu v4.4s, v7.4s
5978 ; CHECK-SD-NEXT: fcvtzu v5.4s, v16.4s
5979 ; CHECK-SD-NEXT: fcvtzu v7.4s, v17.4s
5980 ; CHECK-SD-NEXT: fcvtzu v6.4s, v18.4s
5981 ; CHECK-SD-NEXT: ret
5982 ;
5983 ; CHECK-GI-LABEL: fptou_v32f16_v32i32:
5984 ; CHECK-GI: // %bb.0: // %entry
5985 ; CHECK-GI-NEXT: fcvtl v4.4s, v0.4h
5986 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v0.8h
5987 ; CHECK-GI-NEXT: fcvtl v6.4s, v1.4h
5988 ; CHECK-GI-NEXT: fcvtl2 v7.4s, v1.8h
5989 ; CHECK-GI-NEXT: fcvtl v16.4s, v2.4h
5990 ; CHECK-GI-NEXT: fcvtl2 v17.4s, v2.8h
5991 ; CHECK-GI-NEXT: fcvtl v18.4s, v3.4h
5992 ; CHECK-GI-NEXT: fcvtl2 v19.4s, v3.8h
5993 ; CHECK-GI-NEXT: fcvtzu v0.4s, v4.4s
5994 ; CHECK-GI-NEXT: fcvtzu v1.4s, v5.4s
5995 ; CHECK-GI-NEXT: fcvtzu v2.4s, v6.4s
5996 ; CHECK-GI-NEXT: fcvtzu v3.4s, v7.4s
5997 ; CHECK-GI-NEXT: fcvtzu v4.4s, v16.4s
5998 ; CHECK-GI-NEXT: fcvtzu v5.4s, v17.4s
5999 ; CHECK-GI-NEXT: fcvtzu v6.4s, v18.4s
6000 ; CHECK-GI-NEXT: fcvtzu v7.4s, v19.4s
6001 ; CHECK-GI-NEXT: ret
6002 entry:
6003 %c = fptoui <32 x half> %a to <32 x i32>
6004 ret <32 x i32> %c
6005 }
6007 define <2 x i16> @fptos_v2f16_v2i16(<2 x half> %a) {
6008 ; CHECK-SD-LABEL: fptos_v2f16_v2i16:
6009 ; CHECK-SD: // %bb.0: // %entry
6010 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6011 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6012 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6013 ; CHECK-SD-NEXT: ret
6014 ;
6015 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i16:
6016 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6017 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
6018 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
6019 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6020 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6021 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2s, v0.2s
6022 ; CHECK-GI-NOFP16-NEXT: ret
6023 ;
6024 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i16:
6025 ; CHECK-GI-FP16: // %bb.0: // %entry
6026 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
6027 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6028 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6029 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6030 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6031 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6032 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6033 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6034 ; CHECK-GI-FP16-NEXT: ret
6035 entry:
6036 %c = fptosi <2 x half> %a to <2 x i16>
6037 ret <2 x i16> %c
6038 }
6040 define <2 x i16> @fptou_v2f16_v2i16(<2 x half> %a) {
6041 ; CHECK-SD-LABEL: fptou_v2f16_v2i16:
6042 ; CHECK-SD: // %bb.0: // %entry
6043 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6044 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6045 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6046 ; CHECK-SD-NEXT: ret
6047 ;
6048 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i16:
6049 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6050 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
6051 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
6052 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6053 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6054 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2s, v0.2s
6055 ; CHECK-GI-NOFP16-NEXT: ret
6056 ;
6057 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i16:
6058 ; CHECK-GI-FP16: // %bb.0: // %entry
6059 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
6060 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6061 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6062 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6063 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6064 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6065 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6066 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6067 ; CHECK-GI-FP16-NEXT: ret
6068 entry:
6069 %c = fptoui <2 x half> %a to <2 x i16>
6070 ret <2 x i16> %c
6071 }
6073 define <3 x i16> @fptos_v3f16_v3i16(<3 x half> %a) {
6074 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i16:
6075 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6076 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6077 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6078 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6079 ; CHECK-SD-NOFP16-NEXT: ret
6080 ;
6081 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i16:
6082 ; CHECK-SD-FP16: // %bb.0: // %entry
6083 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6084 ; CHECK-SD-FP16-NEXT: ret
6085 ;
6086 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i16:
6087 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6088 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6089 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6090 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6091 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6092 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6093 ; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v2.h[0]
6094 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6095 ; CHECK-GI-NOFP16-NEXT: ret
6096 ;
6097 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i16:
6098 ; CHECK-GI-FP16: // %bb.0: // %entry
6099 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6100 ; CHECK-GI-FP16-NEXT: ret
6101 entry:
6102 %c = fptosi <3 x half> %a to <3 x i16>
6103 ret <3 x i16> %c
6104 }
6106 define <3 x i16> @fptou_v3f16_v3i16(<3 x half> %a) {
6107 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i16:
6108 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6109 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6110 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6111 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6112 ; CHECK-SD-NOFP16-NEXT: ret
6113 ;
6114 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i16:
6115 ; CHECK-SD-FP16: // %bb.0: // %entry
6116 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
6117 ; CHECK-SD-FP16-NEXT: ret
6118 ;
6119 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i16:
6120 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6121 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6122 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6123 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6124 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6125 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6126 ; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v2.h[0]
6127 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6128 ; CHECK-GI-NOFP16-NEXT: ret
6129 ;
6130 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i16:
6131 ; CHECK-GI-FP16: // %bb.0: // %entry
6132 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6133 ; CHECK-GI-FP16-NEXT: ret
6134 entry:
6135 %c = fptoui <3 x half> %a to <3 x i16>
6136 ret <3 x i16> %c
6137 }
6139 define <4 x i16> @fptos_v4f16_v4i16(<4 x half> %a) {
6140 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i16:
6141 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6142 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6143 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6144 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6145 ; CHECK-SD-NOFP16-NEXT: ret
6146 ;
6147 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i16:
6148 ; CHECK-SD-FP16: // %bb.0: // %entry
6149 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6150 ; CHECK-SD-FP16-NEXT: ret
6151 ;
6152 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i16:
6153 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6154 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6155 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6156 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6157 ; CHECK-GI-NOFP16-NEXT: ret
6158 ;
6159 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i16:
6160 ; CHECK-GI-FP16: // %bb.0: // %entry
6161 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6162 ; CHECK-GI-FP16-NEXT: ret
6163 entry:
6164 %c = fptosi <4 x half> %a to <4 x i16>
6165 ret <4 x i16> %c
6166 }
6168 define <4 x i16> @fptou_v4f16_v4i16(<4 x half> %a) {
6169 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i16:
6170 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6171 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6172 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6173 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6174 ; CHECK-SD-NOFP16-NEXT: ret
6175 ;
6176 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i16:
6177 ; CHECK-SD-FP16: // %bb.0: // %entry
6178 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
6179 ; CHECK-SD-FP16-NEXT: ret
6180 ;
6181 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i16:
6182 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6183 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6184 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6185 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6186 ; CHECK-GI-NOFP16-NEXT: ret
6187 ;
6188 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i16:
6189 ; CHECK-GI-FP16: // %bb.0: // %entry
6190 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6191 ; CHECK-GI-FP16-NEXT: ret
6192 entry:
6193 %c = fptoui <4 x half> %a to <4 x i16>
6194 ret <4 x i16> %c
6195 }
6197 define <8 x i16> @fptos_v8f16_v8i16(<8 x half> %a) {
6198 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i16:
6199 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6200 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6201 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6202 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6203 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6204 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6205 ; CHECK-SD-NOFP16-NEXT: ret
6206 ;
6207 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i16:
6208 ; CHECK-SD-FP16: // %bb.0: // %entry
6209 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6210 ; CHECK-SD-FP16-NEXT: ret
6211 ;
6212 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i16:
6213 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6214 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6215 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6216 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6217 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6218 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6219 ; CHECK-GI-NOFP16-NEXT: ret
6220 ;
6221 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i16:
6222 ; CHECK-GI-FP16: // %bb.0: // %entry
6223 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6224 ; CHECK-GI-FP16-NEXT: ret
6225 entry:
6226 %c = fptosi <8 x half> %a to <8 x i16>
6227 ret <8 x i16> %c
6228 }
6230 define <8 x i16> @fptou_v8f16_v8i16(<8 x half> %a) {
6231 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i16:
6232 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6233 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6234 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6235 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6236 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6237 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6238 ; CHECK-SD-NOFP16-NEXT: ret
6239 ;
6240 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i16:
6241 ; CHECK-SD-FP16: // %bb.0: // %entry
6242 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6243 ; CHECK-SD-FP16-NEXT: ret
6244 ;
6245 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i16:
6246 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6247 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6248 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6249 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6250 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6251 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6252 ; CHECK-GI-NOFP16-NEXT: ret
6253 ;
6254 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i16:
6255 ; CHECK-GI-FP16: // %bb.0: // %entry
6256 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6257 ; CHECK-GI-FP16-NEXT: ret
6258 entry:
6259 %c = fptoui <8 x half> %a to <8 x i16>
6260 ret <8 x i16> %c
6261 }
6263 define <16 x i16> @fptos_v16f16_v16i16(<16 x half> %a) {
6264 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i16:
6265 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6266 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
6267 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6268 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
6269 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6270 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6271 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6272 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6273 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6274 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
6275 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
6276 ; CHECK-SD-NOFP16-NEXT: ret
6277 ;
6278 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i16:
6279 ; CHECK-SD-FP16: // %bb.0: // %entry
6280 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6281 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6282 ; CHECK-SD-FP16-NEXT: ret
6283 ;
6284 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i16:
6285 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6286 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6287 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6288 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6289 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6290 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6291 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6292 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6293 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6294 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6295 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6296 ; CHECK-GI-NOFP16-NEXT: ret
6297 ;
6298 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i16:
6299 ; CHECK-GI-FP16: // %bb.0: // %entry
6300 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6301 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6302 ; CHECK-GI-FP16-NEXT: ret
6303 entry:
6304 %c = fptosi <16 x half> %a to <16 x i16>
6305 ret <16 x i16> %c
6306 }
6308 define <16 x i16> @fptou_v16f16_v16i16(<16 x half> %a) {
6309 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i16:
6310 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6311 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
6312 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6313 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
6314 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6315 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6316 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6317 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6318 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6319 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
6320 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
6321 ; CHECK-SD-NOFP16-NEXT: ret
6322 ;
6323 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i16:
6324 ; CHECK-SD-FP16: // %bb.0: // %entry
6325 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6326 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6327 ; CHECK-SD-FP16-NEXT: ret
6328 ;
6329 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i16:
6330 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6331 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6332 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6333 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6334 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6335 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6336 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6337 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6338 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6339 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6340 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6341 ; CHECK-GI-NOFP16-NEXT: ret
6342 ;
6343 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i16:
6344 ; CHECK-GI-FP16: // %bb.0: // %entry
6345 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6346 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6347 ; CHECK-GI-FP16-NEXT: ret
6348 entry:
6349 %c = fptoui <16 x half> %a to <16 x i16>
6350 ret <16 x i16> %c
6351 }
6353 define <32 x i16> @fptos_v32f16_v32i16(<32 x half> %a) {
6354 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i16:
6355 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6356 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
6357 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6358 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
6359 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6360 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
6361 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6362 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
6363 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6364 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6365 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6366 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6367 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6368 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6369 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6370 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6371 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6372 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
6373 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
6374 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
6375 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
6376 ; CHECK-SD-NOFP16-NEXT: ret
6377 ;
6378 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i16:
6379 ; CHECK-SD-FP16: // %bb.0: // %entry
6380 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6381 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6382 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
6383 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
6384 ; CHECK-SD-FP16-NEXT: ret
6385 ;
6386 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i16:
6387 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6388 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6389 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6390 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6391 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6392 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6393 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6394 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6395 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6396 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6397 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6398 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6399 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6400 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6401 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6402 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6403 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6404 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6405 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6406 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6407 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6408 ; CHECK-GI-NOFP16-NEXT: ret
6409 ;
6410 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i16:
6411 ; CHECK-GI-FP16: // %bb.0: // %entry
6412 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6413 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6414 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
6415 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
6416 ; CHECK-GI-FP16-NEXT: ret
6417 entry:
6418 %c = fptosi <32 x half> %a to <32 x i16>
6419 ret <32 x i16> %c
6420 }
6422 define <32 x i16> @fptou_v32f16_v32i16(<32 x half> %a) {
6423 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i16:
6424 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6425 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
6426 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6427 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
6428 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6429 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
6430 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6431 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
6432 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6433 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6434 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6435 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6436 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6437 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6438 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6439 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6440 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6441 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
6442 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
6443 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
6444 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
6445 ; CHECK-SD-NOFP16-NEXT: ret
6446 ;
6447 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i16:
6448 ; CHECK-SD-FP16: // %bb.0: // %entry
6449 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6450 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6451 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
6452 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
6453 ; CHECK-SD-FP16-NEXT: ret
6454 ;
6455 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i16:
6456 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6457 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6458 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6459 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6460 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6461 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6462 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6463 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6464 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6465 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6466 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6467 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6468 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6469 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6470 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6471 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6472 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6473 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6474 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6475 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6476 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6477 ; CHECK-GI-NOFP16-NEXT: ret
6478 ;
6479 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i16:
6480 ; CHECK-GI-FP16: // %bb.0: // %entry
6481 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6482 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6483 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
6484 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
6485 ; CHECK-GI-FP16-NEXT: ret
6486 entry:
6487 %c = fptoui <32 x half> %a to <32 x i16>
6488 ret <32 x i16> %c
6489 }
6491 define <2 x i8> @fptos_v2f16_v2i8(<2 x half> %a) {
6492 ; CHECK-SD-LABEL: fptos_v2f16_v2i8:
6493 ; CHECK-SD: // %bb.0: // %entry
6494 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6495 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6496 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6497 ; CHECK-SD-NEXT: ret
6498 ;
6499 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i8:
6500 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6501 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
6502 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
6503 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6504 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6505 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2s, v0.2s
6506 ; CHECK-GI-NOFP16-NEXT: ret
6507 ;
6508 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i8:
6509 ; CHECK-GI-FP16: // %bb.0: // %entry
6510 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
6511 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6512 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6513 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6514 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6515 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6516 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6517 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6518 ; CHECK-GI-FP16-NEXT: ret
6519 entry:
6520 %c = fptosi <2 x half> %a to <2 x i8>
6521 ret <2 x i8> %c
6522 }
6524 define <2 x i8> @fptou_v2f16_v2i8(<2 x half> %a) {
6525 ; CHECK-SD-LABEL: fptou_v2f16_v2i8:
6526 ; CHECK-SD: // %bb.0: // %entry
6527 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6528 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6529 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6530 ; CHECK-SD-NEXT: ret
6531 ;
6532 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i8:
6533 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6534 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
6535 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
6536 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
6537 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6538 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2s, v0.2s
6539 ; CHECK-GI-NOFP16-NEXT: ret
6540 ;
6541 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i8:
6542 ; CHECK-GI-FP16: // %bb.0: // %entry
6543 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
6544 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6545 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6546 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6547 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6548 ; CHECK-GI-FP16-NEXT: mov v0.h[1], v1.h[0]
6549 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6550 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6551 ; CHECK-GI-FP16-NEXT: ret
6552 entry:
6553 %c = fptoui <2 x half> %a to <2 x i8>
6554 ret <2 x i8> %c
6555 }
6557 define <3 x i8> @fptos_v3f16_v3i8(<3 x half> %a) {
6558 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i8:
6559 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6560 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6561 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6562 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6563 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
6564 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
6565 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
6566 ; CHECK-SD-NOFP16-NEXT: ret
6567 ;
6568 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i8:
6569 ; CHECK-SD-FP16: // %bb.0: // %entry
6570 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6571 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
6572 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
6573 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
6574 ; CHECK-SD-FP16-NEXT: ret
6575 ;
6576 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i8:
6577 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6578 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6579 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6580 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6581 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6582 ; CHECK-GI-NOFP16-NEXT: fmov w0, s0
6583 ; CHECK-GI-NOFP16-NEXT: fmov w1, s1
6584 ; CHECK-GI-NOFP16-NEXT: fmov w2, s2
6585 ; CHECK-GI-NOFP16-NEXT: ret
6586 ;
6587 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i8:
6588 ; CHECK-GI-FP16: // %bb.0: // %entry
6589 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6590 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
6591 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
6592 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
6593 ; CHECK-GI-FP16-NEXT: ret
6594 entry:
6595 %c = fptosi <3 x half> %a to <3 x i8>
6596 ret <3 x i8> %c
6597 }
6599 define <3 x i8> @fptou_v3f16_v3i8(<3 x half> %a) {
6600 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i8:
6601 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6602 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6603 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6604 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6605 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
6606 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
6607 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
6608 ; CHECK-SD-NOFP16-NEXT: ret
6609 ;
6610 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i8:
6611 ; CHECK-SD-FP16: // %bb.0: // %entry
6612 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6613 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
6614 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
6615 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
6616 ; CHECK-SD-FP16-NEXT: ret
6617 ;
6618 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i8:
6619 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6620 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6621 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6622 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6623 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6624 ; CHECK-GI-NOFP16-NEXT: fmov w0, s0
6625 ; CHECK-GI-NOFP16-NEXT: fmov w1, s1
6626 ; CHECK-GI-NOFP16-NEXT: fmov w2, s2
6627 ; CHECK-GI-NOFP16-NEXT: ret
6628 ;
6629 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i8:
6630 ; CHECK-GI-FP16: // %bb.0: // %entry
6631 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6632 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
6633 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
6634 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
6635 ; CHECK-GI-FP16-NEXT: ret
6636 entry:
6637 %c = fptoui <3 x half> %a to <3 x i8>
6638 ret <3 x i8> %c
6639 }
6641 define <4 x i8> @fptos_v4f16_v4i8(<4 x half> %a) {
6642 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i8:
6643 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6644 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6645 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6646 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6647 ; CHECK-SD-NOFP16-NEXT: ret
6648 ;
6649 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i8:
6650 ; CHECK-SD-FP16: // %bb.0: // %entry
6651 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6652 ; CHECK-SD-FP16-NEXT: ret
6653 ;
6654 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i8:
6655 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6656 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6657 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6658 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6659 ; CHECK-GI-NOFP16-NEXT: ret
6660 ;
6661 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i8:
6662 ; CHECK-GI-FP16: // %bb.0: // %entry
6663 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6664 ; CHECK-GI-FP16-NEXT: ret
6665 entry:
6666 %c = fptosi <4 x half> %a to <4 x i8>
6667 ret <4 x i8> %c
6668 }
6670 define <4 x i8> @fptou_v4f16_v4i8(<4 x half> %a) {
6671 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i8:
6672 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6673 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6674 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6675 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6676 ; CHECK-SD-NOFP16-NEXT: ret
6677 ;
6678 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i8:
6679 ; CHECK-SD-FP16: // %bb.0: // %entry
6680 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6681 ; CHECK-SD-FP16-NEXT: ret
6682 ;
6683 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i8:
6684 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6685 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6686 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6687 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6688 ; CHECK-GI-NOFP16-NEXT: ret
6689 ;
6690 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i8:
6691 ; CHECK-GI-FP16: // %bb.0: // %entry
6692 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6693 ; CHECK-GI-FP16-NEXT: ret
6694 entry:
6695 %c = fptoui <4 x half> %a to <4 x i8>
6696 ret <4 x i8> %c
6697 }
6699 define <8 x i8> @fptos_v8f16_v8i8(<8 x half> %a) {
6700 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i8:
6701 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6702 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6703 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6704 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6705 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6706 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6707 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
6708 ; CHECK-SD-NOFP16-NEXT: ret
6709 ;
6710 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i8:
6711 ; CHECK-SD-FP16: // %bb.0: // %entry
6712 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6713 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
6714 ; CHECK-SD-FP16-NEXT: ret
6715 ;
6716 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i8:
6717 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6718 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6719 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6720 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6721 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6722 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6723 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
6724 ; CHECK-GI-NOFP16-NEXT: ret
6725 ;
6726 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i8:
6727 ; CHECK-GI-FP16: // %bb.0: // %entry
6728 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6729 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
6730 ; CHECK-GI-FP16-NEXT: ret
6731 entry:
6732 %c = fptosi <8 x half> %a to <8 x i8>
6733 ret <8 x i8> %c
6734 }
6736 define <8 x i8> @fptou_v8f16_v8i8(<8 x half> %a) {
6737 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i8:
6738 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6739 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6740 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6741 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6742 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6743 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6744 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
6745 ; CHECK-SD-NOFP16-NEXT: ret
6746 ;
6747 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i8:
6748 ; CHECK-SD-FP16: // %bb.0: // %entry
6749 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6750 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
6751 ; CHECK-SD-FP16-NEXT: ret
6752 ;
6753 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i8:
6754 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6755 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6756 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6757 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6758 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6759 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6760 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
6761 ; CHECK-GI-NOFP16-NEXT: ret
6762 ;
6763 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i8:
6764 ; CHECK-GI-FP16: // %bb.0: // %entry
6765 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6766 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
6767 ; CHECK-GI-FP16-NEXT: ret
6768 entry:
6769 %c = fptoui <8 x half> %a to <8 x i8>
6770 ret <8 x i8> %c
6771 }
6773 define <16 x i8> @fptos_v16f16_v16i8(<16 x half> %a) {
6774 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i8:
6775 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6776 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
6777 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6778 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
6779 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6780 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6781 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6782 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6783 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6784 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
6785 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
6786 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6787 ; CHECK-SD-NOFP16-NEXT: ret
6788 ;
6789 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i8:
6790 ; CHECK-SD-FP16: // %bb.0: // %entry
6791 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6792 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6793 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6794 ; CHECK-SD-FP16-NEXT: ret
6795 ;
6796 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i8:
6797 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6798 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6799 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6800 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6801 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6802 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6803 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6804 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6805 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6806 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6807 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6808 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6809 ; CHECK-GI-NOFP16-NEXT: ret
6810 ;
6811 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i8:
6812 ; CHECK-GI-FP16: // %bb.0: // %entry
6813 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6814 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6815 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6816 ; CHECK-GI-FP16-NEXT: ret
6817 entry:
6818 %c = fptosi <16 x half> %a to <16 x i8>
6819 ret <16 x i8> %c
6820 }
6822 define <16 x i8> @fptou_v16f16_v16i8(<16 x half> %a) {
6823 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i8:
6824 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6825 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
6826 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6827 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
6828 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6829 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6830 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6831 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6832 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6833 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
6834 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
6835 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6836 ; CHECK-SD-NOFP16-NEXT: ret
6837 ;
6838 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i8:
6839 ; CHECK-SD-FP16: // %bb.0: // %entry
6840 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6841 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6842 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6843 ; CHECK-SD-FP16-NEXT: ret
6844 ;
6845 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i8:
6846 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6847 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6848 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6849 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6850 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6851 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6852 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6853 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6854 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6855 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6856 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6857 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6858 ; CHECK-GI-NOFP16-NEXT: ret
6859 ;
6860 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i8:
6861 ; CHECK-GI-FP16: // %bb.0: // %entry
6862 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6863 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6864 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6865 ; CHECK-GI-FP16-NEXT: ret
6866 entry:
6867 %c = fptoui <16 x half> %a to <16 x i8>
6868 ret <16 x i8> %c
6869 }
6871 define <32 x i8> @fptos_v32f16_v32i8(<32 x half> %a) {
6872 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i8:
6873 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6874 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
6875 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6876 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
6877 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6878 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
6879 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6880 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
6881 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6882 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6883 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6884 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6885 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6886 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6887 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6888 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6889 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6890 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
6891 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
6892 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
6893 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
6894 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6895 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6896 ; CHECK-SD-NOFP16-NEXT: ret
6897 ;
6898 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i8:
6899 ; CHECK-SD-FP16: // %bb.0: // %entry
6900 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6901 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6902 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
6903 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
6904 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6905 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6906 ; CHECK-SD-FP16-NEXT: ret
6907 ;
6908 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i8:
6909 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6910 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6911 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6912 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6913 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6914 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6915 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6916 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6917 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6918 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6919 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6920 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6921 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6922 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6923 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6924 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6925 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6926 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6927 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6928 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6929 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6930 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6931 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6932 ; CHECK-GI-NOFP16-NEXT: ret
6933 ;
6934 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i8:
6935 ; CHECK-GI-FP16: // %bb.0: // %entry
6936 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6937 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6938 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
6939 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
6940 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6941 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6942 ; CHECK-GI-FP16-NEXT: ret
6943 entry:
6944 %c = fptosi <32 x half> %a to <32 x i8>
6945 ret <32 x i8> %c
6946 }
6948 define <32 x i8> @fptou_v32f16_v32i8(<32 x half> %a) {
6949 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i8:
6950 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6951 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
6952 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6953 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
6954 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6955 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
6956 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6957 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
6958 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6959 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6960 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6961 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6962 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6963 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6964 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6965 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6966 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6967 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
6968 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
6969 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
6970 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
6971 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6972 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6973 ; CHECK-SD-NOFP16-NEXT: ret
6974 ;
6975 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i8:
6976 ; CHECK-SD-FP16: // %bb.0: // %entry
6977 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6978 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6979 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
6980 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
6981 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6982 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6983 ; CHECK-SD-FP16-NEXT: ret
6984 ;
6985 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i8:
6986 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6987 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6988 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6989 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6990 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6991 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6992 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6993 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6994 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6995 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6996 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6997 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6998 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6999 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
7000 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
7001 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
7002 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
7003 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
7004 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
7005 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
7006 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
7007 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
7008 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
7009 ; CHECK-GI-NOFP16-NEXT: ret
7010 ;
7011 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i8:
7012 ; CHECK-GI-FP16: // %bb.0: // %entry
7013 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
7014 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
7015 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
7016 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
7017 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
7018 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
7019 ; CHECK-GI-FP16-NEXT: ret
7020 entry:
7021 %c = fptoui <32 x half> %a to <32 x i8>
7022 ret <32 x i8> %c
7023 }
7025 define <2 x i128> @fptos_v2f16_v2i128(<2 x half> %a) {
7026 ; CHECK-SD-LABEL: fptos_v2f16_v2i128:
7027 ; CHECK-SD: // %bb.0: // %entry
7028 ; CHECK-SD-NEXT: sub sp, sp, #48
7029 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7030 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
7031 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7032 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7033 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7034 ; CHECK-SD-NEXT: .cfi_offset w30, -32
7035 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7036 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7037 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7038 ; CHECK-SD-NEXT: bl __fixhfti
7039 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7040 ; CHECK-SD-NEXT: mov x19, x0
7041 ; CHECK-SD-NEXT: mov x20, x1
7042 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7043 ; CHECK-SD-NEXT: bl __fixhfti
7044 ; CHECK-SD-NEXT: fmov d0, x0
7045 ; CHECK-SD-NEXT: mov x2, x19
7046 ; CHECK-SD-NEXT: mov x3, x20
7047 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
7048 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7049 ; CHECK-SD-NEXT: mov v0.d[1], x1
7050 ; CHECK-SD-NEXT: fmov x0, d0
7051 ; CHECK-SD-NEXT: add sp, sp, #48
7052 ; CHECK-SD-NEXT: ret
7053 ;
7054 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i128:
7055 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7056 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7057 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7058 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7059 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7060 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
7061 ; CHECK-GI-NOFP16-NEXT: fcvtzs x2, s1
7062 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
7063 ; CHECK-GI-NOFP16-NEXT: asr x3, x2, #63
7064 ; CHECK-GI-NOFP16-NEXT: ret
7065 ;
7066 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i128:
7067 ; CHECK-GI-FP16: // %bb.0: // %entry
7068 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7069 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7070 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
7071 ; CHECK-GI-FP16-NEXT: fcvtzs x2, h1
7072 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
7073 ; CHECK-GI-FP16-NEXT: asr x3, x2, #63
7074 ; CHECK-GI-FP16-NEXT: ret
7075 entry:
7076 %c = fptosi <2 x half> %a to <2 x i128>
7077 ret <2 x i128> %c
7078 }
7080 define <2 x i128> @fptou_v2f16_v2i128(<2 x half> %a) {
7081 ; CHECK-SD-LABEL: fptou_v2f16_v2i128:
7082 ; CHECK-SD: // %bb.0: // %entry
7083 ; CHECK-SD-NEXT: sub sp, sp, #48
7084 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7085 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
7086 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7087 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7088 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7089 ; CHECK-SD-NEXT: .cfi_offset w30, -32
7090 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7091 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7092 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7093 ; CHECK-SD-NEXT: bl __fixunshfti
7094 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7095 ; CHECK-SD-NEXT: mov x19, x0
7096 ; CHECK-SD-NEXT: mov x20, x1
7097 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7098 ; CHECK-SD-NEXT: bl __fixunshfti
7099 ; CHECK-SD-NEXT: fmov d0, x0
7100 ; CHECK-SD-NEXT: mov x2, x19
7101 ; CHECK-SD-NEXT: mov x3, x20
7102 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
7103 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7104 ; CHECK-SD-NEXT: mov v0.d[1], x1
7105 ; CHECK-SD-NEXT: fmov x0, d0
7106 ; CHECK-SD-NEXT: add sp, sp, #48
7107 ; CHECK-SD-NEXT: ret
7108 ;
7109 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i128:
7110 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7111 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7112 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7113 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
7114 ; CHECK-GI-NOFP16-NEXT: mov x3, xzr
7115 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7116 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7117 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
7118 ; CHECK-GI-NOFP16-NEXT: fcvtzu x2, s1
7119 ; CHECK-GI-NOFP16-NEXT: ret
7120 ;
7121 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i128:
7122 ; CHECK-GI-FP16: // %bb.0: // %entry
7123 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7124 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7125 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
7126 ; CHECK-GI-FP16-NEXT: mov x1, xzr
7127 ; CHECK-GI-FP16-NEXT: mov x3, xzr
7128 ; CHECK-GI-FP16-NEXT: fcvtzu x2, h1
7129 ; CHECK-GI-FP16-NEXT: ret
7130 entry:
7131 %c = fptoui <2 x half> %a to <2 x i128>
7132 ret <2 x i128> %c
7133 }
7135 define <3 x i128> @fptos_v3f16_v3i128(<3 x half> %a) {
7136 ; CHECK-SD-LABEL: fptos_v3f16_v3i128:
7137 ; CHECK-SD: // %bb.0: // %entry
7138 ; CHECK-SD-NEXT: sub sp, sp, #64
7139 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7140 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
7141 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7142 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7143 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7144 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7145 ; CHECK-SD-NEXT: .cfi_offset w21, -24
7146 ; CHECK-SD-NEXT: .cfi_offset w22, -32
7147 ; CHECK-SD-NEXT: .cfi_offset w30, -48
7148 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7149 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7150 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7151 ; CHECK-SD-NEXT: bl __fixhfti
7152 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7153 ; CHECK-SD-NEXT: mov x19, x0
7154 ; CHECK-SD-NEXT: mov x20, x1
7155 ; CHECK-SD-NEXT: mov h0, v0.h[2]
7156 ; CHECK-SD-NEXT: bl __fixhfti
7157 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7158 ; CHECK-SD-NEXT: mov x21, x0
7159 ; CHECK-SD-NEXT: mov x22, x1
7160 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7161 ; CHECK-SD-NEXT: bl __fixhfti
7162 ; CHECK-SD-NEXT: fmov d0, x0
7163 ; CHECK-SD-NEXT: mov x2, x19
7164 ; CHECK-SD-NEXT: mov x3, x20
7165 ; CHECK-SD-NEXT: mov x4, x21
7166 ; CHECK-SD-NEXT: mov x5, x22
7167 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7168 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7169 ; CHECK-SD-NEXT: mov v0.d[1], x1
7170 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
7171 ; CHECK-SD-NEXT: fmov x0, d0
7172 ; CHECK-SD-NEXT: add sp, sp, #64
7173 ; CHECK-SD-NEXT: ret
7174 ;
7175 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i128:
7176 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7177 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7178 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7179 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
7180 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7181 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7182 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
7183 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
7184 ; CHECK-GI-NOFP16-NEXT: fcvtzs x2, s1
7185 ; CHECK-GI-NOFP16-NEXT: fcvtzs x4, s2
7186 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
7187 ; CHECK-GI-NOFP16-NEXT: asr x3, x2, #63
7188 ; CHECK-GI-NOFP16-NEXT: asr x5, x4, #63
7189 ; CHECK-GI-NOFP16-NEXT: ret
7190 ;
7191 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i128:
7192 ; CHECK-GI-FP16: // %bb.0: // %entry
7193 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7194 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7195 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
7196 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
7197 ; CHECK-GI-FP16-NEXT: fcvtzs x2, h1
7198 ; CHECK-GI-FP16-NEXT: fcvtzs x4, h2
7199 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
7200 ; CHECK-GI-FP16-NEXT: asr x3, x2, #63
7201 ; CHECK-GI-FP16-NEXT: asr x5, x4, #63
7202 ; CHECK-GI-FP16-NEXT: ret
7203 entry:
7204 %c = fptosi <3 x half> %a to <3 x i128>
7205 ret <3 x i128> %c
7206 }
7208 define <3 x i128> @fptou_v3f16_v3i128(<3 x half> %a) {
7209 ; CHECK-SD-LABEL: fptou_v3f16_v3i128:
7210 ; CHECK-SD: // %bb.0: // %entry
7211 ; CHECK-SD-NEXT: sub sp, sp, #64
7212 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7213 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
7214 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7215 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7216 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7217 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7218 ; CHECK-SD-NEXT: .cfi_offset w21, -24
7219 ; CHECK-SD-NEXT: .cfi_offset w22, -32
7220 ; CHECK-SD-NEXT: .cfi_offset w30, -48
7221 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7222 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7223 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7224 ; CHECK-SD-NEXT: bl __fixunshfti
7225 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7226 ; CHECK-SD-NEXT: mov x19, x0
7227 ; CHECK-SD-NEXT: mov x20, x1
7228 ; CHECK-SD-NEXT: mov h0, v0.h[2]
7229 ; CHECK-SD-NEXT: bl __fixunshfti
7230 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7231 ; CHECK-SD-NEXT: mov x21, x0
7232 ; CHECK-SD-NEXT: mov x22, x1
7233 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7234 ; CHECK-SD-NEXT: bl __fixunshfti
7235 ; CHECK-SD-NEXT: fmov d0, x0
7236 ; CHECK-SD-NEXT: mov x2, x19
7237 ; CHECK-SD-NEXT: mov x3, x20
7238 ; CHECK-SD-NEXT: mov x4, x21
7239 ; CHECK-SD-NEXT: mov x5, x22
7240 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7241 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7242 ; CHECK-SD-NEXT: mov v0.d[1], x1
7243 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
7244 ; CHECK-SD-NEXT: fmov x0, d0
7245 ; CHECK-SD-NEXT: add sp, sp, #64
7246 ; CHECK-SD-NEXT: ret
7247 ;
7248 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i128:
7249 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7250 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7251 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7252 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
7253 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
7254 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7255 ; CHECK-GI-NOFP16-NEXT: mov x3, xzr
7256 ; CHECK-GI-NOFP16-NEXT: mov x5, xzr
7257 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7258 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
7259 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
7260 ; CHECK-GI-NOFP16-NEXT: fcvtzu x2, s1
7261 ; CHECK-GI-NOFP16-NEXT: fcvtzu x4, s2
7262 ; CHECK-GI-NOFP16-NEXT: ret
7263 ;
7264 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i128:
7265 ; CHECK-GI-FP16: // %bb.0: // %entry
7266 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7267 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7268 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
7269 ; CHECK-GI-FP16-NEXT: mov x1, xzr
7270 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
7271 ; CHECK-GI-FP16-NEXT: mov x3, xzr
7272 ; CHECK-GI-FP16-NEXT: mov x5, xzr
7273 ; CHECK-GI-FP16-NEXT: fcvtzu x2, h1
7274 ; CHECK-GI-FP16-NEXT: fcvtzu x4, h2
7275 ; CHECK-GI-FP16-NEXT: ret
7276 entry:
7277 %c = fptoui <3 x half> %a to <3 x i128>
7278 ret <3 x i128> %c
7279 }
7281 define <2 x i64> @fptos_v2f128_v2i64(<2 x fp128> %a) {
7282 ; CHECK-SD-LABEL: fptos_v2f128_v2i64:
7283 ; CHECK-SD: // %bb.0: // %entry
7284 ; CHECK-SD-NEXT: sub sp, sp, #48
7285 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7286 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7287 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7288 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7289 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
7290 ; CHECK-SD-NEXT: bl __fixtfdi
7291 ; CHECK-SD-NEXT: fmov d0, x0
7292 ; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
7293 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7294 ; CHECK-SD-NEXT: bl __fixtfdi
7295 ; CHECK-SD-NEXT: fmov d0, x0
7296 ; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
7297 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7298 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
7299 ; CHECK-SD-NEXT: add sp, sp, #48
7300 ; CHECK-SD-NEXT: ret
7301 ;
7302 ; CHECK-GI-LABEL: fptos_v2f128_v2i64:
7303 ; CHECK-GI: // %bb.0: // %entry
7304 ; CHECK-GI-NEXT: sub sp, sp, #32
7305 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7306 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7307 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7308 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7309 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7310 ; CHECK-GI-NEXT: bl __fixtfdi
7311 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7312 ; CHECK-GI-NEXT: mov x19, x0
7313 ; CHECK-GI-NEXT: bl __fixtfdi
7314 ; CHECK-GI-NEXT: fmov d0, x19
7315 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7316 ; CHECK-GI-NEXT: mov v0.d[1], x0
7317 ; CHECK-GI-NEXT: add sp, sp, #32
7318 ; CHECK-GI-NEXT: ret
7319 entry:
7320 %c = fptosi <2 x fp128> %a to <2 x i64>
7321 ret <2 x i64> %c
7322 }
7324 define <2 x i64> @fptou_v2f128_v2i64(<2 x fp128> %a) {
7325 ; CHECK-SD-LABEL: fptou_v2f128_v2i64:
7326 ; CHECK-SD: // %bb.0: // %entry
7327 ; CHECK-SD-NEXT: sub sp, sp, #48
7328 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7329 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7330 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7331 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7332 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
7333 ; CHECK-SD-NEXT: bl __fixunstfdi
7334 ; CHECK-SD-NEXT: fmov d0, x0
7335 ; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
7336 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7337 ; CHECK-SD-NEXT: bl __fixunstfdi
7338 ; CHECK-SD-NEXT: fmov d0, x0
7339 ; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
7340 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7341 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
7342 ; CHECK-SD-NEXT: add sp, sp, #48
7343 ; CHECK-SD-NEXT: ret
7344 ;
7345 ; CHECK-GI-LABEL: fptou_v2f128_v2i64:
7346 ; CHECK-GI: // %bb.0: // %entry
7347 ; CHECK-GI-NEXT: sub sp, sp, #32
7348 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7349 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7350 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7351 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7352 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7353 ; CHECK-GI-NEXT: bl __fixunstfdi
7354 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7355 ; CHECK-GI-NEXT: mov x19, x0
7356 ; CHECK-GI-NEXT: bl __fixunstfdi
7357 ; CHECK-GI-NEXT: fmov d0, x19
7358 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7359 ; CHECK-GI-NEXT: mov v0.d[1], x0
7360 ; CHECK-GI-NEXT: add sp, sp, #32
7361 ; CHECK-GI-NEXT: ret
7362 entry:
7363 %c = fptoui <2 x fp128> %a to <2 x i64>
7364 ret <2 x i64> %c
7365 }
7367 define <3 x i64> @fptos_v3f128_v3i64(<3 x fp128> %a) {
7368 ; CHECK-SD-LABEL: fptos_v3f128_v3i64:
7369 ; CHECK-SD: // %bb.0: // %entry
7370 ; CHECK-SD-NEXT: sub sp, sp, #64
7371 ; CHECK-SD-NEXT: str d8, [sp, #48] // 8-byte Folded Spill
7372 ; CHECK-SD-NEXT: str x30, [sp, #56] // 8-byte Folded Spill
7373 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7374 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7375 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7376 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7377 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7378 ; CHECK-SD-NEXT: bl __fixtfdi
7379 ; CHECK-SD-NEXT: fmov d0, x0
7380 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7381 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7382 ; CHECK-SD-NEXT: bl __fixtfdi
7383 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7384 ; CHECK-SD-NEXT: fmov d8, x0
7385 ; CHECK-SD-NEXT: bl __fixtfdi
7386 ; CHECK-SD-NEXT: fmov d0, d8
7387 ; CHECK-SD-NEXT: ldr q2, [sp, #32] // 16-byte Folded Reload
7388 ; CHECK-SD-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload
7389 ; CHECK-SD-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload
7390 ; CHECK-SD-NEXT: fmov d1, x0
7391 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
7392 ; CHECK-SD-NEXT: add sp, sp, #64
7393 ; CHECK-SD-NEXT: ret
7394 ;
7395 ; CHECK-GI-LABEL: fptos_v3f128_v3i64:
7396 ; CHECK-GI: // %bb.0: // %entry
7397 ; CHECK-GI-NEXT: sub sp, sp, #64
7398 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7399 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7400 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7401 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7402 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7403 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7404 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7405 ; CHECK-GI-NEXT: bl __fixtfdi
7406 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7407 ; CHECK-GI-NEXT: mov x19, x0
7408 ; CHECK-GI-NEXT: bl __fixtfdi
7409 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7410 ; CHECK-GI-NEXT: mov x20, x0
7411 ; CHECK-GI-NEXT: bl __fixtfdi
7412 ; CHECK-GI-NEXT: fmov d0, x19
7413 ; CHECK-GI-NEXT: fmov d1, x20
7414 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7415 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7416 ; CHECK-GI-NEXT: fmov d2, x0
7417 ; CHECK-GI-NEXT: add sp, sp, #64
7418 ; CHECK-GI-NEXT: ret
7419 entry:
7420 %c = fptosi <3 x fp128> %a to <3 x i64>
7421 ret <3 x i64> %c
7422 }
7424 define <3 x i64> @fptou_v3f128_v3i64(<3 x fp128> %a) {
7425 ; CHECK-SD-LABEL: fptou_v3f128_v3i64:
7426 ; CHECK-SD: // %bb.0: // %entry
7427 ; CHECK-SD-NEXT: sub sp, sp, #64
7428 ; CHECK-SD-NEXT: str d8, [sp, #48] // 8-byte Folded Spill
7429 ; CHECK-SD-NEXT: str x30, [sp, #56] // 8-byte Folded Spill
7430 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7431 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7432 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7433 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7434 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7435 ; CHECK-SD-NEXT: bl __fixunstfdi
7436 ; CHECK-SD-NEXT: fmov d0, x0
7437 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7438 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7439 ; CHECK-SD-NEXT: bl __fixunstfdi
7440 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7441 ; CHECK-SD-NEXT: fmov d8, x0
7442 ; CHECK-SD-NEXT: bl __fixunstfdi
7443 ; CHECK-SD-NEXT: fmov d0, d8
7444 ; CHECK-SD-NEXT: ldr q2, [sp, #32] // 16-byte Folded Reload
7445 ; CHECK-SD-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload
7446 ; CHECK-SD-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload
7447 ; CHECK-SD-NEXT: fmov d1, x0
7448 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
7449 ; CHECK-SD-NEXT: add sp, sp, #64
7450 ; CHECK-SD-NEXT: ret
7451 ;
7452 ; CHECK-GI-LABEL: fptou_v3f128_v3i64:
7453 ; CHECK-GI: // %bb.0: // %entry
7454 ; CHECK-GI-NEXT: sub sp, sp, #64
7455 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7456 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7457 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7458 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7459 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7460 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7461 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7462 ; CHECK-GI-NEXT: bl __fixunstfdi
7463 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7464 ; CHECK-GI-NEXT: mov x19, x0
7465 ; CHECK-GI-NEXT: bl __fixunstfdi
7466 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7467 ; CHECK-GI-NEXT: mov x20, x0
7468 ; CHECK-GI-NEXT: bl __fixunstfdi
7469 ; CHECK-GI-NEXT: fmov d0, x19
7470 ; CHECK-GI-NEXT: fmov d1, x20
7471 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7472 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7473 ; CHECK-GI-NEXT: fmov d2, x0
7474 ; CHECK-GI-NEXT: add sp, sp, #64
7475 ; CHECK-GI-NEXT: ret
7476 entry:
7477 %c = fptoui <3 x fp128> %a to <3 x i64>
7478 ret <3 x i64> %c
7479 }
7481 define <2 x i32> @fptos_v2f128_v2i32(<2 x fp128> %a) {
7482 ; CHECK-SD-LABEL: fptos_v2f128_v2i32:
7483 ; CHECK-SD: // %bb.0: // %entry
7484 ; CHECK-SD-NEXT: sub sp, sp, #48
7485 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7486 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7487 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7488 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7489 ; CHECK-SD-NEXT: bl __fixtfsi
7490 ; CHECK-SD-NEXT: fmov s0, w0
7491 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7492 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7493 ; CHECK-SD-NEXT: bl __fixtfsi
7494 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7495 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7496 ; CHECK-SD-NEXT: mov v0.s[1], w0
7497 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7498 ; CHECK-SD-NEXT: add sp, sp, #48
7499 ; CHECK-SD-NEXT: ret
7500 ;
7501 ; CHECK-GI-LABEL: fptos_v2f128_v2i32:
7502 ; CHECK-GI: // %bb.0: // %entry
7503 ; CHECK-GI-NEXT: sub sp, sp, #32
7504 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7505 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7506 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7507 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7508 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7509 ; CHECK-GI-NEXT: bl __fixtfsi
7510 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7511 ; CHECK-GI-NEXT: mov w19, w0
7512 ; CHECK-GI-NEXT: bl __fixtfsi
7513 ; CHECK-GI-NEXT: fmov s0, w19
7514 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7515 ; CHECK-GI-NEXT: mov v0.s[1], w0
7516 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7517 ; CHECK-GI-NEXT: add sp, sp, #32
7518 ; CHECK-GI-NEXT: ret
7519 entry:
7520 %c = fptosi <2 x fp128> %a to <2 x i32>
7521 ret <2 x i32> %c
7522 }
7524 define <2 x i32> @fptou_v2f128_v2i32(<2 x fp128> %a) {
7525 ; CHECK-SD-LABEL: fptou_v2f128_v2i32:
7526 ; CHECK-SD: // %bb.0: // %entry
7527 ; CHECK-SD-NEXT: sub sp, sp, #48
7528 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7529 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7530 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7531 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7532 ; CHECK-SD-NEXT: bl __fixunstfsi
7533 ; CHECK-SD-NEXT: fmov s0, w0
7534 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7535 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7536 ; CHECK-SD-NEXT: bl __fixunstfsi
7537 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7538 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7539 ; CHECK-SD-NEXT: mov v0.s[1], w0
7540 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7541 ; CHECK-SD-NEXT: add sp, sp, #48
7542 ; CHECK-SD-NEXT: ret
7543 ;
7544 ; CHECK-GI-LABEL: fptou_v2f128_v2i32:
7545 ; CHECK-GI: // %bb.0: // %entry
7546 ; CHECK-GI-NEXT: sub sp, sp, #32
7547 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7548 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7549 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7550 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7551 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7552 ; CHECK-GI-NEXT: bl __fixunstfsi
7553 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7554 ; CHECK-GI-NEXT: mov w19, w0
7555 ; CHECK-GI-NEXT: bl __fixunstfsi
7556 ; CHECK-GI-NEXT: fmov s0, w19
7557 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7558 ; CHECK-GI-NEXT: mov v0.s[1], w0
7559 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7560 ; CHECK-GI-NEXT: add sp, sp, #32
7561 ; CHECK-GI-NEXT: ret
7562 entry:
7563 %c = fptoui <2 x fp128> %a to <2 x i32>
7564 ret <2 x i32> %c
7565 }
7567 define <3 x i32> @fptos_v3f128_v3i32(<3 x fp128> %a) {
7568 ; CHECK-SD-LABEL: fptos_v3f128_v3i32:
7569 ; CHECK-SD: // %bb.0: // %entry
7570 ; CHECK-SD-NEXT: sub sp, sp, #64
7571 ; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill
7572 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7573 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7574 ; CHECK-SD-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7575 ; CHECK-SD-NEXT: bl __fixtfsi
7576 ; CHECK-SD-NEXT: fmov s0, w0
7577 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7578 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7579 ; CHECK-SD-NEXT: bl __fixtfsi
7580 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7581 ; CHECK-SD-NEXT: mov v0.s[1], w0
7582 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7583 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7584 ; CHECK-SD-NEXT: bl __fixtfsi
7585 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7586 ; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
7587 ; CHECK-SD-NEXT: mov v0.s[2], w0
7588 ; CHECK-SD-NEXT: add sp, sp, #64
7589 ; CHECK-SD-NEXT: ret
7590 ;
7591 ; CHECK-GI-LABEL: fptos_v3f128_v3i32:
7592 ; CHECK-GI: // %bb.0: // %entry
7593 ; CHECK-GI-NEXT: sub sp, sp, #64
7594 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7595 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7596 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7597 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7598 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7599 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7600 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7601 ; CHECK-GI-NEXT: bl __fixtfsi
7602 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7603 ; CHECK-GI-NEXT: mov w19, w0
7604 ; CHECK-GI-NEXT: bl __fixtfsi
7605 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7606 ; CHECK-GI-NEXT: mov w20, w0
7607 ; CHECK-GI-NEXT: bl __fixtfsi
7608 ; CHECK-GI-NEXT: fmov s0, w19
7609 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7610 ; CHECK-GI-NEXT: mov v0.s[1], w20
7611 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7612 ; CHECK-GI-NEXT: mov v0.s[2], w0
7613 ; CHECK-GI-NEXT: add sp, sp, #64
7614 ; CHECK-GI-NEXT: ret
7615 entry:
7616 %c = fptosi <3 x fp128> %a to <3 x i32>
7617 ret <3 x i32> %c
7618 }
7620 define <3 x i32> @fptou_v3f128_v3i32(<3 x fp128> %a) {
7621 ; CHECK-SD-LABEL: fptou_v3f128_v3i32:
7622 ; CHECK-SD: // %bb.0: // %entry
7623 ; CHECK-SD-NEXT: sub sp, sp, #64
7624 ; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill
7625 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7626 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7627 ; CHECK-SD-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7628 ; CHECK-SD-NEXT: bl __fixunstfsi
7629 ; CHECK-SD-NEXT: fmov s0, w0
7630 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7631 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7632 ; CHECK-SD-NEXT: bl __fixunstfsi
7633 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7634 ; CHECK-SD-NEXT: mov v0.s[1], w0
7635 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7636 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7637 ; CHECK-SD-NEXT: bl __fixunstfsi
7638 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7639 ; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
7640 ; CHECK-SD-NEXT: mov v0.s[2], w0
7641 ; CHECK-SD-NEXT: add sp, sp, #64
7642 ; CHECK-SD-NEXT: ret
7643 ;
7644 ; CHECK-GI-LABEL: fptou_v3f128_v3i32:
7645 ; CHECK-GI: // %bb.0: // %entry
7646 ; CHECK-GI-NEXT: sub sp, sp, #64
7647 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7648 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7649 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7650 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7651 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7652 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7653 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7654 ; CHECK-GI-NEXT: bl __fixunstfsi
7655 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7656 ; CHECK-GI-NEXT: mov w19, w0
7657 ; CHECK-GI-NEXT: bl __fixunstfsi
7658 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7659 ; CHECK-GI-NEXT: mov w20, w0
7660 ; CHECK-GI-NEXT: bl __fixunstfsi
7661 ; CHECK-GI-NEXT: fmov s0, w19
7662 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7663 ; CHECK-GI-NEXT: mov v0.s[1], w20
7664 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7665 ; CHECK-GI-NEXT: mov v0.s[2], w0
7666 ; CHECK-GI-NEXT: add sp, sp, #64
7667 ; CHECK-GI-NEXT: ret
7668 entry:
7669 %c = fptoui <3 x fp128> %a to <3 x i32>
7670 ret <3 x i32> %c
7671 }
7673 define <2 x i16> @fptos_v2f128_v2i16(<2 x fp128> %a) {
7674 ; CHECK-SD-LABEL: fptos_v2f128_v2i16:
7675 ; CHECK-SD: // %bb.0: // %entry
7676 ; CHECK-SD-NEXT: sub sp, sp, #48
7677 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7678 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7679 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7680 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7681 ; CHECK-SD-NEXT: bl __fixtfsi
7682 ; CHECK-SD-NEXT: fmov s0, w0
7683 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7684 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7685 ; CHECK-SD-NEXT: bl __fixtfsi
7686 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7687 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7688 ; CHECK-SD-NEXT: mov v0.s[1], w0
7689 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7690 ; CHECK-SD-NEXT: add sp, sp, #48
7691 ; CHECK-SD-NEXT: ret
7692 ;
7693 ; CHECK-GI-LABEL: fptos_v2f128_v2i16:
7694 ; CHECK-GI: // %bb.0: // %entry
7695 ; CHECK-GI-NEXT: sub sp, sp, #32
7696 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7697 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7698 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7699 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7700 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7701 ; CHECK-GI-NEXT: bl __fixtfsi
7702 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7703 ; CHECK-GI-NEXT: mov w19, w0
7704 ; CHECK-GI-NEXT: bl __fixtfsi
7705 ; CHECK-GI-NEXT: fmov s0, w19
7706 ; CHECK-GI-NEXT: fmov s1, w0
7707 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7708 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
7709 ; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
7710 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7711 ; CHECK-GI-NEXT: add sp, sp, #32
7712 ; CHECK-GI-NEXT: ret
7713 entry:
7714 %c = fptosi <2 x fp128> %a to <2 x i16>
7715 ret <2 x i16> %c
7716 }
7718 define <2 x i16> @fptou_v2f128_v2i16(<2 x fp128> %a) {
7719 ; CHECK-SD-LABEL: fptou_v2f128_v2i16:
7720 ; CHECK-SD: // %bb.0: // %entry
7721 ; CHECK-SD-NEXT: sub sp, sp, #48
7722 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7723 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7724 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7725 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7726 ; CHECK-SD-NEXT: bl __fixtfsi
7727 ; CHECK-SD-NEXT: fmov s0, w0
7728 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7729 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7730 ; CHECK-SD-NEXT: bl __fixtfsi
7731 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7732 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7733 ; CHECK-SD-NEXT: mov v0.s[1], w0
7734 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7735 ; CHECK-SD-NEXT: add sp, sp, #48
7736 ; CHECK-SD-NEXT: ret
7737 ;
7738 ; CHECK-GI-LABEL: fptou_v2f128_v2i16:
7739 ; CHECK-GI: // %bb.0: // %entry
7740 ; CHECK-GI-NEXT: sub sp, sp, #32
7741 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7742 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7743 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7744 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7745 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7746 ; CHECK-GI-NEXT: bl __fixunstfsi
7747 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7748 ; CHECK-GI-NEXT: mov w19, w0
7749 ; CHECK-GI-NEXT: bl __fixunstfsi
7750 ; CHECK-GI-NEXT: fmov s0, w19
7751 ; CHECK-GI-NEXT: fmov s1, w0
7752 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7753 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
7754 ; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
7755 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7756 ; CHECK-GI-NEXT: add sp, sp, #32
7757 ; CHECK-GI-NEXT: ret
7758 entry:
7759 %c = fptoui <2 x fp128> %a to <2 x i16>
7760 ret <2 x i16> %c
7761 }
7763 define <3 x i16> @fptos_v3f128_v3i16(<3 x fp128> %a) {
7764 ; CHECK-SD-LABEL: fptos_v3f128_v3i16:
7765 ; CHECK-SD: // %bb.0: // %entry
7766 ; CHECK-SD-NEXT: sub sp, sp, #48
7767 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7768 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7769 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7770 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7771 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7772 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7773 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7774 ; CHECK-SD-NEXT: bl __fixtfsi
7775 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7776 ; CHECK-SD-NEXT: fmov s8, w0
7777 ; CHECK-SD-NEXT: bl __fixtfsi
7778 ; CHECK-SD-NEXT: fmov s0, w0
7779 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7780 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7781 ; CHECK-SD-NEXT: bl __fixtfsi
7782 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7783 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7784 ; CHECK-SD-NEXT: mov v0.s[1], w0
7785 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7786 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7787 ; CHECK-SD-NEXT: add sp, sp, #48
7788 ; CHECK-SD-NEXT: ret
7789 ;
7790 ; CHECK-GI-LABEL: fptos_v3f128_v3i16:
7791 ; CHECK-GI: // %bb.0: // %entry
7792 ; CHECK-GI-NEXT: sub sp, sp, #64
7793 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7794 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7795 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7796 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7797 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7798 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7799 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7800 ; CHECK-GI-NEXT: bl __fixtfsi
7801 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7802 ; CHECK-GI-NEXT: mov w19, w0
7803 ; CHECK-GI-NEXT: bl __fixtfsi
7804 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7805 ; CHECK-GI-NEXT: mov w20, w0
7806 ; CHECK-GI-NEXT: bl __fixtfsi
7807 ; CHECK-GI-NEXT: fmov s0, w19
7808 ; CHECK-GI-NEXT: fmov s1, w20
7809 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7810 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7811 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
7812 ; CHECK-GI-NEXT: fmov s1, w0
7813 ; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
7814 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7815 ; CHECK-GI-NEXT: add sp, sp, #64
7816 ; CHECK-GI-NEXT: ret
7817 entry:
7818 %c = fptosi <3 x fp128> %a to <3 x i16>
7819 ret <3 x i16> %c
7820 }
7822 define <3 x i16> @fptou_v3f128_v3i16(<3 x fp128> %a) {
7823 ; CHECK-SD-LABEL: fptou_v3f128_v3i16:
7824 ; CHECK-SD: // %bb.0: // %entry
7825 ; CHECK-SD-NEXT: sub sp, sp, #48
7826 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7827 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7828 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7829 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7830 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7831 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7832 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7833 ; CHECK-SD-NEXT: bl __fixtfsi
7834 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7835 ; CHECK-SD-NEXT: fmov s8, w0
7836 ; CHECK-SD-NEXT: bl __fixtfsi
7837 ; CHECK-SD-NEXT: fmov s0, w0
7838 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7839 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7840 ; CHECK-SD-NEXT: bl __fixtfsi
7841 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7842 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7843 ; CHECK-SD-NEXT: mov v0.s[1], w0
7844 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7845 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7846 ; CHECK-SD-NEXT: add sp, sp, #48
7847 ; CHECK-SD-NEXT: ret
7848 ;
7849 ; CHECK-GI-LABEL: fptou_v3f128_v3i16:
7850 ; CHECK-GI: // %bb.0: // %entry
7851 ; CHECK-GI-NEXT: sub sp, sp, #64
7852 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7853 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7854 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7855 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7856 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7857 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7858 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7859 ; CHECK-GI-NEXT: bl __fixunstfsi
7860 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7861 ; CHECK-GI-NEXT: mov w19, w0
7862 ; CHECK-GI-NEXT: bl __fixunstfsi
7863 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7864 ; CHECK-GI-NEXT: mov w20, w0
7865 ; CHECK-GI-NEXT: bl __fixunstfsi
7866 ; CHECK-GI-NEXT: fmov s0, w19
7867 ; CHECK-GI-NEXT: fmov s1, w20
7868 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7869 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7870 ; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
7871 ; CHECK-GI-NEXT: fmov s1, w0
7872 ; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
7873 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7874 ; CHECK-GI-NEXT: add sp, sp, #64
7875 ; CHECK-GI-NEXT: ret
7876 entry:
7877 %c = fptoui <3 x fp128> %a to <3 x i16>
7878 ret <3 x i16> %c
7879 }
7881 define <2 x i8> @fptos_v2f128_v2i8(<2 x fp128> %a) {
7882 ; CHECK-SD-LABEL: fptos_v2f128_v2i8:
7883 ; CHECK-SD: // %bb.0: // %entry
7884 ; CHECK-SD-NEXT: sub sp, sp, #48
7885 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7886 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7887 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7888 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7889 ; CHECK-SD-NEXT: bl __fixtfsi
7890 ; CHECK-SD-NEXT: fmov s0, w0
7891 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7892 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7893 ; CHECK-SD-NEXT: bl __fixtfsi
7894 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7895 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7896 ; CHECK-SD-NEXT: mov v0.s[1], w0
7897 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7898 ; CHECK-SD-NEXT: add sp, sp, #48
7899 ; CHECK-SD-NEXT: ret
7900 ;
7901 ; CHECK-GI-LABEL: fptos_v2f128_v2i8:
7902 ; CHECK-GI: // %bb.0: // %entry
7903 ; CHECK-GI-NEXT: sub sp, sp, #32
7904 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7905 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7906 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7907 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7908 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7909 ; CHECK-GI-NEXT: bl __fixtfsi
7910 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7911 ; CHECK-GI-NEXT: mov w19, w0
7912 ; CHECK-GI-NEXT: bl __fixtfsi
7913 ; CHECK-GI-NEXT: fmov s0, w19
7914 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7915 ; CHECK-GI-NEXT: mov v0.s[1], w0
7916 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7917 ; CHECK-GI-NEXT: add sp, sp, #32
7918 ; CHECK-GI-NEXT: ret
7919 entry:
7920 %c = fptosi <2 x fp128> %a to <2 x i8>
7921 ret <2 x i8> %c
7922 }
7924 define <2 x i8> @fptou_v2f128_v2i8(<2 x fp128> %a) {
7925 ; CHECK-SD-LABEL: fptou_v2f128_v2i8:
7926 ; CHECK-SD: // %bb.0: // %entry
7927 ; CHECK-SD-NEXT: sub sp, sp, #48
7928 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7929 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7930 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7931 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7932 ; CHECK-SD-NEXT: bl __fixtfsi
7933 ; CHECK-SD-NEXT: fmov s0, w0
7934 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7935 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7936 ; CHECK-SD-NEXT: bl __fixtfsi
7937 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7938 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7939 ; CHECK-SD-NEXT: mov v0.s[1], w0
7940 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7941 ; CHECK-SD-NEXT: add sp, sp, #48
7942 ; CHECK-SD-NEXT: ret
7943 ;
7944 ; CHECK-GI-LABEL: fptou_v2f128_v2i8:
7945 ; CHECK-GI: // %bb.0: // %entry
7946 ; CHECK-GI-NEXT: sub sp, sp, #32
7947 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7948 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7949 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7950 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7951 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7952 ; CHECK-GI-NEXT: bl __fixunstfsi
7953 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7954 ; CHECK-GI-NEXT: mov w19, w0
7955 ; CHECK-GI-NEXT: bl __fixunstfsi
7956 ; CHECK-GI-NEXT: fmov s0, w19
7957 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7958 ; CHECK-GI-NEXT: mov v0.s[1], w0
7959 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7960 ; CHECK-GI-NEXT: add sp, sp, #32
7961 ; CHECK-GI-NEXT: ret
7962 entry:
7963 %c = fptoui <2 x fp128> %a to <2 x i8>
7964 ret <2 x i8> %c
7965 }
7967 define <3 x i8> @fptos_v3f128_v3i8(<3 x fp128> %a) {
7968 ; CHECK-SD-LABEL: fptos_v3f128_v3i8:
7969 ; CHECK-SD: // %bb.0: // %entry
7970 ; CHECK-SD-NEXT: sub sp, sp, #48
7971 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7972 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7973 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7974 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7975 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7976 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7977 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7978 ; CHECK-SD-NEXT: bl __fixtfsi
7979 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7980 ; CHECK-SD-NEXT: fmov s8, w0
7981 ; CHECK-SD-NEXT: bl __fixtfsi
7982 ; CHECK-SD-NEXT: fmov s0, w0
7983 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7984 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7985 ; CHECK-SD-NEXT: bl __fixtfsi
7986 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7987 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7988 ; CHECK-SD-NEXT: mov v0.s[1], w0
7989 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7990 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7991 ; CHECK-SD-NEXT: umov w0, v0.h[0]
7992 ; CHECK-SD-NEXT: umov w1, v0.h[1]
7993 ; CHECK-SD-NEXT: umov w2, v0.h[2]
7994 ; CHECK-SD-NEXT: add sp, sp, #48
7995 ; CHECK-SD-NEXT: ret
7996 ;
7997 ; CHECK-GI-LABEL: fptos_v3f128_v3i8:
7998 ; CHECK-GI: // %bb.0: // %entry
7999 ; CHECK-GI-NEXT: sub sp, sp, #64
8000 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8001 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
8002 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
8003 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8004 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8005 ; CHECK-GI-NEXT: .cfi_offset w30, -32
8006 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8007 ; CHECK-GI-NEXT: bl __fixtfsi
8008 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8009 ; CHECK-GI-NEXT: mov w19, w0
8010 ; CHECK-GI-NEXT: bl __fixtfsi
8011 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8012 ; CHECK-GI-NEXT: mov w20, w0
8013 ; CHECK-GI-NEXT: bl __fixtfsi
8014 ; CHECK-GI-NEXT: mov w2, w0
8015 ; CHECK-GI-NEXT: mov w0, w19
8016 ; CHECK-GI-NEXT: mov w1, w20
8017 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
8018 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8019 ; CHECK-GI-NEXT: add sp, sp, #64
8020 ; CHECK-GI-NEXT: ret
8021 entry:
8022 %c = fptosi <3 x fp128> %a to <3 x i8>
8023 ret <3 x i8> %c
8024 }
8026 define <3 x i8> @fptou_v3f128_v3i8(<3 x fp128> %a) {
8027 ; CHECK-SD-LABEL: fptou_v3f128_v3i8:
8028 ; CHECK-SD: // %bb.0: // %entry
8029 ; CHECK-SD-NEXT: sub sp, sp, #48
8030 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
8031 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
8032 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
8033 ; CHECK-SD-NEXT: .cfi_offset w30, -8
8034 ; CHECK-SD-NEXT: .cfi_offset b8, -16
8035 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
8036 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
8037 ; CHECK-SD-NEXT: bl __fixtfsi
8038 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8039 ; CHECK-SD-NEXT: fmov s8, w0
8040 ; CHECK-SD-NEXT: bl __fixtfsi
8041 ; CHECK-SD-NEXT: fmov s0, w0
8042 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
8043 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8044 ; CHECK-SD-NEXT: bl __fixtfsi
8045 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8046 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
8047 ; CHECK-SD-NEXT: mov v0.s[1], w0
8048 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
8049 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
8050 ; CHECK-SD-NEXT: umov w0, v0.h[0]
8051 ; CHECK-SD-NEXT: umov w1, v0.h[1]
8052 ; CHECK-SD-NEXT: umov w2, v0.h[2]
8053 ; CHECK-SD-NEXT: add sp, sp, #48
8054 ; CHECK-SD-NEXT: ret
8055 ;
8056 ; CHECK-GI-LABEL: fptou_v3f128_v3i8:
8057 ; CHECK-GI: // %bb.0: // %entry
8058 ; CHECK-GI-NEXT: sub sp, sp, #64
8059 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8060 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
8061 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
8062 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8063 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8064 ; CHECK-GI-NEXT: .cfi_offset w30, -32
8065 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8066 ; CHECK-GI-NEXT: bl __fixunstfsi
8067 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8068 ; CHECK-GI-NEXT: mov w19, w0
8069 ; CHECK-GI-NEXT: bl __fixunstfsi
8070 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8071 ; CHECK-GI-NEXT: mov w20, w0
8072 ; CHECK-GI-NEXT: bl __fixunstfsi
8073 ; CHECK-GI-NEXT: mov w2, w0
8074 ; CHECK-GI-NEXT: mov w0, w19
8075 ; CHECK-GI-NEXT: mov w1, w20
8076 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
8077 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8078 ; CHECK-GI-NEXT: add sp, sp, #64
8079 ; CHECK-GI-NEXT: ret
8080 entry:
8081 %c = fptoui <3 x fp128> %a to <3 x i8>
8082 ret <3 x i8> %c
8083 }
8085 define <2 x i128> @fptos_v2f128_v2i128(<2 x fp128> %a) {
8086 ; CHECK-SD-LABEL: fptos_v2f128_v2i128:
8087 ; CHECK-SD: // %bb.0: // %entry
8088 ; CHECK-SD-NEXT: sub sp, sp, #48
8089 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
8090 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
8091 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
8092 ; CHECK-SD-NEXT: .cfi_offset w19, -8
8093 ; CHECK-SD-NEXT: .cfi_offset w20, -16
8094 ; CHECK-SD-NEXT: .cfi_offset w30, -32
8095 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
8096 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
8097 ; CHECK-SD-NEXT: bl __fixtfti
8098 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8099 ; CHECK-SD-NEXT: mov x19, x0
8100 ; CHECK-SD-NEXT: mov x20, x1
8101 ; CHECK-SD-NEXT: bl __fixtfti
8102 ; CHECK-SD-NEXT: fmov d0, x0
8103 ; CHECK-SD-NEXT: mov x2, x19
8104 ; CHECK-SD-NEXT: mov x3, x20
8105 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8106 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8107 ; CHECK-SD-NEXT: mov v0.d[1], x1
8108 ; CHECK-SD-NEXT: fmov x0, d0
8109 ; CHECK-SD-NEXT: add sp, sp, #48
8110 ; CHECK-SD-NEXT: ret
8111 ;
8112 ; CHECK-GI-LABEL: fptos_v2f128_v2i128:
8113 ; CHECK-GI: // %bb.0: // %entry
8114 ; CHECK-GI-NEXT: sub sp, sp, #48
8115 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
8116 ; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
8117 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
8118 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8119 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8120 ; CHECK-GI-NEXT: .cfi_offset w30, -32
8121 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
8122 ; CHECK-GI-NEXT: bl __fixtfti
8123 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8124 ; CHECK-GI-NEXT: mov x19, x0
8125 ; CHECK-GI-NEXT: mov x20, x1
8126 ; CHECK-GI-NEXT: bl __fixtfti
8127 ; CHECK-GI-NEXT: mov x2, x0
8128 ; CHECK-GI-NEXT: mov x3, x1
8129 ; CHECK-GI-NEXT: mov x0, x19
8130 ; CHECK-GI-NEXT: mov x1, x20
8131 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8132 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8133 ; CHECK-GI-NEXT: add sp, sp, #48
8134 ; CHECK-GI-NEXT: ret
8135 entry:
8136 %c = fptosi <2 x fp128> %a to <2 x i128>
8137 ret <2 x i128> %c
8138 }
8140 define <2 x i128> @fptou_v2f128_v2i128(<2 x fp128> %a) {
8141 ; CHECK-SD-LABEL: fptou_v2f128_v2i128:
8142 ; CHECK-SD: // %bb.0: // %entry
8143 ; CHECK-SD-NEXT: sub sp, sp, #48
8144 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
8145 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
8146 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
8147 ; CHECK-SD-NEXT: .cfi_offset w19, -8
8148 ; CHECK-SD-NEXT: .cfi_offset w20, -16
8149 ; CHECK-SD-NEXT: .cfi_offset w30, -32
8150 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
8151 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
8152 ; CHECK-SD-NEXT: bl __fixunstfti
8153 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8154 ; CHECK-SD-NEXT: mov x19, x0
8155 ; CHECK-SD-NEXT: mov x20, x1
8156 ; CHECK-SD-NEXT: bl __fixunstfti
8157 ; CHECK-SD-NEXT: fmov d0, x0
8158 ; CHECK-SD-NEXT: mov x2, x19
8159 ; CHECK-SD-NEXT: mov x3, x20
8160 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8161 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8162 ; CHECK-SD-NEXT: mov v0.d[1], x1
8163 ; CHECK-SD-NEXT: fmov x0, d0
8164 ; CHECK-SD-NEXT: add sp, sp, #48
8165 ; CHECK-SD-NEXT: ret
8166 ;
8167 ; CHECK-GI-LABEL: fptou_v2f128_v2i128:
8168 ; CHECK-GI: // %bb.0: // %entry
8169 ; CHECK-GI-NEXT: sub sp, sp, #48
8170 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
8171 ; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
8172 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
8173 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8174 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8175 ; CHECK-GI-NEXT: .cfi_offset w30, -32
8176 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
8177 ; CHECK-GI-NEXT: bl __fixunstfti
8178 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8179 ; CHECK-GI-NEXT: mov x19, x0
8180 ; CHECK-GI-NEXT: mov x20, x1
8181 ; CHECK-GI-NEXT: bl __fixunstfti
8182 ; CHECK-GI-NEXT: mov x2, x0
8183 ; CHECK-GI-NEXT: mov x3, x1
8184 ; CHECK-GI-NEXT: mov x0, x19
8185 ; CHECK-GI-NEXT: mov x1, x20
8186 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8187 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8188 ; CHECK-GI-NEXT: add sp, sp, #48
8189 ; CHECK-GI-NEXT: ret
8190 entry:
8191 %c = fptoui <2 x fp128> %a to <2 x i128>
8192 ret <2 x i128> %c
8193 }
8195 define <3 x i128> @fptos_v3f128_v3i128(<3 x fp128> %a) {
8196 ; CHECK-SD-LABEL: fptos_v3f128_v3i128:
8197 ; CHECK-SD: // %bb.0: // %entry
8198 ; CHECK-SD-NEXT: sub sp, sp, #80
8199 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8200 ; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8201 ; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8202 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 80
8203 ; CHECK-SD-NEXT: .cfi_offset w19, -8
8204 ; CHECK-SD-NEXT: .cfi_offset w20, -16
8205 ; CHECK-SD-NEXT: .cfi_offset w21, -24
8206 ; CHECK-SD-NEXT: .cfi_offset w22, -32
8207 ; CHECK-SD-NEXT: .cfi_offset w30, -48
8208 ; CHECK-SD-NEXT: stp q2, q0, [sp] // 32-byte Folded Spill
8209 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
8210 ; CHECK-SD-NEXT: bl __fixtfti
8211 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8212 ; CHECK-SD-NEXT: mov x19, x0
8213 ; CHECK-SD-NEXT: mov x20, x1
8214 ; CHECK-SD-NEXT: bl __fixtfti
8215 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8216 ; CHECK-SD-NEXT: mov x21, x0
8217 ; CHECK-SD-NEXT: mov x22, x1
8218 ; CHECK-SD-NEXT: bl __fixtfti
8219 ; CHECK-SD-NEXT: fmov d0, x0
8220 ; CHECK-SD-NEXT: mov x2, x19
8221 ; CHECK-SD-NEXT: mov x3, x20
8222 ; CHECK-SD-NEXT: mov x4, x21
8223 ; CHECK-SD-NEXT: mov x5, x22
8224 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8225 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8226 ; CHECK-SD-NEXT: mov v0.d[1], x1
8227 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8228 ; CHECK-SD-NEXT: fmov x0, d0
8229 ; CHECK-SD-NEXT: add sp, sp, #80
8230 ; CHECK-SD-NEXT: ret
8231 ;
8232 ; CHECK-GI-LABEL: fptos_v3f128_v3i128:
8233 ; CHECK-GI: // %bb.0: // %entry
8234 ; CHECK-GI-NEXT: sub sp, sp, #80
8235 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8236 ; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8237 ; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8238 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 80
8239 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8240 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8241 ; CHECK-GI-NEXT: .cfi_offset w21, -24
8242 ; CHECK-GI-NEXT: .cfi_offset w22, -32
8243 ; CHECK-GI-NEXT: .cfi_offset w30, -48
8244 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8245 ; CHECK-GI-NEXT: bl __fixtfti
8246 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8247 ; CHECK-GI-NEXT: mov x19, x0
8248 ; CHECK-GI-NEXT: mov x20, x1
8249 ; CHECK-GI-NEXT: bl __fixtfti
8250 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8251 ; CHECK-GI-NEXT: mov x21, x0
8252 ; CHECK-GI-NEXT: mov x22, x1
8253 ; CHECK-GI-NEXT: bl __fixtfti
8254 ; CHECK-GI-NEXT: mov x4, x0
8255 ; CHECK-GI-NEXT: mov x5, x1
8256 ; CHECK-GI-NEXT: mov x0, x19
8257 ; CHECK-GI-NEXT: mov x1, x20
8258 ; CHECK-GI-NEXT: mov x2, x21
8259 ; CHECK-GI-NEXT: mov x3, x22
8260 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8261 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8262 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8263 ; CHECK-GI-NEXT: add sp, sp, #80
8264 ; CHECK-GI-NEXT: ret
8265 entry:
8266 %c = fptosi <3 x fp128> %a to <3 x i128>
8267 ret <3 x i128> %c
8268 }
8270 define <3 x i128> @fptou_v3f128_v3i128(<3 x fp128> %a) {
8271 ; CHECK-SD-LABEL: fptou_v3f128_v3i128:
8272 ; CHECK-SD: // %bb.0: // %entry
8273 ; CHECK-SD-NEXT: sub sp, sp, #80
8274 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8275 ; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8276 ; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8277 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 80
8278 ; CHECK-SD-NEXT: .cfi_offset w19, -8
8279 ; CHECK-SD-NEXT: .cfi_offset w20, -16
8280 ; CHECK-SD-NEXT: .cfi_offset w21, -24
8281 ; CHECK-SD-NEXT: .cfi_offset w22, -32
8282 ; CHECK-SD-NEXT: .cfi_offset w30, -48
8283 ; CHECK-SD-NEXT: stp q2, q0, [sp] // 32-byte Folded Spill
8284 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
8285 ; CHECK-SD-NEXT: bl __fixunstfti
8286 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8287 ; CHECK-SD-NEXT: mov x19, x0
8288 ; CHECK-SD-NEXT: mov x20, x1
8289 ; CHECK-SD-NEXT: bl __fixunstfti
8290 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8291 ; CHECK-SD-NEXT: mov x21, x0
8292 ; CHECK-SD-NEXT: mov x22, x1
8293 ; CHECK-SD-NEXT: bl __fixunstfti
8294 ; CHECK-SD-NEXT: fmov d0, x0
8295 ; CHECK-SD-NEXT: mov x2, x19
8296 ; CHECK-SD-NEXT: mov x3, x20
8297 ; CHECK-SD-NEXT: mov x4, x21
8298 ; CHECK-SD-NEXT: mov x5, x22
8299 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8300 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8301 ; CHECK-SD-NEXT: mov v0.d[1], x1
8302 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8303 ; CHECK-SD-NEXT: fmov x0, d0
8304 ; CHECK-SD-NEXT: add sp, sp, #80
8305 ; CHECK-SD-NEXT: ret
8306 ;
8307 ; CHECK-GI-LABEL: fptou_v3f128_v3i128:
8308 ; CHECK-GI: // %bb.0: // %entry
8309 ; CHECK-GI-NEXT: sub sp, sp, #80
8310 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8311 ; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8312 ; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8313 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 80
8314 ; CHECK-GI-NEXT: .cfi_offset w19, -8
8315 ; CHECK-GI-NEXT: .cfi_offset w20, -16
8316 ; CHECK-GI-NEXT: .cfi_offset w21, -24
8317 ; CHECK-GI-NEXT: .cfi_offset w22, -32
8318 ; CHECK-GI-NEXT: .cfi_offset w30, -48
8319 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8320 ; CHECK-GI-NEXT: bl __fixunstfti
8321 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8322 ; CHECK-GI-NEXT: mov x19, x0
8323 ; CHECK-GI-NEXT: mov x20, x1
8324 ; CHECK-GI-NEXT: bl __fixunstfti
8325 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8326 ; CHECK-GI-NEXT: mov x21, x0
8327 ; CHECK-GI-NEXT: mov x22, x1
8328 ; CHECK-GI-NEXT: bl __fixunstfti
8329 ; CHECK-GI-NEXT: mov x4, x0
8330 ; CHECK-GI-NEXT: mov x5, x1
8331 ; CHECK-GI-NEXT: mov x0, x19
8332 ; CHECK-GI-NEXT: mov x1, x20
8333 ; CHECK-GI-NEXT: mov x2, x21
8334 ; CHECK-GI-NEXT: mov x3, x22
8335 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8336 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8337 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8338 ; CHECK-GI-NEXT: add sp, sp, #80
8339 ; CHECK-GI-NEXT: ret
8340 entry:
8341 %c = fptoui <3 x fp128> %a to <3 x i128>
8342 ret <3 x i128> %c
8343 }