1 ; RUN: llc < %s -mtriple=aarch64 -aarch64-neon-syntax=apple -aarch64-enable-stp-suppress=false -verify-machineinstrs -asm-verbose=false | FileCheck %s
3 ; CHECK-LABEL: test_strd_sturd:
4 ; CHECK-NEXT: stp d0, d1, [x0, #-8]
6 define void @test_strd_sturd(ptr %ptr, <2 x float> %v1, <2 x float> %v2) #0 {
7 store <2 x float> %v2, ptr %ptr, align 16
8 %add.ptr = getelementptr inbounds float, ptr %ptr, i64 -2
9 store <2 x float> %v1, ptr %add.ptr, align 16
13 ; CHECK-LABEL: test_sturd_strd:
14 ; CHECK-NEXT: stp d0, d1, [x0, #-8]
16 define void @test_sturd_strd(ptr %ptr, <2 x float> %v1, <2 x float> %v2) #0 {
17 %add.ptr = getelementptr inbounds float, ptr %ptr, i64 -2
18 store <2 x float> %v1, ptr %add.ptr, align 16
19 store <2 x float> %v2, ptr %ptr, align 16
23 ; CHECK-LABEL: test_strq_sturq:
24 ; CHECK-NEXT: stp q0, q1, [x0, #-16]
26 define void @test_strq_sturq(ptr %ptr, <2 x double> %v1, <2 x double> %v2) #0 {
27 store <2 x double> %v2, ptr %ptr, align 16
28 %add.ptr = getelementptr inbounds double, ptr %ptr, i64 -2
29 store <2 x double> %v1, ptr %add.ptr, align 16
33 ; CHECK-LABEL: test_sturq_strq:
34 ; CHECK-NEXT: stp q0, q1, [x0, #-16]
36 define void @test_sturq_strq(ptr %ptr, <2 x double> %v1, <2 x double> %v2) #0 {
37 %add.ptr = getelementptr inbounds double, ptr %ptr, i64 -2
38 store <2 x double> %v1, ptr %add.ptr, align 16
39 store <2 x double> %v2, ptr %ptr, align 16
43 ; CHECK-LABEL: test_ldrx_ldurx:
44 ; CHECK-NEXT: ldp [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-8]
45 ; CHECK-NEXT: add x0, [[V0]], [[V1]]
47 define i64 @test_ldrx_ldurx(ptr %p) #0 {
48 %tmp = load i64, ptr %p, align 4
49 %add.ptr = getelementptr inbounds i64, ptr %p, i64 -1
50 %tmp1 = load i64, ptr %add.ptr, align 4
51 %add = add nsw i64 %tmp1, %tmp
55 ; CHECK-LABEL: test_ldurx_ldrx:
56 ; CHECK-NEXT: ldp [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-8]
57 ; CHECK-NEXT: add x0, [[V0]], [[V1]]
59 define i64 @test_ldurx_ldrx(ptr %p) #0 {
60 %add.ptr = getelementptr inbounds i64, ptr %p, i64 -1
61 %tmp1 = load i64, ptr %add.ptr, align 4
62 %tmp = load i64, ptr %p, align 4
63 %add = add nsw i64 %tmp1, %tmp
67 ; CHECK-LABEL: test_ldrsw_ldursw:
68 ; CHECK-NEXT: ldpsw [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-4]
69 ; CHECK-NEXT: add x0, [[V0]], [[V1]]
71 define i64 @test_ldrsw_ldursw(ptr %p) #0 {
72 %tmp = load i32, ptr %p, align 4
73 %add.ptr = getelementptr inbounds i32, ptr %p, i64 -1
74 %tmp1 = load i32, ptr %add.ptr, align 4
75 %sexttmp = sext i32 %tmp to i64
76 %sexttmp1 = sext i32 %tmp1 to i64
77 %add = add nsw i64 %sexttmp1, %sexttmp
81 ; Also make sure we only match valid offsets.
82 ; CHECK-LABEL: test_ldrq_ldruq_invalidoffset:
83 ; CHECK-NEXT: ldr q[[V0:[0-9]+]], [x0]
84 ; CHECK-NEXT: ldur q[[V1:[0-9]+]], [x0, #24]
85 ; CHECK-NEXT: add.2d v0, v[[V0]], v[[V1]]
87 define <2 x i64> @test_ldrq_ldruq_invalidoffset(ptr %p) #0 {
88 %tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
89 %add.ptr2 = getelementptr inbounds i64, ptr %p, i64 3
90 %tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
91 %add = add nsw <2 x i64> %tmp1, %tmp2
95 ; Pair an unscaled store with a scaled store where the scaled store has a
96 ; non-zero offset. This should not hit an assert.
97 ; CHECK-LABEL: test_stur_str_no_assert
98 ; CHECK: stp xzr, xzr, [sp, #16]
100 define void @test_stur_str_no_assert() #0 {
102 %a1 = alloca i64, align 4
103 %a2 = alloca [12 x i8], align 4
104 %C = getelementptr inbounds [12 x i8], ptr %a2, i64 0, i64 4
105 store i64 0, ptr %C, align 4
106 call void @llvm.memset.p0.i64(ptr align 8 %a1, i8 0, i64 8, i1 false)
110 declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)
113 attributes #0 = { nounwind }