1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3 ; RUN: llc -mtriple=aarch64 %s -o - -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
5 define <1 x i64> @v1i64(<1 x i64> %a) {
6 ; CHECK-SD-LABEL: v1i64:
8 ; CHECK-SD-NEXT: cmlt v0.2s, v0.2s, #0
11 ; CHECK-GI-LABEL: v1i64:
13 ; CHECK-GI-NEXT: fmov x8, d0
14 ; CHECK-GI-NEXT: lsr x8, x8, #31
15 ; CHECK-GI-NEXT: and x8, x8, #0x100000001
16 ; CHECK-GI-NEXT: lsl x9, x8, #32
17 ; CHECK-GI-NEXT: sub x8, x9, x8
18 ; CHECK-GI-NEXT: fmov d0, x8
20 %b = lshr <1 x i64> %a, <i64 31>
21 %c = and <1 x i64> %b, <i64 4294967297>
22 %d = mul nuw <1 x i64> %c, <i64 4294967295>
26 define <2 x i64> @v2i64(<2 x i64> %a) {
29 ; CHECK-NEXT: cmlt v0.4s, v0.4s, #0
31 %b = lshr <2 x i64> %a, <i64 31, i64 31>
32 %c = and <2 x i64> %b, <i64 4294967297, i64 4294967297>
33 %d = mul nuw <2 x i64> %c, <i64 4294967295, i64 4294967295>
37 define <2 x i32> @v2i32(<2 x i32> %a) {
40 ; CHECK-NEXT: cmlt v0.4h, v0.4h, #0
42 %b = lshr <2 x i32> %a, <i32 15, i32 15>
43 %c = and <2 x i32> %b, <i32 65537, i32 65537>
44 %d = mul nuw <2 x i32> %c, <i32 65535, i32 65535>
48 define <4 x i32> @v4i32(<4 x i32> %a) {
51 ; CHECK-NEXT: cmlt v0.8h, v0.8h, #0
53 %b = lshr <4 x i32> %a, <i32 15, i32 15, i32 15, i32 15>
54 %c = and <4 x i32> %b, <i32 65537, i32 65537, i32 65537, i32 65537>
55 %d = mul nuw <4 x i32> %c, <i32 65535, i32 65535, i32 65535, i32 65535>
59 define <8 x i32> @v8i32(<8 x i32> %a) {
62 ; CHECK-NEXT: cmlt v0.8h, v0.8h, #0
63 ; CHECK-NEXT: cmlt v1.8h, v1.8h, #0
65 %b = lshr <8 x i32> %a, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
66 %c = and <8 x i32> %b, <i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537>
67 %d = mul nuw <8 x i32> %c, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>
71 define <4 x i16> @v4i16(<4 x i16> %a) {
74 ; CHECK-NEXT: cmlt v0.8b, v0.8b, #0
76 %b = lshr <4 x i16> %a, <i16 7, i16 7, i16 7, i16 7>
77 %c = and <4 x i16> %b, <i16 257, i16 257, i16 257, i16 257>
78 %d = mul nuw <4 x i16> %c, <i16 255, i16 255, i16 255, i16 255>
82 define <8 x i16> @v8i16(<8 x i16> %a) {
85 ; CHECK-NEXT: cmlt v0.16b, v0.16b, #0
87 %b = lshr <8 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
88 %c = and <8 x i16> %b, <i16 257, i16 257, i16 257, i16 257, i16 257, i16 257, i16 257, i16 257>
89 %d = mul nuw <8 x i16> %c, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
93 define <8 x i8> @v8i8(<8 x i8> %a) {
96 ; CHECK-NEXT: movi v1.8b, #17
97 ; CHECK-NEXT: ushr v0.8b, v0.8b, #3
98 ; CHECK-NEXT: movi v2.8b, #15
99 ; CHECK-NEXT: and v0.8b, v0.8b, v1.8b
100 ; CHECK-NEXT: mul v0.8b, v0.8b, v2.8b
102 %b = lshr <8 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
103 %c = and <8 x i8> %b, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17>
104 %d = mul nuw <8 x i8> %c, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>
108 define <16 x i8> @v16i8(<16 x i8> %a) {
109 ; CHECK-LABEL: v16i8:
111 ; CHECK-NEXT: movi v1.16b, #17
112 ; CHECK-NEXT: ushr v0.16b, v0.16b, #3
113 ; CHECK-NEXT: movi v2.16b, #15
114 ; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
115 ; CHECK-NEXT: mul v0.16b, v0.16b, v2.16b
117 %b = lshr <16 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
118 %c = and <16 x i8> %b, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17>
119 %d = mul nuw <16 x i8> %c, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>