llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll

   1 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 < %s | FileCheck -DAUTIASP="hint #29" --check-prefixes=COMMON %s
   2 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-authenticated-lr-check-method=load                   < %s | FileCheck -DAUTIASP="hint #29" --check-prefixes=COMMON,LDR %s
   3 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-authenticated-lr-check-method=high-bits-notbi        < %s | FileCheck -DAUTIASP="hint #29" --check-prefixes=COMMON,BITS-NOTBI,BRK %s
   4 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-authenticated-lr-check-method=xpac-hint              < %s | FileCheck -DAUTIASP="hint #29" -DXPACLRI="hint #7" --check-prefixes=COMMON,XPAC,BRK %s
   5 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-authenticated-lr-check-method=xpac-hint -mattr=v8.3a < %s | FileCheck -DAUTIASP="autiasp"  -DXPACLRI="xpaclri" --check-prefixes=COMMON,XPAC,BRK %s
   6
   7 define i32 @tailcall_direct() "sign-return-address"="non-leaf" {
   8 ; COMMON-LABEL: tailcall_direct:
   9 ; COMMON:         str x30, [sp, #-16]!
  10 ; COMMON:         ldr x30, [sp], #16
  11 ;
  12 ; COMMON-NEXT:    [[AUTIASP]]
  13 ;
  14 ; LDR-NEXT:       ldr w16, [x30]
  15 ;
  16 ; BITS-NOTBI-NEXT: eor x16, x30, x30, lsl #1
  17 ; BITS-NOTBI-NEXT: tbnz x16, #62, .[[FAIL:LBB[_0-9]+]]
  18 ;
  19 ; XPAC-NEXT:      mov x16, x30
  20 ; XPAC-NEXT:      [[XPACLRI]]
  21 ; XPAC-NEXT:      cmp x16, x30
  22 ; XPAC-NEXT:      b.ne .[[FAIL:LBB[_0-9]+]]
  23 ;
  24 ; COMMON-NEXT:    b callee
  25 ; BRK-NEXT:     .[[FAIL]]:
  26 ; BRK-NEXT:       brk #0xc470
  27   tail call void asm sideeffect "", "~{lr}"()
  28   %call = tail call i32 @callee()
  29   ret i32 %call
  30 }
  31
  32 define i32 @tailcall_indirect(ptr %fptr) "sign-return-address"="non-leaf" {
  33 ; COMMON-LABEL: tailcall_indirect:
  34 ; COMMON:         str x30, [sp, #-16]!
  35 ; COMMON:         ldr x30, [sp], #16
  36 ;
  37 ; COMMON-NEXT:    [[AUTIASP]]
  38 ;
  39 ; LDR-NEXT:       ldr w16, [x30]
  40 ;
  41 ; BITS-NOTBI-NEXT: eor x16, x30, x30, lsl #1
  42 ; BITS-NOTBI-NEXT: tbnz x16, #62, .[[FAIL:LBB[_0-9]+]]
  43 ;
  44 ; XPAC-NEXT:      mov x16, x30
  45 ; XPAC-NEXT:      [[XPACLRI]]
  46 ; XPAC-NEXT:      cmp x16, x30
  47 ; XPAC-NEXT:      b.ne .[[FAIL:LBB[_0-9]+]]
  48 ;
  49 ; COMMON-NEXT:    br x0
  50 ; BRK-NEXT:     .[[FAIL]]:
  51 ; BRK-NEXT:       brk #0xc470
  52   tail call void asm sideeffect "", "~{lr}"()
  53   %call = tail call i32 %fptr()
  54   ret i32 %call
  55 }
  56
  57 define i32 @tailcall_direct_noframe() "sign-return-address"="non-leaf" {
  58 ; COMMON-LABEL: tailcall_direct_noframe:
  59 ; COMMON-NEXT:    .cfi_startproc
  60 ; COMMON-NEXT:    b callee
  61   %call = tail call i32 @callee()
  62   ret i32 %call
  63 }
  64
  65 define i32 @tailcall_indirect_noframe(ptr %fptr) "sign-return-address"="non-leaf" {
  66 ; COMMON-LABEL: tailcall_indirect_noframe:
  67 ; COMMON-NEXT:    .cfi_startproc
  68 ; COMMON-NEXT:    br x0
  69   %call = tail call i32 %fptr()
  70   ret i32 %call
  71 }
  72
  73 define i32 @tailcall_direct_noframe_sign_all() "sign-return-address"="all" {
  74 ; COMMON-LABEL: tailcall_direct_noframe_sign_all:
  75 ; COMMON-NOT:     str{{.*}}x30
  76 ; COMMON-NOT:     ldr{{.*}}x30
  77 ;
  78 ; COMMON:         [[AUTIASP]]
  79 ;
  80 ; LDR-NEXT:       ldr w16, [x30]
  81 ;
  82 ; BITS-NOTBI-NEXT: eor x16, x30, x30, lsl #1
  83 ; BITS-NOTBI-NEXT: tbnz x16, #62, .[[FAIL:LBB[_0-9]+]]
  84 ;
  85 ; XPAC-NEXT:      mov x16, x30
  86 ; XPAC-NEXT:      [[XPACLRI]]
  87 ; XPAC-NEXT:      cmp x16, x30
  88 ; XPAC-NEXT:      b.ne .[[FAIL:LBB[_0-9]+]]
  89 ;
  90 ; COMMON-NEXT:    b callee
  91 ; BRK-NEXT:     .[[FAIL]]:
  92 ; BRK-NEXT:       brk #0xc470
  93   %call = tail call i32 @callee()
  94   ret i32 %call
  95 }
  96
  97 define i32 @tailcall_indirect_noframe_sign_all(ptr %fptr) "sign-return-address"="all" {
  98 ; COMMON-LABEL: tailcall_indirect_noframe_sign_all:
  99 ; COMMON-NOT:     str{{.*}}x30
 100 ; COMMON-NOT:     ldr{{.*}}x30
 101 ;
 102 ; COMMON:         [[AUTIASP]]
 103 ;
 104 ; LDR-NEXT:       ldr w16, [x30]
 105 ;
 106 ; BITS-NOTBI-NEXT: eor x16, x30, x30, lsl #1
 107 ; BITS-NOTBI-NEXT: tbnz x16, #62, .[[FAIL:LBB[_0-9]+]]
 108 ;
 109 ; XPAC-NEXT:      mov x16, x30
 110 ; XPAC-NEXT:      [[XPACLRI]]
 111 ; XPAC-NEXT:      cmp x16, x30
 112 ; XPAC-NEXT:      b.ne .[[FAIL:LBB[_0-9]+]]
 113 ;
 114 ; COMMON-NEXT:    br x0
 115 ; BRK-NEXT:     .[[FAIL]]:
 116 ; BRK-NEXT:       brk #0xc470
 117   %call = tail call i32 %fptr()
 118   ret i32 %call
 119 }
 120
 121 define i32 @tailcall_ib_key() "sign-return-address"="all" "sign-return-address-key"="b_key" {
 122 ; COMMON-LABEL: tailcall_ib_key:
 123 ;
 124 ; COMMON:         b callee
 125 ; BRK-NEXT:     .{{LBB.*}}:
 126 ; BRK-NEXT:       brk #0xc471
 127   tail call void asm sideeffect "", "~{lr}"()
 128   %call = tail call i32 @callee()
 129   ret i32 %call
 130 }
 131
 132 define i32 @tailcall_two_branches(i1 %0) "sign-return-address"="all" {
 133 ; COMMON-LABEL:    tailcall_two_branches:
 134 ; COMMON:            tbz w0, #0, .[[ELSE:LBB[_0-9]+]]
 135 ; COMMON:            str x30, [sp, #-16]!
 136 ; COMMON:            bl callee2
 137 ; COMMON:            ldr x30, [sp], #16
 138 ; COMMON-NEXT:       [[AUTIASP]]
 139 ; COMMON-NEXT:     .[[ELSE]]:
 140
 141 ; LDR-NEXT:          ldr w16, [x30]
 142 ;
 143 ; BITS-NOTBI-NEXT:   eor x16, x30, x30, lsl #1
 144 ; BITS-NOTBI-NEXT:   tbnz x16, #62, .[[FAIL:LBB[_0-9]+]]
 145 ;
 146 ; XPAC-NEXT:         mov x16, x30
 147 ; XPAC-NEXT:         [[XPACLRI]]
 148 ; XPAC-NEXT:         cmp x16, x30
 149 ; XPAC-NEXT:         b.ne .[[FAIL:LBB[_0-9]+]]
 150 ;
 151 ; COMMON-NEXT:       b callee
 152 ; BRK-NEXT:        .[[FAIL]]:
 153 ; BRK-NEXT:          brk #0xc470
 154   br i1 %0, label %2, label %3
 155 2:
 156   call void @callee2()
 157   br label %3
 158 3:
 159   %call = tail call i32 @callee()
 160   ret i32 %call
 161 }
 162
 163 declare i32 @callee()
 164 declare void @callee2()