1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
5 name: shufflevector_scalar_src
6 tracksRegLiveness: true
10 liveins: $vgpr0, $vgpr1
12 ; CHECK-LABEL: name: shufflevector_scalar_src
13 ; CHECK: liveins: $vgpr0, $vgpr1
15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
16 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
17 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
18 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
19 %0:_(s32) = COPY $vgpr0
20 %1:_(s32) = COPY $vgpr1
21 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1)
22 $vgpr0_vgpr1 = COPY %2
27 name: shufflevector_scalar_src_dst
28 tracksRegLiveness: true
32 liveins: $vgpr0, $vgpr1
34 ; CHECK-LABEL: name: shufflevector_scalar_src_dst
35 ; CHECK: liveins: $vgpr0, $vgpr1
37 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
38 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
39 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
40 ; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
41 %0:_(s32) = COPY $vgpr0
42 %1:_(s32) = COPY $vgpr1
43 %2:_(s32) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1)
49 name: shufflevector_scalar_dst
50 tracksRegLiveness: true
54 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
56 ; CHECK-LABEL: name: shufflevector_scalar_dst
57 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
59 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
60 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
61 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
62 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
63 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
64 ; CHECK-NEXT: $vgpr0 = COPY [[COPY3]](s32)
65 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
66 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
67 %2:_(s32) = G_SHUFFLE_VECTOR %0, %1, shufflemask(2)
73 name: shufflevector_v2s32_0_1
74 tracksRegLiveness: true
78 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
80 ; CHECK-LABEL: name: shufflevector_v2s32_0_1
81 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
83 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
84 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
85 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
86 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
87 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
88 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV3]](s32)
89 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
90 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
91 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
92 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
93 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1)
94 $vgpr0_vgpr1 = COPY %2
99 name: shufflevector_v2s32_1_0
100 tracksRegLiveness: true
104 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
106 ; CHECK-LABEL: name: shufflevector_v2s32_1_0
107 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
109 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
110 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
111 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
112 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
113 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
114 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV2]](s32)
115 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
116 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
117 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
118 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
119 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0)
120 $vgpr0_vgpr1 = COPY %2
125 name: shufflevector_v2s32_0_0
126 tracksRegLiveness: true
130 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
132 ; CHECK-LABEL: name: shufflevector_v2s32_0_0
133 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
135 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
136 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
137 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
138 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
139 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
140 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV2]](s32)
141 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
142 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
143 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
144 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
145 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 0)
146 $vgpr0_vgpr1 = COPY %2
151 name: shufflevector_v2s32_undef_undef
152 tracksRegLiveness: true
156 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
158 ; CHECK-LABEL: name: shufflevector_v2s32_undef_undef
159 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
161 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
162 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
163 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
164 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)
165 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
166 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
167 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
168 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, undef)
169 $vgpr0_vgpr1 = COPY %2
174 name: shufflevector_v2s32_undef_0
175 tracksRegLiveness: true
179 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
181 ; CHECK-LABEL: name: shufflevector_v2s32_undef_0
182 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
184 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
185 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
186 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
187 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
188 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
189 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[COPY2]](s32)
190 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
191 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
192 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
193 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, 0)
194 $vgpr0_vgpr1 = COPY %2
199 name: shufflevector_v2s32_0_undef
200 tracksRegLiveness: true
204 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
206 ; CHECK-LABEL: name: shufflevector_v2s32_0_undef
207 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
209 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
210 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
211 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
212 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
213 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
214 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, undef)
215 $vgpr0_vgpr1 = COPY %2
220 name: shufflevector_v3s32_3_2_1
221 tracksRegLiveness: true
225 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5
227 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1
228 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5
230 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
231 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5
232 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)
233 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
234 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
235 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV5]](s32)
236 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
237 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[UV7]](s32)
238 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32)
239 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
240 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
241 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5
242 %2:_(<3 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(3, 2, 1)
243 $vgpr0_vgpr1_vgpr2 = COPY %2
248 name: shufflevector_v3s32_3_2_1_smaller
249 tracksRegLiveness: true
253 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5
255 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1_smaller
256 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5
258 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
259 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5
260 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
261 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV2]](s32)
262 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
263 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV4]](s32)
264 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
265 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
266 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
267 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5
268 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(2, 1)
269 $vgpr0_vgpr1 = COPY %2
274 name: shufflevector_v2s16_0_1
275 tracksRegLiveness: true
279 liveins: $vgpr0, $vgpr1
281 ; CHECK-LABEL: name: shufflevector_v2s16_0_1
282 ; CHECK: liveins: $vgpr0, $vgpr1
284 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
285 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
286 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
287 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
288 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
289 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
290 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
291 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32)
292 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
293 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C2]]
294 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C1]](s32)
295 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
296 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
297 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>)
298 %0:_(<2 x s16>) = COPY $vgpr0
299 %1:_(<2 x s16>) = COPY $vgpr1
300 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1)
306 name: shufflevector_v2s16_1_0
307 tracksRegLiveness: true
311 liveins: $vgpr0, $vgpr1
313 ; CHECK-LABEL: name: shufflevector_v2s16_1_0
314 ; CHECK: liveins: $vgpr0, $vgpr1
316 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
317 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
318 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
319 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
320 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
321 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)
322 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
323 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
324 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
325 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C2]]
326 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
327 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
328 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
329 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>)
330 %0:_(<2 x s16>) = COPY $vgpr0
331 %1:_(<2 x s16>) = COPY $vgpr1
332 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0)
338 name: shufflevector_v3s16_2_0
339 tracksRegLiveness: true
343 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
345 ; CHECK-LABEL: name: shufflevector_v3s16_2_0
346 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
348 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
349 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
350 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
351 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
352 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
353 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
354 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
355 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)
356 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>)
357 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
358 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]]
359 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)
360 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
361 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
362 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]
363 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
364 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C]](s32)
365 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL1]]
366 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
367 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)
368 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
369 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1
370 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3
371 %2:_(<3 x s16>) = G_EXTRACT %0, 0
372 %3:_(<3 x s16>) = G_EXTRACT %1, 0
373 %4:_(<4 x s16>) = G_SHUFFLE_VECTOR %2, %3, shufflemask(5, 1, 3, 0)
374 $vgpr0_vgpr1 = COPY %4