llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
   3 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
   4
   5 ---
   6 name: ps_live
   7 legalized: true
   8
   9 body: |
  10   bb.0:
  11     ; CHECK-LABEL: name: ps_live
  12     ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.ps.live)
  13     ; CHECK-NEXT: S_ENDPGM 0, implicit [[INT]](s1)
  14     %0:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.ps.live)
  15     S_ENDPGM 0, implicit %0
  16 ...
  17