llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
   3 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
   4
   5 ---
   6 name: ffbl_b32_s
   7 legalized: true
   8
   9 body: |
  10   bb.0:
  11     liveins: $sgpr0
  12
  13     ; CHECK-LABEL: name: ffbl_b32_s
  14     ; CHECK: liveins: $sgpr0
  15     ; CHECK-NEXT: {{  $}}
  16     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
  17     ; CHECK-NEXT: [[AMDGPU_FFBL_B32_:%[0-9]+]]:sgpr(s32) = G_AMDGPU_FFBL_B32 [[COPY]](s32)
  18     %0:_(s32) = COPY $sgpr0
  19     %1:_(s32) = G_AMDGPU_FFBL_B32 %0
  20 ...
  21
  22 ---
  23 name: ffbl_b32_v
  24 legalized: true
  25
  26 body: |
  27   bb.0:
  28     liveins: $vgpr0_vgpr1
  29     ; CHECK-LABEL: name: ffbl_b32_v
  30     ; CHECK: liveins: $vgpr0_vgpr1
  31     ; CHECK-NEXT: {{  $}}
  32     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
  33     ; CHECK-NEXT: [[AMDGPU_FFBL_B32_:%[0-9]+]]:vgpr(s32) = G_AMDGPU_FFBL_B32 [[COPY]](s32)
  34     %0:_(s32) = COPY $vgpr0
  35     %1:_(s32) = G_AMDGPU_FFBL_B32 %0
  36 ...