Bump version to 19.1.0-rc3
[llvm-project.git] / llvm / test / CodeGen / AMDGPU / GlobalISel / regbankselect-block-addr.mir
blob4efd1413ee7b0f12cfc132da910aa9d0b80cc5f2
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -o - | FileCheck %s
4 --- |
6   @addr = global ptr null
8   define void @test_blockaddress() {
9     store ptr blockaddress(@test_blockaddress, %block), ptr @addr
10     indirectbr ptr blockaddress(@test_blockaddress, %block), [label %block]
12   block:                                            ; preds = %0
13     ret void
14   }
16 ...
17 ---
18 name:            test_blockaddress
19 alignment:       16
20 legalized: true
21 body:             |
22   bb.1 (%ir-block.0):
23     ; CHECK-LABEL: name: test_blockaddress
24     ; CHECK: [[BLOCK_ADDR:%[0-9]+]]:sgpr(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
25     ; CHECK-NEXT: S_ENDPGM 0, implicit [[BLOCK_ADDR]](p0)
26     %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
27     S_ENDPGM 0, implicit %0
29 ...