1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
6 name: sext_inreg_s_s32_1
13 ; CHECK-LABEL: name: sext_inreg_s_s32_1
14 ; CHECK: liveins: $sgpr0
16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
17 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s32) = G_SEXT_INREG [[COPY]], 1
18 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)
19 %0:_(s32) = COPY $sgpr0
20 %1:_(s32) = G_SEXT_INREG %0, 1
21 S_ENDPGM 0, implicit %1
26 name: sext_inreg_s_s64_1
33 ; CHECK-LABEL: name: sext_inreg_s_s64_1
34 ; CHECK: liveins: $sgpr0_sgpr1
36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
37 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 1
38 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)
39 %0:_(s64) = COPY $sgpr0_sgpr1
40 %1:_(s64) = G_SEXT_INREG %0, 1
41 S_ENDPGM 0, implicit %1
46 name: sext_inreg_s_s64_31
53 ; CHECK-LABEL: name: sext_inreg_s_s64_31
54 ; CHECK: liveins: $sgpr0_sgpr1
56 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
57 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 31
58 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)
59 %0:_(s64) = COPY $sgpr0_sgpr1
60 %1:_(s64) = G_SEXT_INREG %0, 31
61 S_ENDPGM 0, implicit %1
66 name: sext_inreg_s_s64_32
73 ; CHECK-LABEL: name: sext_inreg_s_s64_32
74 ; CHECK: liveins: $sgpr0_sgpr1
76 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
77 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 32
78 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)
79 %0:_(s64) = COPY $sgpr0_sgpr1
80 %1:_(s64) = G_SEXT_INREG %0, 32
81 S_ENDPGM 0, implicit %1
86 name: sext_inreg_s_s64_33
93 ; CHECK-LABEL: name: sext_inreg_s_s64_33
94 ; CHECK: liveins: $sgpr0_sgpr1
96 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
97 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:sgpr(s64) = G_SEXT_INREG [[COPY]], 32
98 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s64)
99 %0:_(s64) = COPY $sgpr0_sgpr1
100 %1:_(s64) = G_SEXT_INREG %0, 32
101 S_ENDPGM 0, implicit %1
106 name: sext_inreg_v_s32_1
113 ; CHECK-LABEL: name: sext_inreg_v_s32_1
114 ; CHECK: liveins: $vgpr0
116 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
117 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[COPY]], 1
118 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)
119 %0:_(s32) = COPY $vgpr0
120 %1:_(s32) = G_SEXT_INREG %0, 1
121 S_ENDPGM 0, implicit %1
126 name: sext_inreg_v_s64_1
131 liveins: $vgpr0_vgpr1
133 ; CHECK-LABEL: name: sext_inreg_v_s64_1
134 ; CHECK: liveins: $vgpr0_vgpr1
136 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
137 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
138 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]
139 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[FREEZE]], 1
140 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 31
141 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[SEXT_INREG]], [[C]](s32)
142 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SEXT_INREG]](s32), [[ASHR]](s32)
143 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
144 %0:_(s64) = COPY $vgpr0_vgpr1
145 %1:_(s64) = G_SEXT_INREG %0, 1
146 S_ENDPGM 0, implicit %1
151 name: sext_inreg_v_s64_31
156 liveins: $vgpr0_vgpr1
158 ; CHECK-LABEL: name: sext_inreg_v_s64_31
159 ; CHECK: liveins: $vgpr0_vgpr1
161 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
162 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
163 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]
164 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[FREEZE]], 31
165 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 31
166 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[SEXT_INREG]], [[C]](s32)
167 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[SEXT_INREG]](s32), [[ASHR]](s32)
168 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
169 %0:_(s64) = COPY $vgpr0_vgpr1
170 %1:_(s64) = G_SEXT_INREG %0, 31
171 S_ENDPGM 0, implicit %1
176 name: sext_inreg_v_s64_32
181 liveins: $vgpr0_vgpr1
183 ; CHECK-LABEL: name: sext_inreg_v_s64_32
184 ; CHECK: liveins: $vgpr0_vgpr1
186 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
187 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
188 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:vgpr(s32) = G_FREEZE [[UV]]
189 ; CHECK-NEXT: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 31
190 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:vgpr(s32) = G_ASHR [[FREEZE]], [[C]](s32)
191 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[FREEZE]](s32), [[ASHR]](s32)
192 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
193 %0:_(s64) = COPY $vgpr0_vgpr1
194 %1:_(s64) = G_SEXT_INREG %0, 32
195 S_ENDPGM 0, implicit %1
200 name: sext_inreg_v_s64_33
205 liveins: $vgpr0_vgpr1
207 ; CHECK-LABEL: name: sext_inreg_v_s64_33
208 ; CHECK: liveins: $vgpr0_vgpr1
210 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
211 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
212 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[UV]](s32)
213 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[COPY1]], 1
214 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY1]](s32), [[SEXT_INREG]](s32)
215 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
216 %0:_(s64) = COPY $vgpr0_vgpr1
217 %1:_(s64) = G_SEXT_INREG %0, 33
218 S_ENDPGM 0, implicit %1
223 name: sext_inreg_v_s64_35
228 liveins: $vgpr0_vgpr1
230 ; CHECK-LABEL: name: sext_inreg_v_s64_35
231 ; CHECK: liveins: $vgpr0_vgpr1
233 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
234 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
235 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[UV]](s32)
236 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[COPY1]], 3
237 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY1]](s32), [[SEXT_INREG]](s32)
238 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
239 %0:_(s64) = COPY $vgpr0_vgpr1
240 %1:_(s64) = G_SEXT_INREG %0, 35
241 S_ENDPGM 0, implicit %1
246 name: sext_inreg_v_s64_63
251 liveins: $vgpr0_vgpr1
253 ; CHECK-LABEL: name: sext_inreg_v_s64_63
254 ; CHECK: liveins: $vgpr0_vgpr1
256 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
257 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
258 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[UV]](s32)
259 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:vgpr(s32) = G_SEXT_INREG [[COPY1]], 31
260 ; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY1]](s32), [[SEXT_INREG]](s32)
261 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
262 %0:_(s64) = COPY $vgpr0_vgpr1
263 %1:_(s64) = G_SEXT_INREG %0, 63
264 S_ENDPGM 0, implicit %1