1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn -mcpu=hawaii -mattr=+flat-for-global -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - | FileCheck %s
5 define amdgpu_kernel void @load_constant(ptr addrspace(4) %ptr0) {
9 define amdgpu_kernel void @load_constant_volatile(ptr addrspace(4) %ptr0) {
13 define amdgpu_kernel void @load_global_uniform_invariant(ptr addrspace(1) %ptr1) {
14 %tmp0 = load i32, ptr addrspace(1) %ptr1
18 define amdgpu_kernel void @load_global_uniform_noclobber(ptr addrspace(1) %ptr1) {
19 %tmp0 = load i32, ptr addrspace(1) %ptr1, !amdgpu.noclobber !0
23 define amdgpu_kernel void @load_global_uniform_variant(ptr addrspace(1) %ptr1) {
24 %tmp0 = load i32, ptr addrspace(1) %ptr1
28 define amdgpu_kernel void @load_global_uniform_volatile_invariant(ptr addrspace(1) %ptr1) {
29 %tmp0 = load i32, ptr addrspace(1) %ptr1
33 define amdgpu_kernel void @load_global_uniform_atomic_invariant(ptr addrspace(1) %ptr1) {
34 %tmp0 = load i32, ptr addrspace(1) %ptr1
38 define amdgpu_kernel void @load_global_non_uniform(ptr addrspace(1) %ptr2) {
39 %tmp0 = call i32 @llvm.amdgcn.workitem.id.x() #0
40 %tmp1 = getelementptr i32, ptr addrspace(1) %ptr2, i32 %tmp0
41 %tmp2 = load i32, ptr addrspace(1) %tmp1
45 define void @non_power_of_2() { ret void }
47 define amdgpu_kernel void @load_constant_v4i16_from_8_align8(ptr addrspace(4) %ptr0) {
51 declare i32 @llvm.amdgcn.workitem.id.x() #0
52 attributes #0 = { nounwind readnone }
63 ; CHECK-LABEL: name: load_constant
64 ; CHECK: liveins: $sgpr0_sgpr1
66 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
67 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p4) :: (load (s32) from %ir.ptr0, addrspace 4)
68 %0:_(p4) = COPY $sgpr0_sgpr1
69 %1:_(s32) = G_LOAD %0 :: (load (s32) from %ir.ptr0)
73 name: load_constant_volatile
79 ; CHECK-LABEL: name: load_constant_volatile
80 ; CHECK: liveins: $sgpr0_sgpr1
82 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
83 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p4) :: (volatile load (s32) from %ir.ptr0, addrspace 4)
84 %0:_(p4) = COPY $sgpr0_sgpr1
85 %1:_(s32) = G_LOAD %0 :: (volatile load (s32) from %ir.ptr0)
89 name: load_global_uniform_invariant
95 ; CHECK-LABEL: name: load_global_uniform_invariant
96 ; CHECK: liveins: $sgpr0_sgpr1
98 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
99 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p1) :: (invariant load (s32) from %ir.ptr1, addrspace 1)
100 %0:_(p1) = COPY $sgpr0_sgpr1
101 %1:_(s32) = G_LOAD %0 :: (invariant load (s32) from %ir.ptr1)
105 name: load_global_uniform_noclobber
110 liveins: $sgpr0_sgpr1
111 ; CHECK-LABEL: name: load_global_uniform_noclobber
112 ; CHECK: liveins: $sgpr0_sgpr1
114 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
115 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
116 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load (s32) from %ir.ptr1, addrspace 1)
117 %0:_(p1) = COPY $sgpr0_sgpr1
118 %1:_(s32) = G_LOAD %0 :: (load (s32) from %ir.ptr1)
122 name: load_global_uniform_variant
127 liveins: $sgpr0_sgpr1
128 ; CHECK-LABEL: name: load_global_uniform_variant
129 ; CHECK: liveins: $sgpr0_sgpr1
131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
132 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
133 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load (s32) from %ir.ptr1, addrspace 1)
134 %0:_(p1) = COPY $sgpr0_sgpr1
135 %1:_(s32) = G_LOAD %0 :: (load (s32) from %ir.ptr1)
139 name: load_global_uniform_volatile_invariant
144 liveins: $sgpr0_sgpr1
145 ; CHECK-LABEL: name: load_global_uniform_volatile_invariant
146 ; CHECK: liveins: $sgpr0_sgpr1
148 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
149 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
150 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (volatile invariant load (s32) from %ir.ptr1, addrspace 1)
151 %0:_(p1) = COPY $sgpr0_sgpr1
152 %1:_(s32) = G_LOAD %0 :: (volatile invariant load (s32) from %ir.ptr1)
156 name: load_global_uniform_atomic_invariant
161 liveins: $sgpr0_sgpr1
162 ; CHECK-LABEL: name: load_global_uniform_atomic_invariant
163 ; CHECK: liveins: $sgpr0_sgpr1
165 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
166 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
167 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (invariant load acquire (s32) from %ir.ptr1, addrspace 1)
168 %0:_(p1) = COPY $sgpr0_sgpr1
169 %1:_(s32) = G_LOAD %0 :: (invariant load acquire (s32) from %ir.ptr1)
173 name: load_global_non_uniform
178 liveins: $sgpr0_sgpr1
179 ; CHECK-LABEL: name: load_global_non_uniform
180 ; CHECK: liveins: $sgpr0_sgpr1
182 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
183 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
184 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load (s32) from %ir.tmp1, addrspace 1)
185 %0:_(p1) = COPY $sgpr0_sgpr1
186 %1:_(s32) = G_LOAD %0 :: (load (s32) from %ir.tmp1)
195 ; CHECK-LABEL: name: non_power_of_2
196 ; CHECK: [[DEF:%[0-9]+]]:sgpr(s448) = G_IMPLICIT_DEF
197 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[DEF]](s448), 0
198 ; CHECK-NEXT: $sgpr0 = COPY [[EXTRACT]](s32)
199 ; CHECK-NEXT: SI_RETURN_TO_EPILOG $sgpr0
200 %0:_(s448) = G_IMPLICIT_DEF
201 %1:_(s32) = G_EXTRACT %0:_(s448), 0
202 $sgpr0 = COPY %1:_(s32)
203 SI_RETURN_TO_EPILOG $sgpr0
207 name: load_constant_v4i16_from_8_align8
212 ; CHECK-LABEL: name: load_constant_v4i16_from_8_align8
213 ; CHECK: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
214 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:sgpr(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load (<4 x s16>) from %ir.ptr0, addrspace 4)
215 %0:_(p4) = COPY $sgpr0_sgpr1
216 %1:_(<4 x s16>) = G_LOAD %0 :: (load (<4 x s16>) from %ir.ptr0, align 8, addrspace 4)