| blob | 3e6de324924579199b9bd19f06dbf2d24ddf2633 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2 ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,SDAG %s
3 ; RUN: not --crash llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s 2>&1 | FileCheck -check-prefix=GISEL %s
5 ; FIXME: GISEL can't handle the "fptrunc float to bfloat" that expand-large-fp-convert emits.
7 ; GISEL: unable to translate instruction: fptrunc
9 define bfloat @sitofp_i128_to_bf16(i128 %x) {
10 ; GCN-LABEL: sitofp_i128_to_bf16:
11 ; GCN: ; %bb.0: ; %itofp-entry
12 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13 ; GCN-NEXT: v_or_b32_e32 v5, v1, v3
14 ; GCN-NEXT: v_or_b32_e32 v4, v0, v2
15 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
16 ; GCN-NEXT: v_mov_b32_e32 v4, 0
17 ; GCN-NEXT: s_and_saveexec_b64 s[6:7], vcc
18 ; GCN-NEXT: s_cbranch_execz .LBB0_14
19 ; GCN-NEXT: ; %bb.1: ; %itofp-if-end
20 ; GCN-NEXT: v_sub_co_u32_e32 v4, vcc, 0, v0
21 ; GCN-NEXT: v_subb_co_u32_e32 v5, vcc, 0, v1, vcc
22 ; GCN-NEXT: v_subb_co_u32_e32 v6, vcc, 0, v2, vcc
23 ; GCN-NEXT: v_subb_co_u32_e32 v7, vcc, 0, v3, vcc
24 ; GCN-NEXT: v_cmp_gt_i64_e32 vcc, 0, v[2:3]
25 ; GCN-NEXT: ; implicit-def: $vgpr8
26 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
27 ; GCN-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
28 ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
29 ; GCN-NEXT: v_cndmask_b32_e32 v5, v3, v7, vcc
30 ; GCN-NEXT: v_ffbh_u32_e32 v2, v4
31 ; GCN-NEXT: v_add_u32_e32 v2, 32, v2
32 ; GCN-NEXT: v_ffbh_u32_e32 v6, v5
33 ; GCN-NEXT: v_min_u32_e32 v2, v2, v6
34 ; GCN-NEXT: v_ffbh_u32_e32 v6, v0
35 ; GCN-NEXT: v_add_u32_e32 v6, 32, v6
36 ; GCN-NEXT: v_ffbh_u32_e32 v7, v1
37 ; GCN-NEXT: v_min_u32_e32 v6, v6, v7
38 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
39 ; GCN-NEXT: v_add_u32_e32 v6, 64, v6
40 ; GCN-NEXT: v_cndmask_b32_e32 v7, v6, v2, vcc
41 ; GCN-NEXT: v_sub_u32_e32 v6, 0x80, v7
42 ; GCN-NEXT: v_sub_u32_e32 v2, 0x7f, v7
43 ; GCN-NEXT: v_cmp_gt_i32_e32 vcc, 25, v6
44 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
45 ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
46 ; GCN-NEXT: ; %bb.2: ; %itofp-if-else
47 ; GCN-NEXT: v_add_u32_e32 v4, 0xffffff98, v7
48 ; GCN-NEXT: v_lshlrev_b64 v[0:1], v4, v[0:1]
49 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v4
50 ; GCN-NEXT: v_cndmask_b32_e32 v8, 0, v0, vcc
51 ; GCN-NEXT: ; implicit-def: $vgpr6
52 ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1
53 ; GCN-NEXT: ; implicit-def: $vgpr7
54 ; GCN-NEXT: ; implicit-def: $vgpr4_vgpr5
55 ; GCN-NEXT: ; %bb.3: ; %Flow3
56 ; GCN-NEXT: s_andn2_saveexec_b64 s[8:9], s[4:5]
57 ; GCN-NEXT: s_cbranch_execz .LBB0_13
58 ; GCN-NEXT: ; %bb.4: ; %NodeBlock
59 ; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 25, v6
60 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
61 ; GCN-NEXT: s_xor_b64 s[10:11], exec, s[4:5]
62 ; GCN-NEXT: s_cbranch_execz .LBB0_8
63 ; GCN-NEXT: ; %bb.5: ; %LeafBlock
64 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 26, v6
65 ; GCN-NEXT: s_and_saveexec_b64 s[12:13], vcc
66 ; GCN-NEXT: s_cbranch_execz .LBB0_7
67 ; GCN-NEXT: ; %bb.6: ; %itofp-sw-default
68 ; GCN-NEXT: v_sub_u32_e32 v12, 0x66, v7
69 ; GCN-NEXT: v_sub_u32_e32 v10, 64, v12
70 ; GCN-NEXT: v_lshrrev_b64 v[8:9], v12, v[0:1]
71 ; GCN-NEXT: v_lshlrev_b64 v[10:11], v10, v[4:5]
72 ; GCN-NEXT: v_sub_u32_e32 v13, 38, v7
73 ; GCN-NEXT: v_or_b32_e32 v11, v9, v11
74 ; GCN-NEXT: v_or_b32_e32 v10, v8, v10
75 ; GCN-NEXT: v_lshrrev_b64 v[8:9], v13, v[4:5]
76 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v12
77 ; GCN-NEXT: v_add_u32_e32 v14, 26, v7
78 ; GCN-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc
79 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v12
80 ; GCN-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc
81 ; GCN-NEXT: v_lshrrev_b64 v[10:11], v13, v[0:1]
82 ; GCN-NEXT: v_lshlrev_b64 v[12:13], v14, v[4:5]
83 ; GCN-NEXT: v_subrev_u32_e32 v7, 38, v7
84 ; GCN-NEXT: v_cndmask_b32_e64 v15, v8, v0, s[4:5]
85 ; GCN-NEXT: v_lshlrev_b64 v[7:8], v7, v[0:1]
86 ; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v1, s[4:5]
87 ; GCN-NEXT: v_or_b32_e32 v11, v13, v11
88 ; GCN-NEXT: v_or_b32_e32 v10, v12, v10
89 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14
90 ; GCN-NEXT: v_lshlrev_b64 v[0:1], v14, v[0:1]
91 ; GCN-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc
92 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14
93 ; GCN-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc
94 ; GCN-NEXT: v_cndmask_b32_e64 v5, v8, v5, s[4:5]
95 ; GCN-NEXT: v_cndmask_b32_e64 v4, v7, v4, s[4:5]
96 ; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
97 ; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
98 ; GCN-NEXT: v_or_b32_e32 v1, v1, v5
99 ; GCN-NEXT: v_or_b32_e32 v0, v0, v4
100 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
101 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
102 ; GCN-NEXT: v_or_b32_e32 v8, v15, v0
103 ; GCN-NEXT: v_mov_b32_e32 v0, v8
104 ; GCN-NEXT: v_mov_b32_e32 v1, v9
105 ; GCN-NEXT: .LBB0_7: ; %Flow1
106 ; GCN-NEXT: s_or_b64 exec, exec, s[12:13]
107 ; GCN-NEXT: .LBB0_8: ; %Flow2
108 ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11]
109 ; GCN-NEXT: ; %bb.9: ; %itofp-sw-bb
110 ; GCN-NEXT: v_lshlrev_b64 v[0:1], 1, v[0:1]
111 ; GCN-NEXT: ; %bb.10: ; %itofp-sw-epilog
112 ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
113 ; GCN-NEXT: v_lshrrev_b32_e32 v4, 2, v0
114 ; GCN-NEXT: v_and_or_b32 v0, v4, 1, v0
115 ; GCN-NEXT: v_add_co_u32_e32 v0, vcc, 1, v0
116 ; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
117 ; GCN-NEXT: v_and_b32_e32 v4, 0x4000000, v0
118 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
119 ; GCN-NEXT: v_alignbit_b32 v8, v1, v0, 2
120 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
121 ; GCN-NEXT: ; %bb.11: ; %itofp-if-then20
122 ; GCN-NEXT: v_alignbit_b32 v8, v1, v0, 3
123 ; GCN-NEXT: v_mov_b32_e32 v2, v6
124 ; GCN-NEXT: ; %bb.12: ; %Flow
125 ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
126 ; GCN-NEXT: .LBB0_13: ; %Flow4
127 ; GCN-NEXT: s_or_b64 exec, exec, s[8:9]
128 ; GCN-NEXT: v_and_b32_e32 v0, 0x80000000, v3
129 ; GCN-NEXT: v_lshl_add_u32 v1, v2, 23, 1.0
130 ; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v8
131 ; GCN-NEXT: v_or3_b32 v0, v2, v0, v1
132 ; GCN-NEXT: v_bfe_u32 v1, v8, 16, 1
133 ; GCN-NEXT: s_movk_i32 s4, 0x7fff
134 ; GCN-NEXT: v_add3_u32 v1, v1, v0, s4
135 ; GCN-NEXT: v_or_b32_e32 v2, 0x400000, v0
136 ; GCN-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
137 ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
138 ; GCN-NEXT: v_lshrrev_b32_e32 v4, 16, v0
139 ; GCN-NEXT: .LBB0_14: ; %Flow5
140 ; GCN-NEXT: s_or_b64 exec, exec, s[6:7]
141 ; GCN-NEXT: v_mov_b32_e32 v0, v4
142 ; GCN-NEXT: s_setpc_b64 s[30:31]
143 %cvt = sitofp i128 %x to bfloat
144 ret bfloat %cvt
145 }
147 define bfloat @uitofp_i128_to_bf16(i128 %x) {
148 ; GCN-LABEL: uitofp_i128_to_bf16:
149 ; GCN: ; %bb.0: ; %itofp-entry
150 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
151 ; GCN-NEXT: v_or_b32_e32 v5, v1, v3
152 ; GCN-NEXT: v_or_b32_e32 v4, v0, v2
153 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
154 ; GCN-NEXT: v_mov_b32_e32 v4, 0
155 ; GCN-NEXT: s_and_saveexec_b64 s[6:7], vcc
156 ; GCN-NEXT: s_cbranch_execz .LBB1_14
157 ; GCN-NEXT: ; %bb.1: ; %itofp-if-end
158 ; GCN-NEXT: v_ffbh_u32_e32 v4, v2
159 ; GCN-NEXT: v_add_u32_e32 v4, 32, v4
160 ; GCN-NEXT: v_ffbh_u32_e32 v5, v3
161 ; GCN-NEXT: v_min_u32_e32 v4, v4, v5
162 ; GCN-NEXT: v_ffbh_u32_e32 v5, v0
163 ; GCN-NEXT: v_add_u32_e32 v5, 32, v5
164 ; GCN-NEXT: v_ffbh_u32_e32 v6, v1
165 ; GCN-NEXT: v_min_u32_e32 v5, v5, v6
166 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3]
167 ; GCN-NEXT: v_add_u32_e32 v5, 64, v5
168 ; GCN-NEXT: v_cndmask_b32_e32 v6, v5, v4, vcc
169 ; GCN-NEXT: v_sub_u32_e32 v5, 0x80, v6
170 ; GCN-NEXT: v_sub_u32_e32 v4, 0x7f, v6
171 ; GCN-NEXT: v_cmp_gt_i32_e32 vcc, 25, v5
172 ; GCN-NEXT: ; implicit-def: $vgpr7
173 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
174 ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
175 ; GCN-NEXT: ; %bb.2: ; %itofp-if-else
176 ; GCN-NEXT: v_add_u32_e32 v2, 0xffffff98, v6
177 ; GCN-NEXT: v_lshlrev_b64 v[0:1], v2, v[0:1]
178 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2
179 ; GCN-NEXT: v_cndmask_b32_e32 v7, 0, v0, vcc
180 ; GCN-NEXT: ; implicit-def: $vgpr5
181 ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1
182 ; GCN-NEXT: ; implicit-def: $vgpr6
183 ; GCN-NEXT: ; implicit-def: $vgpr2_vgpr3
184 ; GCN-NEXT: ; %bb.3: ; %Flow3
185 ; GCN-NEXT: s_andn2_saveexec_b64 s[8:9], s[4:5]
186 ; GCN-NEXT: s_cbranch_execz .LBB1_13
187 ; GCN-NEXT: ; %bb.4: ; %NodeBlock
188 ; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 25, v5
189 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
190 ; GCN-NEXT: s_xor_b64 s[10:11], exec, s[4:5]
191 ; GCN-NEXT: s_cbranch_execz .LBB1_8
192 ; GCN-NEXT: ; %bb.5: ; %LeafBlock
193 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 26, v5
194 ; GCN-NEXT: s_and_saveexec_b64 s[12:13], vcc
195 ; GCN-NEXT: s_cbranch_execz .LBB1_7
196 ; GCN-NEXT: ; %bb.6: ; %itofp-sw-default
197 ; GCN-NEXT: v_sub_u32_e32 v11, 0x66, v6
198 ; GCN-NEXT: v_sub_u32_e32 v9, 64, v11
199 ; GCN-NEXT: v_lshrrev_b64 v[7:8], v11, v[0:1]
200 ; GCN-NEXT: v_lshlrev_b64 v[9:10], v9, v[2:3]
201 ; GCN-NEXT: v_sub_u32_e32 v12, 38, v6
202 ; GCN-NEXT: v_or_b32_e32 v10, v8, v10
203 ; GCN-NEXT: v_or_b32_e32 v9, v7, v9
204 ; GCN-NEXT: v_lshrrev_b64 v[7:8], v12, v[2:3]
205 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v11
206 ; GCN-NEXT: v_add_u32_e32 v13, 26, v6
207 ; GCN-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc
208 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v11
209 ; GCN-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc
210 ; GCN-NEXT: v_lshrrev_b64 v[9:10], v12, v[0:1]
211 ; GCN-NEXT: v_lshlrev_b64 v[11:12], v13, v[2:3]
212 ; GCN-NEXT: v_subrev_u32_e32 v6, 38, v6
213 ; GCN-NEXT: v_cndmask_b32_e64 v14, v7, v0, s[4:5]
214 ; GCN-NEXT: v_lshlrev_b64 v[6:7], v6, v[0:1]
215 ; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[4:5]
216 ; GCN-NEXT: v_or_b32_e32 v10, v12, v10
217 ; GCN-NEXT: v_or_b32_e32 v9, v11, v9
218 ; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13
219 ; GCN-NEXT: v_lshlrev_b64 v[0:1], v13, v[0:1]
220 ; GCN-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc
221 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13
222 ; GCN-NEXT: v_cndmask_b32_e32 v6, v6, v9, vcc
223 ; GCN-NEXT: v_cndmask_b32_e64 v3, v7, v3, s[4:5]
224 ; GCN-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[4:5]
225 ; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
226 ; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
227 ; GCN-NEXT: v_or_b32_e32 v1, v1, v3
228 ; GCN-NEXT: v_or_b32_e32 v0, v0, v2
229 ; GCN-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
230 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
231 ; GCN-NEXT: v_or_b32_e32 v7, v14, v0
232 ; GCN-NEXT: v_mov_b32_e32 v0, v7
233 ; GCN-NEXT: v_mov_b32_e32 v1, v8
234 ; GCN-NEXT: .LBB1_7: ; %Flow1
235 ; GCN-NEXT: s_or_b64 exec, exec, s[12:13]
236 ; GCN-NEXT: .LBB1_8: ; %Flow2
237 ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11]
238 ; GCN-NEXT: ; %bb.9: ; %itofp-sw-bb
239 ; GCN-NEXT: v_lshlrev_b64 v[0:1], 1, v[0:1]
240 ; GCN-NEXT: ; %bb.10: ; %itofp-sw-epilog
241 ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
242 ; GCN-NEXT: v_lshrrev_b32_e32 v2, 2, v0
243 ; GCN-NEXT: v_and_or_b32 v0, v2, 1, v0
244 ; GCN-NEXT: v_add_co_u32_e32 v0, vcc, 1, v0
245 ; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
246 ; GCN-NEXT: v_and_b32_e32 v2, 0x4000000, v0
247 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
248 ; GCN-NEXT: v_alignbit_b32 v7, v1, v0, 2
249 ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
250 ; GCN-NEXT: ; %bb.11: ; %itofp-if-then20
251 ; GCN-NEXT: v_alignbit_b32 v7, v1, v0, 3
252 ; GCN-NEXT: v_mov_b32_e32 v4, v5
253 ; GCN-NEXT: ; %bb.12: ; %Flow
254 ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
255 ; GCN-NEXT: .LBB1_13: ; %Flow4
256 ; GCN-NEXT: s_or_b64 exec, exec, s[8:9]
257 ; GCN-NEXT: v_and_b32_e32 v0, 0x7fffff, v7
258 ; GCN-NEXT: v_lshl_or_b32 v0, v4, 23, v0
259 ; GCN-NEXT: v_add_u32_e32 v0, 1.0, v0
260 ; GCN-NEXT: v_bfe_u32 v1, v0, 16, 1
261 ; GCN-NEXT: s_movk_i32 s4, 0x7fff
262 ; GCN-NEXT: v_add3_u32 v1, v1, v0, s4
263 ; GCN-NEXT: v_or_b32_e32 v2, 0x400000, v0
264 ; GCN-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
265 ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
266 ; GCN-NEXT: v_lshrrev_b32_e32 v4, 16, v0
267 ; GCN-NEXT: .LBB1_14: ; %Flow5
268 ; GCN-NEXT: s_or_b64 exec, exec, s[6:7]
269 ; GCN-NEXT: v_mov_b32_e32 v0, v4
270 ; GCN-NEXT: s_setpc_b64 s[30:31]
271 %cvt = uitofp i128 %x to bfloat
272 ret bfloat %cvt
273 }
274 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
275 ; SDAG: {{.*}}