1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=gfx1010 < %s | FileCheck %s --check-prefixes=CHECK,DAGISEL
3 ; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck %s --check-prefixes=CHECK,DAGISEL
4 ; RUN: llc -mtriple=amdgcn -global-isel -mcpu=gfx1010 < %s | FileCheck %s --check-prefixes=CHECK,GISEL
5 ; RUN: llc -mtriple=amdgcn -global-isel -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck %s --check-prefixes=CHECK,GISEL
7 declare i64 @llvm.amdgcn.ballot.i64(i1)
8 declare i64 @llvm.ctpop.i64(i64)
12 define amdgpu_cs i64 @constant_false() {
13 ; CHECK-LABEL: constant_false:
15 ; CHECK-NEXT: s_mov_b32 s0, 0
16 ; CHECK-NEXT: s_mov_b32 s1, 0
17 ; CHECK-NEXT: ; return to shader part epilog
18 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 0)
24 define amdgpu_cs i64 @constant_true() {
25 ; DAGISEL-LABEL: constant_true:
27 ; DAGISEL-NEXT: s_mov_b32 s0, exec_lo
28 ; DAGISEL-NEXT: s_mov_b32 s1, exec_hi
29 ; DAGISEL-NEXT: ; return to shader part epilog
31 ; GISEL-LABEL: constant_true:
33 ; GISEL-NEXT: s_mov_b32 s0, exec_lo
34 ; GISEL-NEXT: s_mov_b32 s1, 0
35 ; GISEL-NEXT: ; return to shader part epilog
36 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 1)
40 ; Test ballot of a non-comparison operation
42 define amdgpu_cs i64 @non_compare(i32 %x) {
43 ; CHECK-LABEL: non_compare:
45 ; CHECK-NEXT: v_and_b32_e32 v0, 1, v0
46 ; CHECK-NEXT: s_mov_b32 s1, 0
47 ; CHECK-NEXT: v_cmp_ne_u32_e64 s0, 0, v0
48 ; CHECK-NEXT: ; return to shader part epilog
49 %trunc = trunc i32 %x to i1
50 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %trunc)
54 ; Test ballot of comparisons
56 define amdgpu_cs i64 @compare_ints(i32 %x, i32 %y) {
57 ; CHECK-LABEL: compare_ints:
59 ; CHECK-NEXT: v_cmp_eq_u32_e64 s0, v0, v1
60 ; CHECK-NEXT: s_mov_b32 s1, 0
61 ; CHECK-NEXT: ; return to shader part epilog
62 %cmp = icmp eq i32 %x, %y
63 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
67 define amdgpu_cs i64 @compare_int_with_constant(i32 %x) {
68 ; DAGISEL-LABEL: compare_int_with_constant:
70 ; DAGISEL-NEXT: v_cmp_lt_i32_e64 s0, 0x62, v0
71 ; DAGISEL-NEXT: s_mov_b32 s1, 0
72 ; DAGISEL-NEXT: ; return to shader part epilog
74 ; GISEL-LABEL: compare_int_with_constant:
76 ; GISEL-NEXT: v_cmp_le_i32_e64 s0, 0x63, v0
77 ; GISEL-NEXT: s_mov_b32 s1, 0
78 ; GISEL-NEXT: ; return to shader part epilog
79 %cmp = icmp sge i32 %x, 99
80 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
84 define amdgpu_cs i64 @compare_floats(float %x, float %y) {
85 ; CHECK-LABEL: compare_floats:
87 ; CHECK-NEXT: v_cmp_gt_f32_e64 s0, v0, v1
88 ; CHECK-NEXT: s_mov_b32 s1, 0
89 ; CHECK-NEXT: ; return to shader part epilog
90 %cmp = fcmp ogt float %x, %y
91 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
95 define amdgpu_cs i64 @ctpop_of_ballot(float %x, float %y) {
96 ; CHECK-LABEL: ctpop_of_ballot:
98 ; CHECK-NEXT: v_cmp_gt_f32_e64 s0, v0, v1
99 ; CHECK-NEXT: s_mov_b32 s1, 0
100 ; CHECK-NEXT: s_bcnt1_i32_b64 s0, s[0:1]
101 ; CHECK-NEXT: ; return to shader part epilog
102 %cmp = fcmp ogt float %x, %y
103 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)
104 %bcnt = call i64 @llvm.ctpop.i64(i64 %ballot)
108 define amdgpu_cs i32 @branch_divergent_ballot64_ne_zero_compare(i32 %v) {
109 ; CHECK-LABEL: branch_divergent_ballot64_ne_zero_compare:
111 ; CHECK-NEXT: v_cmp_gt_u32_e64 s0, 12, v0
112 ; CHECK-NEXT: s_mov_b32 s1, 0
113 ; CHECK-NEXT: s_cmp_eq_u64 s[0:1], 0
114 ; CHECK-NEXT: s_cbranch_scc1 .LBB7_2
115 ; CHECK-NEXT: ; %bb.1: ; %true
116 ; CHECK-NEXT: s_mov_b32 s0, 42
117 ; CHECK-NEXT: s_branch .LBB7_3
118 ; CHECK-NEXT: .LBB7_2: ; %false
119 ; CHECK-NEXT: s_mov_b32 s0, 33
120 ; CHECK-NEXT: s_branch .LBB7_3
121 ; CHECK-NEXT: .LBB7_3:
122 %c = icmp ult i32 %v, 12
123 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %c)
124 %ballot_ne_zero = icmp ne i64 %ballot, 0
125 br i1 %ballot_ne_zero, label %true, label %false
132 define amdgpu_cs i32 @branch_divergent_ballot64_ne_zero_and(i32 %v1, i32 %v2) {
133 ; DAGISEL-LABEL: branch_divergent_ballot64_ne_zero_and:
135 ; DAGISEL-NEXT: v_cmp_gt_u32_e32 vcc_lo, 12, v0
136 ; DAGISEL-NEXT: v_cmp_lt_u32_e64 s0, 34, v1
137 ; DAGISEL-NEXT: s_mov_b32 s1, 0
138 ; DAGISEL-NEXT: s_and_b32 s0, vcc_lo, s0
139 ; DAGISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0
140 ; DAGISEL-NEXT: v_cmp_ne_u32_e64 s0, 0, v0
141 ; DAGISEL-NEXT: s_cmp_eq_u64 s[0:1], 0
142 ; DAGISEL-NEXT: s_cbranch_scc1 .LBB8_2
143 ; DAGISEL-NEXT: ; %bb.1: ; %true
144 ; DAGISEL-NEXT: s_mov_b32 s0, 42
145 ; DAGISEL-NEXT: s_branch .LBB8_3
146 ; DAGISEL-NEXT: .LBB8_2: ; %false
147 ; DAGISEL-NEXT: s_mov_b32 s0, 33
148 ; DAGISEL-NEXT: s_branch .LBB8_3
149 ; DAGISEL-NEXT: .LBB8_3:
151 ; GISEL-LABEL: branch_divergent_ballot64_ne_zero_and:
153 ; GISEL-NEXT: v_cmp_gt_u32_e32 vcc_lo, 12, v0
154 ; GISEL-NEXT: v_cmp_lt_u32_e64 s0, 34, v1
155 ; GISEL-NEXT: s_mov_b32 s1, 0
156 ; GISEL-NEXT: s_and_b32 s0, vcc_lo, s0
157 ; GISEL-NEXT: s_cmp_eq_u64 s[0:1], 0
158 ; GISEL-NEXT: s_cbranch_scc1 .LBB8_2
159 ; GISEL-NEXT: ; %bb.1: ; %true
160 ; GISEL-NEXT: s_mov_b32 s0, 42
161 ; GISEL-NEXT: s_branch .LBB8_3
162 ; GISEL-NEXT: .LBB8_2: ; %false
163 ; GISEL-NEXT: s_mov_b32 s0, 33
164 ; GISEL-NEXT: s_branch .LBB8_3
165 ; GISEL-NEXT: .LBB8_3:
166 %v1c = icmp ult i32 %v1, 12
167 %v2c = icmp ugt i32 %v2, 34
168 %c = and i1 %v1c, %v2c
169 %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %c)
170 %ballot_ne_zero = icmp ne i64 %ballot, 0
171 br i1 %ballot_ne_zero, label %true, label %false