| blob | aad74410d14538d2522dfb4e4f6868be0a0319bf |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s
3 ; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
4 ; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG %s
5 ; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s
6 ; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
7 ; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
9 declare i32 @llvm.amdgcn.permlane16(i32, i32, i32, i32, i1, i1)
10 declare i32 @llvm.amdgcn.permlanex16(i32, i32, i32, i32, i1, i1)
11 declare i32 @llvm.amdgcn.workitem.id.x()
12 declare i32 @llvm.amdgcn.workitem.id.y()
14 define amdgpu_kernel void @v_permlane16_b32_vss_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
15 ; GFX10-LABEL: v_permlane16_b32_vss_i32:
16 ; GFX10: ; %bb.0:
17 ; GFX10-NEXT: s_clause 0x1
18 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
19 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
20 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
21 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
22 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
23 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0
24 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
25 ; GFX10-NEXT: s_endpgm
26 ;
27 ; GFX11-LABEL: v_permlane16_b32_vss_i32:
28 ; GFX11: ; %bb.0:
29 ; GFX11-NEXT: s_clause 0x1
30 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
31 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
32 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
33 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
34 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
35 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0
36 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
37 ; GFX11-NEXT: s_nop 0
38 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
39 ; GFX11-NEXT: s_endpgm
40 ;
41 ; GFX12-LABEL: v_permlane16_b32_vss_i32:
42 ; GFX12: ; %bb.0:
43 ; GFX12-NEXT: s_clause 0x1
44 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
45 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
46 ; GFX12-NEXT: s_wait_kmcnt 0x0
47 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
48 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
49 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0
50 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
51 ; GFX12-NEXT: s_nop 0
52 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
53 ; GFX12-NEXT: s_endpgm
54 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
55 store i32 %v, ptr addrspace(1) %out
56 ret void
57 }
59 define amdgpu_kernel void @v_permlane16_b32_vss_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
60 ; GFX10-LABEL: v_permlane16_b32_vss_f32:
61 ; GFX10: ; %bb.0:
62 ; GFX10-NEXT: s_clause 0x1
63 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
64 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
65 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
66 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
67 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
68 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0
69 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
70 ; GFX10-NEXT: s_endpgm
71 ;
72 ; GFX11-LABEL: v_permlane16_b32_vss_f32:
73 ; GFX11: ; %bb.0:
74 ; GFX11-NEXT: s_clause 0x1
75 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
76 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
77 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
78 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
79 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
80 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0
81 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
82 ; GFX11-NEXT: s_nop 0
83 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
84 ; GFX11-NEXT: s_endpgm
85 ;
86 ; GFX12-LABEL: v_permlane16_b32_vss_f32:
87 ; GFX12: ; %bb.0:
88 ; GFX12-NEXT: s_clause 0x1
89 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
90 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
91 ; GFX12-NEXT: s_wait_kmcnt 0x0
92 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
93 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
94 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0
95 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
96 ; GFX12-NEXT: s_nop 0
97 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
98 ; GFX12-NEXT: s_endpgm
99 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 false, i1 false)
100 store float %v, ptr addrspace(1) %out
101 ret void
102 }
104 define amdgpu_kernel void @v_permlane16_b32_vss_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
105 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_i64:
106 ; GFX10-SDAG: ; %bb.0:
107 ; GFX10-SDAG-NEXT: s_clause 0x1
108 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
109 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
110 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
111 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
112 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
113 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
114 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
115 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
116 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
117 ; GFX10-SDAG-NEXT: s_endpgm
118 ;
119 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_i64:
120 ; GFX10-GISEL: ; %bb.0:
121 ; GFX10-GISEL-NEXT: s_clause 0x1
122 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
123 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
124 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
125 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
126 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
127 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
128 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
129 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
130 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
131 ; GFX10-GISEL-NEXT: s_endpgm
132 ;
133 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_i64:
134 ; GFX11-SDAG: ; %bb.0:
135 ; GFX11-SDAG-NEXT: s_clause 0x1
136 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
137 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
138 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
139 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
140 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
141 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
142 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
143 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
144 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
145 ; GFX11-SDAG-NEXT: s_nop 0
146 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
147 ; GFX11-SDAG-NEXT: s_endpgm
148 ;
149 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_i64:
150 ; GFX11-GISEL: ; %bb.0:
151 ; GFX11-GISEL-NEXT: s_clause 0x1
152 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
153 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
154 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
155 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
156 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
157 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
158 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
159 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
160 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
161 ; GFX11-GISEL-NEXT: s_nop 0
162 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
163 ; GFX11-GISEL-NEXT: s_endpgm
164 ;
165 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_i64:
166 ; GFX12-SDAG: ; %bb.0:
167 ; GFX12-SDAG-NEXT: s_clause 0x1
168 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
169 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
170 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
171 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
172 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
173 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
174 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
175 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
176 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
177 ; GFX12-SDAG-NEXT: s_nop 0
178 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
179 ; GFX12-SDAG-NEXT: s_endpgm
180 ;
181 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_i64:
182 ; GFX12-GISEL: ; %bb.0:
183 ; GFX12-GISEL-NEXT: s_clause 0x1
184 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
185 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
186 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
187 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
188 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
189 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
190 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
191 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
192 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
193 ; GFX12-GISEL-NEXT: s_nop 0
194 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
195 ; GFX12-GISEL-NEXT: s_endpgm
196 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
197 store i64 %v, ptr addrspace(1) %out
198 ret void
199 }
201 define amdgpu_kernel void @v_permlane16_b32_vss_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
202 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_f64:
203 ; GFX10-SDAG: ; %bb.0:
204 ; GFX10-SDAG-NEXT: s_clause 0x1
205 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
206 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
207 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
208 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
209 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
210 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
211 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
212 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
213 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
214 ; GFX10-SDAG-NEXT: s_endpgm
215 ;
216 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_f64:
217 ; GFX10-GISEL: ; %bb.0:
218 ; GFX10-GISEL-NEXT: s_clause 0x1
219 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
220 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
221 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
222 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
223 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
224 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
225 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
226 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
227 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
228 ; GFX10-GISEL-NEXT: s_endpgm
229 ;
230 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_f64:
231 ; GFX11-SDAG: ; %bb.0:
232 ; GFX11-SDAG-NEXT: s_clause 0x1
233 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
234 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
235 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
236 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
237 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
238 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
239 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
240 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
241 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
242 ; GFX11-SDAG-NEXT: s_nop 0
243 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
244 ; GFX11-SDAG-NEXT: s_endpgm
245 ;
246 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_f64:
247 ; GFX11-GISEL: ; %bb.0:
248 ; GFX11-GISEL-NEXT: s_clause 0x1
249 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
250 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
251 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
252 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
253 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
254 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
255 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
256 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
257 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
258 ; GFX11-GISEL-NEXT: s_nop 0
259 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
260 ; GFX11-GISEL-NEXT: s_endpgm
261 ;
262 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_f64:
263 ; GFX12-SDAG: ; %bb.0:
264 ; GFX12-SDAG-NEXT: s_clause 0x1
265 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
266 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
267 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
268 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
269 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
270 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
271 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
272 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
273 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
274 ; GFX12-SDAG-NEXT: s_nop 0
275 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
276 ; GFX12-SDAG-NEXT: s_endpgm
277 ;
278 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_f64:
279 ; GFX12-GISEL: ; %bb.0:
280 ; GFX12-GISEL-NEXT: s_clause 0x1
281 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
282 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
283 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
284 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
285 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
286 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
287 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
288 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
289 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
290 ; GFX12-GISEL-NEXT: s_nop 0
291 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
292 ; GFX12-GISEL-NEXT: s_endpgm
293 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 false, i1 false)
294 store double %v, ptr addrspace(1) %out
295 ret void
296 }
298 define amdgpu_kernel void @v_permlane16_b32_vii_i32(ptr addrspace(1) %out, i32 %src0) {
299 ; GFX10-LABEL: v_permlane16_b32_vii_i32:
300 ; GFX10: ; %bb.0:
301 ; GFX10-NEXT: s_clause 0x1
302 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
303 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
304 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
305 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
306 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
307 ; GFX10-NEXT: v_permlane16_b32 v0, v0, 1, 2
308 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
309 ; GFX10-NEXT: s_endpgm
310 ;
311 ; GFX11-LABEL: v_permlane16_b32_vii_i32:
312 ; GFX11: ; %bb.0:
313 ; GFX11-NEXT: s_clause 0x1
314 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
315 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
316 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
317 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
318 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
319 ; GFX11-NEXT: v_permlane16_b32 v0, v0, 1, 2
320 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
321 ; GFX11-NEXT: s_nop 0
322 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
323 ; GFX11-NEXT: s_endpgm
324 ;
325 ; GFX12-LABEL: v_permlane16_b32_vii_i32:
326 ; GFX12: ; %bb.0:
327 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
328 ; GFX12-NEXT: s_wait_kmcnt 0x0
329 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
330 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
331 ; GFX12-NEXT: v_permlane16_b32 v0, v0, 1, 2
332 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
333 ; GFX12-NEXT: s_nop 0
334 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
335 ; GFX12-NEXT: s_endpgm
336 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 1, i32 2, i1 false, i1 false)
337 store i32 %v, ptr addrspace(1) %out
338 ret void
339 }
341 define amdgpu_kernel void @v_permlane16_b32_vii_f32(ptr addrspace(1) %out, float %src0) {
342 ; GFX10-LABEL: v_permlane16_b32_vii_f32:
343 ; GFX10: ; %bb.0:
344 ; GFX10-NEXT: s_clause 0x1
345 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
346 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
347 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
348 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
349 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
350 ; GFX10-NEXT: v_permlane16_b32 v0, v0, 1, 2
351 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
352 ; GFX10-NEXT: s_endpgm
353 ;
354 ; GFX11-LABEL: v_permlane16_b32_vii_f32:
355 ; GFX11: ; %bb.0:
356 ; GFX11-NEXT: s_clause 0x1
357 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
358 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
359 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
360 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
361 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
362 ; GFX11-NEXT: v_permlane16_b32 v0, v0, 1, 2
363 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
364 ; GFX11-NEXT: s_nop 0
365 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
366 ; GFX11-NEXT: s_endpgm
367 ;
368 ; GFX12-LABEL: v_permlane16_b32_vii_f32:
369 ; GFX12: ; %bb.0:
370 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
371 ; GFX12-NEXT: s_wait_kmcnt 0x0
372 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
373 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
374 ; GFX12-NEXT: v_permlane16_b32 v0, v0, 1, 2
375 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
376 ; GFX12-NEXT: s_nop 0
377 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
378 ; GFX12-NEXT: s_endpgm
379 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 1, i32 2, i1 false, i1 false)
380 store float %v, ptr addrspace(1) %out
381 ret void
382 }
384 define amdgpu_kernel void @v_permlane16_b32_vii_i64(ptr addrspace(1) %out, i64 %src0) {
385 ; GFX10-SDAG-LABEL: v_permlane16_b32_vii_i64:
386 ; GFX10-SDAG: ; %bb.0:
387 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
388 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
389 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
390 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
391 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
392 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
393 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
394 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
395 ; GFX10-SDAG-NEXT: s_endpgm
396 ;
397 ; GFX10-GISEL-LABEL: v_permlane16_b32_vii_i64:
398 ; GFX10-GISEL: ; %bb.0:
399 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
400 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
401 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
402 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
403 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
404 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
405 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
406 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
407 ; GFX10-GISEL-NEXT: s_endpgm
408 ;
409 ; GFX11-SDAG-LABEL: v_permlane16_b32_vii_i64:
410 ; GFX11-SDAG: ; %bb.0:
411 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
412 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
413 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
414 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
415 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
416 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
417 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
418 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
419 ; GFX11-SDAG-NEXT: s_nop 0
420 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
421 ; GFX11-SDAG-NEXT: s_endpgm
422 ;
423 ; GFX11-GISEL-LABEL: v_permlane16_b32_vii_i64:
424 ; GFX11-GISEL: ; %bb.0:
425 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
426 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
427 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
428 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
429 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
430 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
431 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
432 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
433 ; GFX11-GISEL-NEXT: s_nop 0
434 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
435 ; GFX11-GISEL-NEXT: s_endpgm
436 ;
437 ; GFX12-SDAG-LABEL: v_permlane16_b32_vii_i64:
438 ; GFX12-SDAG: ; %bb.0:
439 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
440 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
441 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
442 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
443 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
444 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
445 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
446 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
447 ; GFX12-SDAG-NEXT: s_nop 0
448 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
449 ; GFX12-SDAG-NEXT: s_endpgm
450 ;
451 ; GFX12-GISEL-LABEL: v_permlane16_b32_vii_i64:
452 ; GFX12-GISEL: ; %bb.0:
453 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
454 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
455 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
456 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
457 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
458 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
459 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
460 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
461 ; GFX12-GISEL-NEXT: s_nop 0
462 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
463 ; GFX12-GISEL-NEXT: s_endpgm
464 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 1, i32 2, i1 false, i1 false)
465 store i64 %v, ptr addrspace(1) %out
466 ret void
467 }
469 define amdgpu_kernel void @v_permlane16_b32_vii_f64(ptr addrspace(1) %out, double %src0) {
470 ; GFX10-SDAG-LABEL: v_permlane16_b32_vii_f64:
471 ; GFX10-SDAG: ; %bb.0:
472 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
473 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
474 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
475 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
476 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
477 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
478 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
479 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
480 ; GFX10-SDAG-NEXT: s_endpgm
481 ;
482 ; GFX10-GISEL-LABEL: v_permlane16_b32_vii_f64:
483 ; GFX10-GISEL: ; %bb.0:
484 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
485 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
486 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
487 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
488 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
489 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
490 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
491 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
492 ; GFX10-GISEL-NEXT: s_endpgm
493 ;
494 ; GFX11-SDAG-LABEL: v_permlane16_b32_vii_f64:
495 ; GFX11-SDAG: ; %bb.0:
496 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
497 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
498 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
499 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
500 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
501 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
502 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
503 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
504 ; GFX11-SDAG-NEXT: s_nop 0
505 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
506 ; GFX11-SDAG-NEXT: s_endpgm
507 ;
508 ; GFX11-GISEL-LABEL: v_permlane16_b32_vii_f64:
509 ; GFX11-GISEL: ; %bb.0:
510 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
511 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
512 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
513 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
514 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
515 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
516 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
517 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
518 ; GFX11-GISEL-NEXT: s_nop 0
519 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
520 ; GFX11-GISEL-NEXT: s_endpgm
521 ;
522 ; GFX12-SDAG-LABEL: v_permlane16_b32_vii_f64:
523 ; GFX12-SDAG: ; %bb.0:
524 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
525 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
526 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
527 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
528 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
529 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
530 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
531 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
532 ; GFX12-SDAG-NEXT: s_nop 0
533 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
534 ; GFX12-SDAG-NEXT: s_endpgm
535 ;
536 ; GFX12-GISEL-LABEL: v_permlane16_b32_vii_f64:
537 ; GFX12-GISEL: ; %bb.0:
538 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
539 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
540 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
541 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
542 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
543 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
544 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
545 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
546 ; GFX12-GISEL-NEXT: s_nop 0
547 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
548 ; GFX12-GISEL-NEXT: s_endpgm
549 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 1, i32 2, i1 false, i1 false)
550 store double %v, ptr addrspace(1) %out
551 ret void
552 }
554 ; FIXME-GFX10PLUS: It is allowed to have both immediates as literals
555 define amdgpu_kernel void @v_permlane16_b32_vll_i32(ptr addrspace(1) %out, i32 %src0) {
556 ; GFX10-LABEL: v_permlane16_b32_vll_i32:
557 ; GFX10: ; %bb.0:
558 ; GFX10-NEXT: s_clause 0x1
559 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
560 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
561 ; GFX10-NEXT: s_movk_i32 s2, 0x1234
562 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
563 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
564 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
565 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
566 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
567 ; GFX10-NEXT: s_endpgm
568 ;
569 ; GFX11-LABEL: v_permlane16_b32_vll_i32:
570 ; GFX11: ; %bb.0:
571 ; GFX11-NEXT: s_clause 0x1
572 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
573 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
574 ; GFX11-NEXT: s_movk_i32 s2, 0x1234
575 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
576 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
577 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
578 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
579 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
580 ; GFX11-NEXT: s_nop 0
581 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
582 ; GFX11-NEXT: s_endpgm
583 ;
584 ; GFX12-LABEL: v_permlane16_b32_vll_i32:
585 ; GFX12: ; %bb.0:
586 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
587 ; GFX12-NEXT: s_wait_kmcnt 0x0
588 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
589 ; GFX12-NEXT: s_movk_i32 s2, 0x1234
590 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
591 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
592 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
593 ; GFX12-NEXT: s_nop 0
594 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
595 ; GFX12-NEXT: s_endpgm
596 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 4660, i32 49617, i1 false, i1 false)
597 store i32 %v, ptr addrspace(1) %out
598 ret void
599 }
601 define amdgpu_kernel void @v_permlane16_b32_vll_i64(ptr addrspace(1) %out, i64 %src0) {
602 ; GFX10-SDAG-LABEL: v_permlane16_b32_vll_i64:
603 ; GFX10-SDAG: ; %bb.0:
604 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
605 ; GFX10-SDAG-NEXT: s_movk_i32 s0, 0x1234
606 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
607 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
608 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
609 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
610 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, 0xc1d1
611 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, 0xc1d1
612 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
613 ; GFX10-SDAG-NEXT: s_endpgm
614 ;
615 ; GFX10-GISEL-LABEL: v_permlane16_b32_vll_i64:
616 ; GFX10-GISEL: ; %bb.0:
617 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
618 ; GFX10-GISEL-NEXT: s_movk_i32 s0, 0x1234
619 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
620 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
621 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
622 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
623 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, 0xc1d1
624 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, 0xc1d1
625 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
626 ; GFX10-GISEL-NEXT: s_endpgm
627 ;
628 ; GFX11-SDAG-LABEL: v_permlane16_b32_vll_i64:
629 ; GFX11-SDAG: ; %bb.0:
630 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
631 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
632 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
633 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
634 ; GFX11-SDAG-NEXT: s_movk_i32 s2, 0x1234
635 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
636 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
637 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
638 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
639 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
640 ; GFX11-SDAG-NEXT: s_nop 0
641 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
642 ; GFX11-SDAG-NEXT: s_endpgm
643 ;
644 ; GFX11-GISEL-LABEL: v_permlane16_b32_vll_i64:
645 ; GFX11-GISEL: ; %bb.0:
646 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
647 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
648 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
649 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
650 ; GFX11-GISEL-NEXT: s_movk_i32 s2, 0x1234
651 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
652 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
653 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
654 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
655 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
656 ; GFX11-GISEL-NEXT: s_nop 0
657 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
658 ; GFX11-GISEL-NEXT: s_endpgm
659 ;
660 ; GFX12-SDAG-LABEL: v_permlane16_b32_vll_i64:
661 ; GFX12-SDAG: ; %bb.0:
662 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
663 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
664 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
665 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
666 ; GFX12-SDAG-NEXT: s_movk_i32 s2, 0x1234
667 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
668 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
669 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
670 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
671 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
672 ; GFX12-SDAG-NEXT: s_nop 0
673 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
674 ; GFX12-SDAG-NEXT: s_endpgm
675 ;
676 ; GFX12-GISEL-LABEL: v_permlane16_b32_vll_i64:
677 ; GFX12-GISEL: ; %bb.0:
678 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
679 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
680 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
681 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
682 ; GFX12-GISEL-NEXT: s_movk_i32 s2, 0x1234
683 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
684 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
685 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
686 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
687 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
688 ; GFX12-GISEL-NEXT: s_nop 0
689 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
690 ; GFX12-GISEL-NEXT: s_endpgm
691 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 4660, i32 49617, i1 false, i1 false)
692 store i64 %v, ptr addrspace(1) %out
693 ret void
694 }
696 define amdgpu_kernel void @v_permlane16_b32_vll_f32(ptr addrspace(1) %out,float %src0) {
697 ; GFX10-LABEL: v_permlane16_b32_vll_f32:
698 ; GFX10: ; %bb.0:
699 ; GFX10-NEXT: s_clause 0x1
700 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
701 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
702 ; GFX10-NEXT: s_movk_i32 s2, 0x1234
703 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
704 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
705 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
706 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
707 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
708 ; GFX10-NEXT: s_endpgm
709 ;
710 ; GFX11-LABEL: v_permlane16_b32_vll_f32:
711 ; GFX11: ; %bb.0:
712 ; GFX11-NEXT: s_clause 0x1
713 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
714 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
715 ; GFX11-NEXT: s_movk_i32 s2, 0x1234
716 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
717 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
718 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
719 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
720 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
721 ; GFX11-NEXT: s_nop 0
722 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
723 ; GFX11-NEXT: s_endpgm
724 ;
725 ; GFX12-LABEL: v_permlane16_b32_vll_f32:
726 ; GFX12: ; %bb.0:
727 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
728 ; GFX12-NEXT: s_wait_kmcnt 0x0
729 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
730 ; GFX12-NEXT: s_movk_i32 s2, 0x1234
731 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
732 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
733 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
734 ; GFX12-NEXT: s_nop 0
735 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
736 ; GFX12-NEXT: s_endpgm
737 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 4660, i32 49617, i1 false, i1 false)
738 store float %v, ptr addrspace(1) %out
739 ret void
740 }
742 define amdgpu_kernel void @v_permlane16_b32_vll_f64(ptr addrspace(1) %out, double %src0) {
743 ; GFX10-SDAG-LABEL: v_permlane16_b32_vll_f64:
744 ; GFX10-SDAG: ; %bb.0:
745 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
746 ; GFX10-SDAG-NEXT: s_movk_i32 s0, 0x1234
747 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
748 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
749 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
750 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
751 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, 0xc1d1
752 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, 0xc1d1
753 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
754 ; GFX10-SDAG-NEXT: s_endpgm
755 ;
756 ; GFX10-GISEL-LABEL: v_permlane16_b32_vll_f64:
757 ; GFX10-GISEL: ; %bb.0:
758 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
759 ; GFX10-GISEL-NEXT: s_movk_i32 s0, 0x1234
760 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
761 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
762 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
763 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
764 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, 0xc1d1
765 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, 0xc1d1
766 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
767 ; GFX10-GISEL-NEXT: s_endpgm
768 ;
769 ; GFX11-SDAG-LABEL: v_permlane16_b32_vll_f64:
770 ; GFX11-SDAG: ; %bb.0:
771 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
772 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
773 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
774 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
775 ; GFX11-SDAG-NEXT: s_movk_i32 s2, 0x1234
776 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
777 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
778 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
779 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
780 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
781 ; GFX11-SDAG-NEXT: s_nop 0
782 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
783 ; GFX11-SDAG-NEXT: s_endpgm
784 ;
785 ; GFX11-GISEL-LABEL: v_permlane16_b32_vll_f64:
786 ; GFX11-GISEL: ; %bb.0:
787 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
788 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
789 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
790 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
791 ; GFX11-GISEL-NEXT: s_movk_i32 s2, 0x1234
792 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
793 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
794 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
795 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
796 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
797 ; GFX11-GISEL-NEXT: s_nop 0
798 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
799 ; GFX11-GISEL-NEXT: s_endpgm
800 ;
801 ; GFX12-SDAG-LABEL: v_permlane16_b32_vll_f64:
802 ; GFX12-SDAG: ; %bb.0:
803 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
804 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
805 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
806 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
807 ; GFX12-SDAG-NEXT: s_movk_i32 s2, 0x1234
808 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
809 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
810 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
811 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
812 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
813 ; GFX12-SDAG-NEXT: s_nop 0
814 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
815 ; GFX12-SDAG-NEXT: s_endpgm
816 ;
817 ; GFX12-GISEL-LABEL: v_permlane16_b32_vll_f64:
818 ; GFX12-GISEL: ; %bb.0:
819 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
820 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
821 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
822 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
823 ; GFX12-GISEL-NEXT: s_movk_i32 s2, 0x1234
824 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
825 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
826 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
827 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
828 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
829 ; GFX12-GISEL-NEXT: s_nop 0
830 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
831 ; GFX12-GISEL-NEXT: s_endpgm
832 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 4660, i32 49617, i1 false, i1 false)
833 store double %v, ptr addrspace(1) %out
834 ret void
835 }
837 define amdgpu_kernel void @v_permlane16_b32_vvv_i32(ptr addrspace(1) %out, i32 %src0) {
838 ; GFX10-LABEL: v_permlane16_b32_vvv_i32:
839 ; GFX10: ; %bb.0:
840 ; GFX10-NEXT: s_clause 0x1
841 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
842 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
843 ; GFX10-NEXT: s_mov_b32 null, 0
844 ; GFX10-NEXT: v_readfirstlane_b32 s2, v0
845 ; GFX10-NEXT: v_readfirstlane_b32 s3, v1
846 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
847 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
848 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
849 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, s3
850 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
851 ; GFX10-NEXT: s_endpgm
852 ;
853 ; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_i32:
854 ; GFX11-SDAG: ; %bb.0:
855 ; GFX11-SDAG-NEXT: s_clause 0x1
856 ; GFX11-SDAG-NEXT: s_load_b32 s4, s[2:3], 0x2c
857 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
858 ; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
859 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
860 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
861 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v0
862 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
863 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v1
864 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
865 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s4
866 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
867 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
868 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
869 ; GFX11-SDAG-NEXT: s_nop 0
870 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
871 ; GFX11-SDAG-NEXT: s_endpgm
872 ;
873 ; GFX11-GISEL-LABEL: v_permlane16_b32_vvv_i32:
874 ; GFX11-GISEL: ; %bb.0:
875 ; GFX11-GISEL-NEXT: s_clause 0x1
876 ; GFX11-GISEL-NEXT: s_load_b32 s4, s[2:3], 0x2c
877 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
878 ; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
879 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
880 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
881 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s3, v0
882 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
883 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s4
884 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s2, v1
885 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
886 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, s3
887 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
888 ; GFX11-GISEL-NEXT: s_nop 0
889 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
890 ; GFX11-GISEL-NEXT: s_endpgm
891 ;
892 ; GFX12-SDAG-LABEL: v_permlane16_b32_vvv_i32:
893 ; GFX12-SDAG: ; %bb.0:
894 ; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
895 ; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
896 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
897 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
898 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s3, v1
899 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
900 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
901 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
902 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
903 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
904 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
905 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
906 ; GFX12-SDAG-NEXT: s_nop 0
907 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
908 ; GFX12-SDAG-NEXT: s_endpgm
909 ;
910 ; GFX12-GISEL-LABEL: v_permlane16_b32_vvv_i32:
911 ; GFX12-GISEL: ; %bb.0:
912 ; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
913 ; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
914 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
915 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
916 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
917 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
918 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
919 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
920 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
921 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
922 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
923 ; GFX12-GISEL-NEXT: s_nop 0
924 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
925 ; GFX12-GISEL-NEXT: s_endpgm
926 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
927 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
928 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
929 store i32 %v, ptr addrspace(1) %out
930 ret void
931 }
933 define amdgpu_kernel void @v_permlane16_b32_vvv_i64(ptr addrspace(1) %out, i64 %src0) {
934 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_i64:
935 ; GFX10-SDAG: ; %bb.0:
936 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
937 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
938 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
939 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
940 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
941 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
942 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
943 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
944 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
945 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
946 ; GFX10-SDAG-NEXT: s_endpgm
947 ;
948 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_i64:
949 ; GFX10-GISEL: ; %bb.0:
950 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
951 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
952 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
953 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
954 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
955 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
956 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
957 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
958 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
959 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
960 ; GFX10-GISEL-NEXT: s_endpgm
961 ;
962 ; GFX11-LABEL: v_permlane16_b32_vvv_i64:
963 ; GFX11: ; %bb.0:
964 ; GFX11-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
965 ; GFX11-NEXT: v_and_b32_e32 v1, 0x3ff, v0
966 ; GFX11-NEXT: v_bfe_u32 v0, v0, 10, 10
967 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
968 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
969 ; GFX11-NEXT: v_readfirstlane_b32 s5, v0
970 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
971 ; GFX11-NEXT: v_mov_b32_e32 v0, s2
972 ; GFX11-NEXT: v_readfirstlane_b32 s4, v1
973 ; GFX11-NEXT: v_mov_b32_e32 v1, s3
974 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s4, s5
975 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
976 ; GFX11-NEXT: v_permlane16_b32 v1, v1, s4, s5
977 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
978 ; GFX11-NEXT: s_nop 0
979 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
980 ; GFX11-NEXT: s_endpgm
981 ;
982 ; GFX12-LABEL: v_permlane16_b32_vvv_i64:
983 ; GFX12: ; %bb.0:
984 ; GFX12-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
985 ; GFX12-NEXT: v_and_b32_e32 v1, 0x3ff, v0
986 ; GFX12-NEXT: v_bfe_u32 v0, v0, 10, 10
987 ; GFX12-NEXT: v_mov_b32_e32 v2, 0
988 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
989 ; GFX12-NEXT: v_readfirstlane_b32 s5, v0
990 ; GFX12-NEXT: s_wait_kmcnt 0x0
991 ; GFX12-NEXT: v_mov_b32_e32 v0, s2
992 ; GFX12-NEXT: v_readfirstlane_b32 s4, v1
993 ; GFX12-NEXT: v_mov_b32_e32 v1, s3
994 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s4, s5
995 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
996 ; GFX12-NEXT: v_permlane16_b32 v1, v1, s4, s5
997 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
998 ; GFX12-NEXT: s_nop 0
999 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1000 ; GFX12-NEXT: s_endpgm
1001 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1002 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1003 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
1004 store i64 %v, ptr addrspace(1) %out
1005 ret void
1006 }
1008 define amdgpu_kernel void @v_permlane16_b32_vvv_f32(ptr addrspace(1) %out, float %src0) {
1009 ; GFX10-LABEL: v_permlane16_b32_vvv_f32:
1010 ; GFX10: ; %bb.0:
1011 ; GFX10-NEXT: s_clause 0x1
1012 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
1013 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
1014 ; GFX10-NEXT: s_mov_b32 null, 0
1015 ; GFX10-NEXT: v_readfirstlane_b32 s2, v0
1016 ; GFX10-NEXT: v_readfirstlane_b32 s3, v1
1017 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
1018 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
1019 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
1020 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, s3
1021 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
1022 ; GFX10-NEXT: s_endpgm
1023 ;
1024 ; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_f32:
1025 ; GFX11-SDAG: ; %bb.0:
1026 ; GFX11-SDAG-NEXT: s_clause 0x1
1027 ; GFX11-SDAG-NEXT: s_load_b32 s4, s[2:3], 0x2c
1028 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
1029 ; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1030 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1031 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
1032 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v0
1033 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
1034 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v1
1035 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1036 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s4
1037 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
1038 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
1039 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1040 ; GFX11-SDAG-NEXT: s_nop 0
1041 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1042 ; GFX11-SDAG-NEXT: s_endpgm
1043 ;
1044 ; GFX11-GISEL-LABEL: v_permlane16_b32_vvv_f32:
1045 ; GFX11-GISEL: ; %bb.0:
1046 ; GFX11-GISEL-NEXT: s_clause 0x1
1047 ; GFX11-GISEL-NEXT: s_load_b32 s4, s[2:3], 0x2c
1048 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
1049 ; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1050 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1051 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
1052 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s3, v0
1053 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1054 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s4
1055 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s2, v1
1056 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
1057 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, s3
1058 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1059 ; GFX11-GISEL-NEXT: s_nop 0
1060 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1061 ; GFX11-GISEL-NEXT: s_endpgm
1062 ;
1063 ; GFX12-SDAG-LABEL: v_permlane16_b32_vvv_f32:
1064 ; GFX12-SDAG: ; %bb.0:
1065 ; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
1066 ; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1067 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1068 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
1069 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s3, v1
1070 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1071 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
1072 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1073 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
1074 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
1075 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
1076 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1077 ; GFX12-SDAG-NEXT: s_nop 0
1078 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1079 ; GFX12-SDAG-NEXT: s_endpgm
1080 ;
1081 ; GFX12-GISEL-LABEL: v_permlane16_b32_vvv_f32:
1082 ; GFX12-GISEL: ; %bb.0:
1083 ; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
1084 ; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1085 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1086 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
1087 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1088 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1089 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
1090 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
1091 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
1092 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
1093 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1094 ; GFX12-GISEL-NEXT: s_nop 0
1095 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1096 ; GFX12-GISEL-NEXT: s_endpgm
1097 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1098 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1099 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
1100 store float %v, ptr addrspace(1) %out
1101 ret void
1102 }
1104 define amdgpu_kernel void @v_permlane16_b32_vvv_f64(ptr addrspace(1) %out, double %src0) {
1105 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_f64:
1106 ; GFX10-SDAG: ; %bb.0:
1107 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1108 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
1109 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
1110 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1111 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1112 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1113 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1114 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1115 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1116 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1117 ; GFX10-SDAG-NEXT: s_endpgm
1118 ;
1119 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_f64:
1120 ; GFX10-GISEL: ; %bb.0:
1121 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1122 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
1123 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
1124 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1125 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1126 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1127 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1128 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1129 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1130 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1131 ; GFX10-GISEL-NEXT: s_endpgm
1132 ;
1133 ; GFX11-LABEL: v_permlane16_b32_vvv_f64:
1134 ; GFX11: ; %bb.0:
1135 ; GFX11-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1136 ; GFX11-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1137 ; GFX11-NEXT: v_bfe_u32 v0, v0, 10, 10
1138 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
1139 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
1140 ; GFX11-NEXT: v_readfirstlane_b32 s5, v0
1141 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
1142 ; GFX11-NEXT: v_mov_b32_e32 v0, s2
1143 ; GFX11-NEXT: v_readfirstlane_b32 s4, v1
1144 ; GFX11-NEXT: v_mov_b32_e32 v1, s3
1145 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s4, s5
1146 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
1147 ; GFX11-NEXT: v_permlane16_b32 v1, v1, s4, s5
1148 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
1149 ; GFX11-NEXT: s_nop 0
1150 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1151 ; GFX11-NEXT: s_endpgm
1152 ;
1153 ; GFX12-LABEL: v_permlane16_b32_vvv_f64:
1154 ; GFX12: ; %bb.0:
1155 ; GFX12-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1156 ; GFX12-NEXT: v_and_b32_e32 v1, 0x3ff, v0
1157 ; GFX12-NEXT: v_bfe_u32 v0, v0, 10, 10
1158 ; GFX12-NEXT: v_mov_b32_e32 v2, 0
1159 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
1160 ; GFX12-NEXT: v_readfirstlane_b32 s5, v0
1161 ; GFX12-NEXT: s_wait_kmcnt 0x0
1162 ; GFX12-NEXT: v_mov_b32_e32 v0, s2
1163 ; GFX12-NEXT: v_readfirstlane_b32 s4, v1
1164 ; GFX12-NEXT: v_mov_b32_e32 v1, s3
1165 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s4, s5
1166 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
1167 ; GFX12-NEXT: v_permlane16_b32 v1, v1, s4, s5
1168 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
1169 ; GFX12-NEXT: s_nop 0
1170 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1171 ; GFX12-NEXT: s_endpgm
1172 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1173 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1174 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
1175 store double %v, ptr addrspace(1) %out
1176 ret void
1177 }
1179 define amdgpu_kernel void @v_permlane16_b32_vvs_i32(ptr addrspace(1) %out, i32 %src0, i32 %src2) {
1180 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_i32:
1181 ; GFX10-SDAG: ; %bb.0:
1182 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1183 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
1184 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
1185 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1186 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s6
1187 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s7
1188 ; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[4:5]
1189 ; GFX10-SDAG-NEXT: s_endpgm
1190 ;
1191 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i32:
1192 ; GFX10-GISEL: ; %bb.0:
1193 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1194 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
1195 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
1196 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1197 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1198 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s7
1199 ; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[4:5]
1200 ; GFX10-GISEL-NEXT: s_endpgm
1201 ;
1202 ; GFX11-SDAG-LABEL: v_permlane16_b32_vvs_i32:
1203 ; GFX11-SDAG: ; %bb.0:
1204 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1205 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1206 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
1207 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1208 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1209 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
1210 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
1211 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1212 ; GFX11-SDAG-NEXT: s_nop 0
1213 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1214 ; GFX11-SDAG-NEXT: s_endpgm
1215 ;
1216 ; GFX11-GISEL-LABEL: v_permlane16_b32_vvs_i32:
1217 ; GFX11-GISEL: ; %bb.0:
1218 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1219 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
1220 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1221 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1222 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1223 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
1224 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
1225 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1226 ; GFX11-GISEL-NEXT: s_nop 0
1227 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1228 ; GFX11-GISEL-NEXT: s_endpgm
1229 ;
1230 ; GFX12-SDAG-LABEL: v_permlane16_b32_vvs_i32:
1231 ; GFX12-SDAG: ; %bb.0:
1232 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1233 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1234 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
1235 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1236 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1237 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
1238 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
1239 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1240 ; GFX12-SDAG-NEXT: s_nop 0
1241 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1242 ; GFX12-SDAG-NEXT: s_endpgm
1243 ;
1244 ; GFX12-GISEL-LABEL: v_permlane16_b32_vvs_i32:
1245 ; GFX12-GISEL: ; %bb.0:
1246 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1247 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
1248 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1249 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1250 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1251 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
1252 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
1253 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1254 ; GFX12-GISEL-NEXT: s_nop 0
1255 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1256 ; GFX12-GISEL-NEXT: s_endpgm
1257 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1258 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
1259 store i32 %v, ptr addrspace(1) %out
1260 ret void
1261 }
1263 define amdgpu_kernel void @v_permlane16_b32_vvs_i64(ptr addrspace(1) %out, i64 %src0, i32 %src2) {
1264 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_i64:
1265 ; GFX10-SDAG: ; %bb.0:
1266 ; GFX10-SDAG-NEXT: s_clause 0x1
1267 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1268 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
1269 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1270 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1271 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1272 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1273 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1274 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s1, s0
1275 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s1, s0
1276 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1277 ; GFX10-SDAG-NEXT: s_endpgm
1278 ;
1279 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i64:
1280 ; GFX10-GISEL: ; %bb.0:
1281 ; GFX10-GISEL-NEXT: s_clause 0x1
1282 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1283 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
1284 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1285 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1286 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1287 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1288 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1289 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s1, s0
1290 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s1, s0
1291 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1292 ; GFX10-GISEL-NEXT: s_endpgm
1293 ;
1294 ; GFX11-LABEL: v_permlane16_b32_vvs_i64:
1295 ; GFX11: ; %bb.0:
1296 ; GFX11-NEXT: s_clause 0x1
1297 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1298 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
1299 ; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
1300 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
1301 ; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1302 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1303 ; GFX11-NEXT: v_readfirstlane_b32 s1, v0
1304 ; GFX11-NEXT: v_mov_b32_e32 v0, s6
1305 ; GFX11-NEXT: v_permlane16_b32 v1, v1, s1, s0
1306 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
1307 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s1, s0
1308 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1309 ; GFX11-NEXT: s_nop 0
1310 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1311 ; GFX11-NEXT: s_endpgm
1312 ;
1313 ; GFX12-LABEL: v_permlane16_b32_vvs_i64:
1314 ; GFX12: ; %bb.0:
1315 ; GFX12-NEXT: s_clause 0x1
1316 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1317 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
1318 ; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
1319 ; GFX12-NEXT: s_wait_kmcnt 0x0
1320 ; GFX12-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1321 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1322 ; GFX12-NEXT: v_readfirstlane_b32 s1, v0
1323 ; GFX12-NEXT: v_mov_b32_e32 v0, s6
1324 ; GFX12-NEXT: v_permlane16_b32 v1, v1, s1, s0
1325 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
1326 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s1, s0
1327 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1328 ; GFX12-NEXT: s_nop 0
1329 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1330 ; GFX12-NEXT: s_endpgm
1331 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1332 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
1333 store i64 %v, ptr addrspace(1) %out
1334 ret void
1335 }
1337 define amdgpu_kernel void @v_permlane16_b32_vvs_f32(ptr addrspace(1) %out, float %src0, i32 %src2) {
1338 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_f32:
1339 ; GFX10-SDAG: ; %bb.0:
1340 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1341 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
1342 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
1343 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1344 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s6
1345 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s7
1346 ; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[4:5]
1347 ; GFX10-SDAG-NEXT: s_endpgm
1348 ;
1349 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f32:
1350 ; GFX10-GISEL: ; %bb.0:
1351 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1352 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
1353 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
1354 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1355 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1356 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s7
1357 ; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[4:5]
1358 ; GFX10-GISEL-NEXT: s_endpgm
1359 ;
1360 ; GFX11-SDAG-LABEL: v_permlane16_b32_vvs_f32:
1361 ; GFX11-SDAG: ; %bb.0:
1362 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1363 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1364 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
1365 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1366 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1367 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
1368 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
1369 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1370 ; GFX11-SDAG-NEXT: s_nop 0
1371 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1372 ; GFX11-SDAG-NEXT: s_endpgm
1373 ;
1374 ; GFX11-GISEL-LABEL: v_permlane16_b32_vvs_f32:
1375 ; GFX11-GISEL: ; %bb.0:
1376 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1377 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
1378 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1379 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1380 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1381 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
1382 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
1383 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1384 ; GFX11-GISEL-NEXT: s_nop 0
1385 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1386 ; GFX11-GISEL-NEXT: s_endpgm
1387 ;
1388 ; GFX12-SDAG-LABEL: v_permlane16_b32_vvs_f32:
1389 ; GFX12-SDAG: ; %bb.0:
1390 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1391 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1392 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
1393 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1394 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1395 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
1396 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
1397 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1398 ; GFX12-SDAG-NEXT: s_nop 0
1399 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1400 ; GFX12-SDAG-NEXT: s_endpgm
1401 ;
1402 ; GFX12-GISEL-LABEL: v_permlane16_b32_vvs_f32:
1403 ; GFX12-GISEL: ; %bb.0:
1404 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1405 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
1406 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1407 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1408 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1409 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
1410 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
1411 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1412 ; GFX12-GISEL-NEXT: s_nop 0
1413 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1414 ; GFX12-GISEL-NEXT: s_endpgm
1415 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1416 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
1417 store float %v, ptr addrspace(1) %out
1418 ret void
1419 }
1421 define amdgpu_kernel void @v_permlane16_b32_vvs_f64(ptr addrspace(1) %out, double %src0, i32 %src2) {
1422 ; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_f64:
1423 ; GFX10-SDAG: ; %bb.0:
1424 ; GFX10-SDAG-NEXT: s_clause 0x1
1425 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1426 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
1427 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1428 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1429 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1430 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1431 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1432 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s1, s0
1433 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s1, s0
1434 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1435 ; GFX10-SDAG-NEXT: s_endpgm
1436 ;
1437 ; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f64:
1438 ; GFX10-GISEL: ; %bb.0:
1439 ; GFX10-GISEL-NEXT: s_clause 0x1
1440 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1441 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
1442 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1443 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1444 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1445 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1446 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1447 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s1, s0
1448 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s1, s0
1449 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1450 ; GFX10-GISEL-NEXT: s_endpgm
1451 ;
1452 ; GFX11-LABEL: v_permlane16_b32_vvs_f64:
1453 ; GFX11: ; %bb.0:
1454 ; GFX11-NEXT: s_clause 0x1
1455 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1456 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
1457 ; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
1458 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
1459 ; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1460 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1461 ; GFX11-NEXT: v_readfirstlane_b32 s1, v0
1462 ; GFX11-NEXT: v_mov_b32_e32 v0, s6
1463 ; GFX11-NEXT: v_permlane16_b32 v1, v1, s1, s0
1464 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
1465 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s1, s0
1466 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1467 ; GFX11-NEXT: s_nop 0
1468 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1469 ; GFX11-NEXT: s_endpgm
1470 ;
1471 ; GFX12-LABEL: v_permlane16_b32_vvs_f64:
1472 ; GFX12: ; %bb.0:
1473 ; GFX12-NEXT: s_clause 0x1
1474 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1475 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
1476 ; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
1477 ; GFX12-NEXT: s_wait_kmcnt 0x0
1478 ; GFX12-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1479 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1480 ; GFX12-NEXT: v_readfirstlane_b32 s1, v0
1481 ; GFX12-NEXT: v_mov_b32_e32 v0, s6
1482 ; GFX12-NEXT: v_permlane16_b32 v1, v1, s1, s0
1483 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
1484 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s1, s0
1485 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1486 ; GFX12-NEXT: s_nop 0
1487 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1488 ; GFX12-NEXT: s_endpgm
1489 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
1490 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
1491 store double %v, ptr addrspace(1) %out
1492 ret void
1493 }
1495 define amdgpu_kernel void @v_permlane16_b32_vsv_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1) {
1496 ; GFX10-LABEL: v_permlane16_b32_vsv_i32:
1497 ; GFX10: ; %bb.0:
1498 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1499 ; GFX10-NEXT: v_readfirstlane_b32 s0, v1
1500 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
1501 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
1502 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
1503 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0
1504 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
1505 ; GFX10-NEXT: s_endpgm
1506 ;
1507 ; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_i32:
1508 ; GFX11-SDAG: ; %bb.0:
1509 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1510 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1511 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1512 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
1513 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1514 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1515 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
1516 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
1517 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1518 ; GFX11-SDAG-NEXT: s_nop 0
1519 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1520 ; GFX11-SDAG-NEXT: s_endpgm
1521 ;
1522 ; GFX11-GISEL-LABEL: v_permlane16_b32_vsv_i32:
1523 ; GFX11-GISEL: ; %bb.0:
1524 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1525 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1526 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
1527 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1528 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1529 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1530 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
1531 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
1532 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1533 ; GFX11-GISEL-NEXT: s_nop 0
1534 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1535 ; GFX11-GISEL-NEXT: s_endpgm
1536 ;
1537 ; GFX12-SDAG-LABEL: v_permlane16_b32_vsv_i32:
1538 ; GFX12-SDAG: ; %bb.0:
1539 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1540 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1541 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1542 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
1543 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1544 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1545 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
1546 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
1547 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1548 ; GFX12-SDAG-NEXT: s_nop 0
1549 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1550 ; GFX12-SDAG-NEXT: s_endpgm
1551 ;
1552 ; GFX12-GISEL-LABEL: v_permlane16_b32_vsv_i32:
1553 ; GFX12-GISEL: ; %bb.0:
1554 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1555 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1556 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
1557 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1558 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1559 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1560 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
1561 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
1562 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1563 ; GFX12-GISEL-NEXT: s_nop 0
1564 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1565 ; GFX12-GISEL-NEXT: s_endpgm
1566 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1567 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
1568 store i32 %v, ptr addrspace(1) %out
1569 ret void
1570 }
1572 define amdgpu_kernel void @v_permlane16_b32_vsv_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1) {
1573 ; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_i64:
1574 ; GFX10-SDAG: ; %bb.0:
1575 ; GFX10-SDAG-NEXT: s_clause 0x1
1576 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1577 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
1578 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
1579 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1580 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1581 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1582 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1583 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1584 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1585 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1586 ; GFX10-SDAG-NEXT: s_endpgm
1587 ;
1588 ; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_i64:
1589 ; GFX10-GISEL: ; %bb.0:
1590 ; GFX10-GISEL-NEXT: s_clause 0x1
1591 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1592 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
1593 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
1594 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1595 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1596 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1597 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1598 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1599 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1600 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1601 ; GFX10-GISEL-NEXT: s_endpgm
1602 ;
1603 ; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_i64:
1604 ; GFX11-SDAG: ; %bb.0:
1605 ; GFX11-SDAG-NEXT: s_clause 0x1
1606 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1607 ; GFX11-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
1608 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1609 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
1610 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1611 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1612 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1613 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
1614 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1615 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
1616 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1617 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1618 ; GFX11-SDAG-NEXT: s_nop 0
1619 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1620 ; GFX11-SDAG-NEXT: s_endpgm
1621 ;
1622 ; GFX11-GISEL-LABEL: v_permlane16_b32_vsv_i64:
1623 ; GFX11-GISEL: ; %bb.0:
1624 ; GFX11-GISEL-NEXT: s_clause 0x1
1625 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1626 ; GFX11-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
1627 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1628 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
1629 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1630 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1631 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1632 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
1633 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1634 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
1635 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1636 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1637 ; GFX11-GISEL-NEXT: s_nop 0
1638 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1639 ; GFX11-GISEL-NEXT: s_endpgm
1640 ;
1641 ; GFX12-SDAG-LABEL: v_permlane16_b32_vsv_i64:
1642 ; GFX12-SDAG: ; %bb.0:
1643 ; GFX12-SDAG-NEXT: s_clause 0x1
1644 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1645 ; GFX12-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
1646 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1647 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
1648 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1649 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1650 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1651 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
1652 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1653 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
1654 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1655 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1656 ; GFX12-SDAG-NEXT: s_nop 0
1657 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1658 ; GFX12-SDAG-NEXT: s_endpgm
1659 ;
1660 ; GFX12-GISEL-LABEL: v_permlane16_b32_vsv_i64:
1661 ; GFX12-GISEL: ; %bb.0:
1662 ; GFX12-GISEL-NEXT: s_clause 0x1
1663 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1664 ; GFX12-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
1665 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1666 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
1667 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1668 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1669 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1670 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
1671 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1672 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
1673 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1674 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1675 ; GFX12-GISEL-NEXT: s_nop 0
1676 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1677 ; GFX12-GISEL-NEXT: s_endpgm
1678 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1679 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
1680 store i64 %v, ptr addrspace(1) %out
1681 ret void
1682 }
1684 define amdgpu_kernel void @v_permlane16_b32_vsv_f32(ptr addrspace(1) %out, float %src0, i32 %src1) {
1685 ; GFX10-LABEL: v_permlane16_b32_vsv_f32:
1686 ; GFX10: ; %bb.0:
1687 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1688 ; GFX10-NEXT: v_readfirstlane_b32 s0, v1
1689 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
1690 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
1691 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
1692 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0
1693 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
1694 ; GFX10-NEXT: s_endpgm
1695 ;
1696 ; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_f32:
1697 ; GFX11-SDAG: ; %bb.0:
1698 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1699 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1700 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1701 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
1702 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1703 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1704 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
1705 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
1706 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1707 ; GFX11-SDAG-NEXT: s_nop 0
1708 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1709 ; GFX11-SDAG-NEXT: s_endpgm
1710 ;
1711 ; GFX11-GISEL-LABEL: v_permlane16_b32_vsv_f32:
1712 ; GFX11-GISEL: ; %bb.0:
1713 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1714 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1715 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
1716 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1717 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1718 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1719 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
1720 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
1721 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1722 ; GFX11-GISEL-NEXT: s_nop 0
1723 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1724 ; GFX11-GISEL-NEXT: s_endpgm
1725 ;
1726 ; GFX12-SDAG-LABEL: v_permlane16_b32_vsv_f32:
1727 ; GFX12-SDAG: ; %bb.0:
1728 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1729 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1730 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1731 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
1732 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1733 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
1734 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
1735 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
1736 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
1737 ; GFX12-SDAG-NEXT: s_nop 0
1738 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1739 ; GFX12-SDAG-NEXT: s_endpgm
1740 ;
1741 ; GFX12-GISEL-LABEL: v_permlane16_b32_vsv_f32:
1742 ; GFX12-GISEL: ; %bb.0:
1743 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
1744 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1745 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
1746 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1747 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
1748 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1749 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
1750 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
1751 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
1752 ; GFX12-GISEL-NEXT: s_nop 0
1753 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1754 ; GFX12-GISEL-NEXT: s_endpgm
1755 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1756 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
1757 store float %v, ptr addrspace(1) %out
1758 ret void
1759 }
1761 define amdgpu_kernel void @v_permlane16_b32_vsv_f64(ptr addrspace(1) %out, double %src0, i32 %src1) {
1762 ; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_f64:
1763 ; GFX10-SDAG: ; %bb.0:
1764 ; GFX10-SDAG-NEXT: s_clause 0x1
1765 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1766 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
1767 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
1768 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1769 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1770 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1771 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1772 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1773 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1774 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1775 ; GFX10-SDAG-NEXT: s_endpgm
1776 ;
1777 ; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_f64:
1778 ; GFX10-GISEL: ; %bb.0:
1779 ; GFX10-GISEL-NEXT: s_clause 0x1
1780 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1781 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
1782 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
1783 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1784 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1785 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1786 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1787 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1788 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1789 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1790 ; GFX10-GISEL-NEXT: s_endpgm
1791 ;
1792 ; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_f64:
1793 ; GFX11-SDAG: ; %bb.0:
1794 ; GFX11-SDAG-NEXT: s_clause 0x1
1795 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1796 ; GFX11-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
1797 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1798 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
1799 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1800 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1801 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1802 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
1803 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1804 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
1805 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1806 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1807 ; GFX11-SDAG-NEXT: s_nop 0
1808 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1809 ; GFX11-SDAG-NEXT: s_endpgm
1810 ;
1811 ; GFX11-GISEL-LABEL: v_permlane16_b32_vsv_f64:
1812 ; GFX11-GISEL: ; %bb.0:
1813 ; GFX11-GISEL-NEXT: s_clause 0x1
1814 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1815 ; GFX11-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
1816 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1817 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
1818 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1819 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1820 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1821 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
1822 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1823 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
1824 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1825 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1826 ; GFX11-GISEL-NEXT: s_nop 0
1827 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1828 ; GFX11-GISEL-NEXT: s_endpgm
1829 ;
1830 ; GFX12-SDAG-LABEL: v_permlane16_b32_vsv_f64:
1831 ; GFX12-SDAG: ; %bb.0:
1832 ; GFX12-SDAG-NEXT: s_clause 0x1
1833 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1834 ; GFX12-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
1835 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
1836 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
1837 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1838 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v0
1839 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1840 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
1841 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
1842 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
1843 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
1844 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1845 ; GFX12-SDAG-NEXT: s_nop 0
1846 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1847 ; GFX12-SDAG-NEXT: s_endpgm
1848 ;
1849 ; GFX12-GISEL-LABEL: v_permlane16_b32_vsv_f64:
1850 ; GFX12-GISEL: ; %bb.0:
1851 ; GFX12-GISEL-NEXT: s_clause 0x1
1852 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1853 ; GFX12-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
1854 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
1855 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
1856 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1857 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v0
1858 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
1859 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
1860 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
1861 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
1862 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
1863 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1864 ; GFX12-GISEL-NEXT: s_nop 0
1865 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1866 ; GFX12-GISEL-NEXT: s_endpgm
1867 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
1868 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
1869 store double %v, ptr addrspace(1) %out
1870 ret void
1871 }
1873 define amdgpu_kernel void @v_permlane16_b32_vss_fi_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
1874 ; GFX10-LABEL: v_permlane16_b32_vss_fi_i32:
1875 ; GFX10: ; %bb.0:
1876 ; GFX10-NEXT: s_clause 0x1
1877 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1878 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
1879 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
1880 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
1881 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
1882 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
1883 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
1884 ; GFX10-NEXT: s_endpgm
1885 ;
1886 ; GFX11-LABEL: v_permlane16_b32_vss_fi_i32:
1887 ; GFX11: ; %bb.0:
1888 ; GFX11-NEXT: s_clause 0x1
1889 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1890 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
1891 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
1892 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
1893 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
1894 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
1895 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
1896 ; GFX11-NEXT: s_nop 0
1897 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1898 ; GFX11-NEXT: s_endpgm
1899 ;
1900 ; GFX12-LABEL: v_permlane16_b32_vss_fi_i32:
1901 ; GFX12: ; %bb.0:
1902 ; GFX12-NEXT: s_clause 0x1
1903 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1904 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
1905 ; GFX12-NEXT: s_wait_kmcnt 0x0
1906 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
1907 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
1908 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
1909 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
1910 ; GFX12-NEXT: s_nop 0
1911 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1912 ; GFX12-NEXT: s_endpgm
1913 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 false)
1914 store i32 %v, ptr addrspace(1) %out
1915 ret void
1916 }
1918 define amdgpu_kernel void @v_permlane16_b32_vss_fi_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
1919 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
1920 ; GFX10-SDAG: ; %bb.0:
1921 ; GFX10-SDAG-NEXT: s_clause 0x1
1922 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1923 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
1924 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
1925 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1926 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
1927 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
1928 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
1929 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
1930 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1931 ; GFX10-SDAG-NEXT: s_endpgm
1932 ;
1933 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
1934 ; GFX10-GISEL: ; %bb.0:
1935 ; GFX10-GISEL-NEXT: s_clause 0x1
1936 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
1937 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
1938 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
1939 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1940 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
1941 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
1942 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
1943 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
1944 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
1945 ; GFX10-GISEL-NEXT: s_endpgm
1946 ;
1947 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
1948 ; GFX11-SDAG: ; %bb.0:
1949 ; GFX11-SDAG-NEXT: s_clause 0x1
1950 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1951 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
1952 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
1953 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1954 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
1955 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
1956 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
1957 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
1958 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1959 ; GFX11-SDAG-NEXT: s_nop 0
1960 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1961 ; GFX11-SDAG-NEXT: s_endpgm
1962 ;
1963 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
1964 ; GFX11-GISEL: ; %bb.0:
1965 ; GFX11-GISEL-NEXT: s_clause 0x1
1966 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1967 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
1968 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
1969 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
1970 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
1971 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
1972 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
1973 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
1974 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1975 ; GFX11-GISEL-NEXT: s_nop 0
1976 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1977 ; GFX11-GISEL-NEXT: s_endpgm
1978 ;
1979 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
1980 ; GFX12-SDAG: ; %bb.0:
1981 ; GFX12-SDAG-NEXT: s_clause 0x1
1982 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1983 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
1984 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
1985 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
1986 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
1987 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
1988 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
1989 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
1990 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
1991 ; GFX12-SDAG-NEXT: s_nop 0
1992 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
1993 ; GFX12-SDAG-NEXT: s_endpgm
1994 ;
1995 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
1996 ; GFX12-GISEL: ; %bb.0:
1997 ; GFX12-GISEL-NEXT: s_clause 0x1
1998 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
1999 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2000 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2001 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2002 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2003 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2004 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2005 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2006 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2007 ; GFX12-GISEL-NEXT: s_nop 0
2008 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2009 ; GFX12-GISEL-NEXT: s_endpgm
2010 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 true, i1 false)
2011 store i64 %v, ptr addrspace(1) %out
2012 ret void
2013 }
2015 define amdgpu_kernel void @v_permlane16_b32_vss_fi_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
2016 ; GFX10-LABEL: v_permlane16_b32_vss_fi_f32:
2017 ; GFX10: ; %bb.0:
2018 ; GFX10-NEXT: s_clause 0x1
2019 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2020 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2021 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2022 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2023 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2024 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
2025 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2026 ; GFX10-NEXT: s_endpgm
2027 ;
2028 ; GFX11-LABEL: v_permlane16_b32_vss_fi_f32:
2029 ; GFX11: ; %bb.0:
2030 ; GFX11-NEXT: s_clause 0x1
2031 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2032 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2033 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2034 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2035 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2036 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
2037 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2038 ; GFX11-NEXT: s_nop 0
2039 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2040 ; GFX11-NEXT: s_endpgm
2041 ;
2042 ; GFX12-LABEL: v_permlane16_b32_vss_fi_f32:
2043 ; GFX12: ; %bb.0:
2044 ; GFX12-NEXT: s_clause 0x1
2045 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2046 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2047 ; GFX12-NEXT: s_wait_kmcnt 0x0
2048 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2049 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2050 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0]
2051 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2052 ; GFX12-NEXT: s_nop 0
2053 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2054 ; GFX12-NEXT: s_endpgm
2055 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 true, i1 false)
2056 store float %v, ptr addrspace(1) %out
2057 ret void
2058 }
2060 define amdgpu_kernel void @v_permlane16_b32_vss_fi_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
2061 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
2062 ; GFX10-SDAG: ; %bb.0:
2063 ; GFX10-SDAG-NEXT: s_clause 0x1
2064 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2065 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2066 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2067 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2068 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2069 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2070 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2071 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2072 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2073 ; GFX10-SDAG-NEXT: s_endpgm
2074 ;
2075 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
2076 ; GFX10-GISEL: ; %bb.0:
2077 ; GFX10-GISEL-NEXT: s_clause 0x1
2078 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2079 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2080 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2081 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2082 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2083 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2084 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2085 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2086 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2087 ; GFX10-GISEL-NEXT: s_endpgm
2088 ;
2089 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
2090 ; GFX11-SDAG: ; %bb.0:
2091 ; GFX11-SDAG-NEXT: s_clause 0x1
2092 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2093 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2094 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2095 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2096 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2097 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2098 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2099 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2100 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2101 ; GFX11-SDAG-NEXT: s_nop 0
2102 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2103 ; GFX11-SDAG-NEXT: s_endpgm
2104 ;
2105 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
2106 ; GFX11-GISEL: ; %bb.0:
2107 ; GFX11-GISEL-NEXT: s_clause 0x1
2108 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2109 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2110 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2111 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2112 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2113 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2114 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2115 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2116 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2117 ; GFX11-GISEL-NEXT: s_nop 0
2118 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2119 ; GFX11-GISEL-NEXT: s_endpgm
2120 ;
2121 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
2122 ; GFX12-SDAG: ; %bb.0:
2123 ; GFX12-SDAG-NEXT: s_clause 0x1
2124 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2125 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2126 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2127 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2128 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2129 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2130 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2131 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2132 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2133 ; GFX12-SDAG-NEXT: s_nop 0
2134 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2135 ; GFX12-SDAG-NEXT: s_endpgm
2136 ;
2137 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
2138 ; GFX12-GISEL: ; %bb.0:
2139 ; GFX12-GISEL-NEXT: s_clause 0x1
2140 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2141 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2142 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2143 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2144 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2145 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2146 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
2147 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
2148 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2149 ; GFX12-GISEL-NEXT: s_nop 0
2150 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2151 ; GFX12-GISEL-NEXT: s_endpgm
2152 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 true, i1 false)
2153 store double %v, ptr addrspace(1) %out
2154 ret void
2155 }
2157 define amdgpu_kernel void @v_permlane16_b32_vss_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
2158 ; GFX10-LABEL: v_permlane16_b32_vss_bc_i32:
2159 ; GFX10: ; %bb.0:
2160 ; GFX10-NEXT: s_clause 0x1
2161 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2162 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2163 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2164 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2165 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2166 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2167 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2168 ; GFX10-NEXT: s_endpgm
2169 ;
2170 ; GFX11-LABEL: v_permlane16_b32_vss_bc_i32:
2171 ; GFX11: ; %bb.0:
2172 ; GFX11-NEXT: s_clause 0x1
2173 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2174 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2175 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2176 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2177 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2178 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2179 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2180 ; GFX11-NEXT: s_nop 0
2181 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2182 ; GFX11-NEXT: s_endpgm
2183 ;
2184 ; GFX12-LABEL: v_permlane16_b32_vss_bc_i32:
2185 ; GFX12: ; %bb.0:
2186 ; GFX12-NEXT: s_clause 0x1
2187 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2188 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2189 ; GFX12-NEXT: s_wait_kmcnt 0x0
2190 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2191 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2192 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2193 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2194 ; GFX12-NEXT: s_nop 0
2195 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2196 ; GFX12-NEXT: s_endpgm
2197 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
2198 store i32 %v, ptr addrspace(1) %out
2199 ret void
2200 }
2202 define amdgpu_kernel void @v_permlane16_b32_vss_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
2203 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
2204 ; GFX10-SDAG: ; %bb.0:
2205 ; GFX10-SDAG-NEXT: s_clause 0x1
2206 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2207 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2208 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2209 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2210 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2211 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2212 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2213 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2214 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2215 ; GFX10-SDAG-NEXT: s_endpgm
2216 ;
2217 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
2218 ; GFX10-GISEL: ; %bb.0:
2219 ; GFX10-GISEL-NEXT: s_clause 0x1
2220 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2221 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2222 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2223 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2224 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2225 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2226 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2227 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2228 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2229 ; GFX10-GISEL-NEXT: s_endpgm
2230 ;
2231 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
2232 ; GFX11-SDAG: ; %bb.0:
2233 ; GFX11-SDAG-NEXT: s_clause 0x1
2234 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2235 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2236 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2237 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2238 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2239 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2240 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2241 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2242 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2243 ; GFX11-SDAG-NEXT: s_nop 0
2244 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2245 ; GFX11-SDAG-NEXT: s_endpgm
2246 ;
2247 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
2248 ; GFX11-GISEL: ; %bb.0:
2249 ; GFX11-GISEL-NEXT: s_clause 0x1
2250 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2251 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2252 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2253 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2254 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2255 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2256 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2257 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2258 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2259 ; GFX11-GISEL-NEXT: s_nop 0
2260 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2261 ; GFX11-GISEL-NEXT: s_endpgm
2262 ;
2263 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
2264 ; GFX12-SDAG: ; %bb.0:
2265 ; GFX12-SDAG-NEXT: s_clause 0x1
2266 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2267 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2268 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2269 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2270 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2271 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2272 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2273 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2274 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2275 ; GFX12-SDAG-NEXT: s_nop 0
2276 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2277 ; GFX12-SDAG-NEXT: s_endpgm
2278 ;
2279 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
2280 ; GFX12-GISEL: ; %bb.0:
2281 ; GFX12-GISEL-NEXT: s_clause 0x1
2282 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2283 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2284 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2285 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2286 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2287 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2288 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2289 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2290 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2291 ; GFX12-GISEL-NEXT: s_nop 0
2292 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2293 ; GFX12-GISEL-NEXT: s_endpgm
2294 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
2295 store i64 %v, ptr addrspace(1) %out
2296 ret void
2297 }
2299 define amdgpu_kernel void @v_permlane16_b32_vss_bc_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
2300 ; GFX10-LABEL: v_permlane16_b32_vss_bc_f32:
2301 ; GFX10: ; %bb.0:
2302 ; GFX10-NEXT: s_clause 0x1
2303 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2304 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2305 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2306 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2307 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2308 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2309 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2310 ; GFX10-NEXT: s_endpgm
2311 ;
2312 ; GFX11-LABEL: v_permlane16_b32_vss_bc_f32:
2313 ; GFX11: ; %bb.0:
2314 ; GFX11-NEXT: s_clause 0x1
2315 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2316 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2317 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2318 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2319 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2320 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2321 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2322 ; GFX11-NEXT: s_nop 0
2323 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2324 ; GFX11-NEXT: s_endpgm
2325 ;
2326 ; GFX12-LABEL: v_permlane16_b32_vss_bc_f32:
2327 ; GFX12: ; %bb.0:
2328 ; GFX12-NEXT: s_clause 0x1
2329 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2330 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2331 ; GFX12-NEXT: s_wait_kmcnt 0x0
2332 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2333 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2334 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[0,1]
2335 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2336 ; GFX12-NEXT: s_nop 0
2337 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2338 ; GFX12-NEXT: s_endpgm
2339 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 false, i1 true)
2340 store float %v, ptr addrspace(1) %out
2341 ret void
2342 }
2344 define amdgpu_kernel void @v_permlane16_b32_vss_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
2345 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
2346 ; GFX10-SDAG: ; %bb.0:
2347 ; GFX10-SDAG-NEXT: s_clause 0x1
2348 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2349 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2350 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2351 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2352 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2353 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2354 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2355 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2356 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2357 ; GFX10-SDAG-NEXT: s_endpgm
2358 ;
2359 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
2360 ; GFX10-GISEL: ; %bb.0:
2361 ; GFX10-GISEL-NEXT: s_clause 0x1
2362 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2363 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2364 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2365 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2366 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2367 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2368 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2369 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2370 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2371 ; GFX10-GISEL-NEXT: s_endpgm
2372 ;
2373 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
2374 ; GFX11-SDAG: ; %bb.0:
2375 ; GFX11-SDAG-NEXT: s_clause 0x1
2376 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2377 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2378 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2379 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2380 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2381 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2382 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2383 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2384 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2385 ; GFX11-SDAG-NEXT: s_nop 0
2386 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2387 ; GFX11-SDAG-NEXT: s_endpgm
2388 ;
2389 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
2390 ; GFX11-GISEL: ; %bb.0:
2391 ; GFX11-GISEL-NEXT: s_clause 0x1
2392 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2393 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2394 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2395 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2396 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2397 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2398 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2399 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2400 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2401 ; GFX11-GISEL-NEXT: s_nop 0
2402 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2403 ; GFX11-GISEL-NEXT: s_endpgm
2404 ;
2405 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
2406 ; GFX12-SDAG: ; %bb.0:
2407 ; GFX12-SDAG-NEXT: s_clause 0x1
2408 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2409 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2410 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2411 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2412 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2413 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2414 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2415 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2416 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2417 ; GFX12-SDAG-NEXT: s_nop 0
2418 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2419 ; GFX12-SDAG-NEXT: s_endpgm
2420 ;
2421 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
2422 ; GFX12-GISEL: ; %bb.0:
2423 ; GFX12-GISEL-NEXT: s_clause 0x1
2424 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2425 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2426 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2427 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2428 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2429 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2430 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
2431 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
2432 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2433 ; GFX12-GISEL-NEXT: s_nop 0
2434 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2435 ; GFX12-GISEL-NEXT: s_endpgm
2436 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 false, i1 true)
2437 store double %v, ptr addrspace(1) %out
2438 ret void
2439 }
2441 define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
2442 ; GFX10-LABEL: v_permlane16_b32_vss_fi_bc_i32:
2443 ; GFX10: ; %bb.0:
2444 ; GFX10-NEXT: s_clause 0x1
2445 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2446 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2447 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2448 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2449 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2450 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2451 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2452 ; GFX10-NEXT: s_endpgm
2453 ;
2454 ; GFX11-LABEL: v_permlane16_b32_vss_fi_bc_i32:
2455 ; GFX11: ; %bb.0:
2456 ; GFX11-NEXT: s_clause 0x1
2457 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2458 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2459 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2460 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2461 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2462 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2463 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2464 ; GFX11-NEXT: s_nop 0
2465 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2466 ; GFX11-NEXT: s_endpgm
2467 ;
2468 ; GFX12-LABEL: v_permlane16_b32_vss_fi_bc_i32:
2469 ; GFX12: ; %bb.0:
2470 ; GFX12-NEXT: s_clause 0x1
2471 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2472 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2473 ; GFX12-NEXT: s_wait_kmcnt 0x0
2474 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2475 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2476 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2477 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2478 ; GFX12-NEXT: s_nop 0
2479 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2480 ; GFX12-NEXT: s_endpgm
2481 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
2482 store i32 %v, ptr addrspace(1) %out
2483 ret void
2484 }
2486 define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
2487 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2488 ; GFX10-SDAG: ; %bb.0:
2489 ; GFX10-SDAG-NEXT: s_clause 0x1
2490 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2491 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2492 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2493 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2494 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2495 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2496 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2497 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2498 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2499 ; GFX10-SDAG-NEXT: s_endpgm
2500 ;
2501 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2502 ; GFX10-GISEL: ; %bb.0:
2503 ; GFX10-GISEL-NEXT: s_clause 0x1
2504 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2505 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2506 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2507 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2508 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2509 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2510 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2511 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2512 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2513 ; GFX10-GISEL-NEXT: s_endpgm
2514 ;
2515 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2516 ; GFX11-SDAG: ; %bb.0:
2517 ; GFX11-SDAG-NEXT: s_clause 0x1
2518 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2519 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2520 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2521 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2522 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2523 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2524 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2525 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2526 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2527 ; GFX11-SDAG-NEXT: s_nop 0
2528 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2529 ; GFX11-SDAG-NEXT: s_endpgm
2530 ;
2531 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2532 ; GFX11-GISEL: ; %bb.0:
2533 ; GFX11-GISEL-NEXT: s_clause 0x1
2534 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2535 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2536 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2537 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2538 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2539 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2540 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2541 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2542 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2543 ; GFX11-GISEL-NEXT: s_nop 0
2544 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2545 ; GFX11-GISEL-NEXT: s_endpgm
2546 ;
2547 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2548 ; GFX12-SDAG: ; %bb.0:
2549 ; GFX12-SDAG-NEXT: s_clause 0x1
2550 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2551 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2552 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2553 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2554 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2555 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2556 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2557 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2558 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2559 ; GFX12-SDAG-NEXT: s_nop 0
2560 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2561 ; GFX12-SDAG-NEXT: s_endpgm
2562 ;
2563 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
2564 ; GFX12-GISEL: ; %bb.0:
2565 ; GFX12-GISEL-NEXT: s_clause 0x1
2566 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2567 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2568 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2569 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2570 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2571 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2572 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2573 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2574 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2575 ; GFX12-GISEL-NEXT: s_nop 0
2576 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2577 ; GFX12-GISEL-NEXT: s_endpgm
2578 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
2579 store i64 %v, ptr addrspace(1) %out
2580 ret void
2581 }
2583 define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
2584 ; GFX10-LABEL: v_permlane16_b32_vss_fi_bc_f32:
2585 ; GFX10: ; %bb.0:
2586 ; GFX10-NEXT: s_clause 0x1
2587 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2588 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2589 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2590 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2591 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2592 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2593 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2594 ; GFX10-NEXT: s_endpgm
2595 ;
2596 ; GFX11-LABEL: v_permlane16_b32_vss_fi_bc_f32:
2597 ; GFX11: ; %bb.0:
2598 ; GFX11-NEXT: s_clause 0x1
2599 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2600 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2601 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2602 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2603 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2604 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2605 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2606 ; GFX11-NEXT: s_nop 0
2607 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2608 ; GFX11-NEXT: s_endpgm
2609 ;
2610 ; GFX12-LABEL: v_permlane16_b32_vss_fi_bc_f32:
2611 ; GFX12: ; %bb.0:
2612 ; GFX12-NEXT: s_clause 0x1
2613 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2614 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2615 ; GFX12-NEXT: s_wait_kmcnt 0x0
2616 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2617 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2618 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,1]
2619 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2620 ; GFX12-NEXT: s_nop 0
2621 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2622 ; GFX12-NEXT: s_endpgm
2623 %v = call float @llvm.amdgcn.permlane16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 true, i1 true)
2624 store float %v, ptr addrspace(1) %out
2625 ret void
2626 }
2628 define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
2629 ; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2630 ; GFX10-SDAG: ; %bb.0:
2631 ; GFX10-SDAG-NEXT: s_clause 0x1
2632 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2633 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2634 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2635 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2636 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2637 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2638 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2639 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2640 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2641 ; GFX10-SDAG-NEXT: s_endpgm
2642 ;
2643 ; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2644 ; GFX10-GISEL: ; %bb.0:
2645 ; GFX10-GISEL-NEXT: s_clause 0x1
2646 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2647 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2648 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2649 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2650 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2651 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2652 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2653 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2654 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2655 ; GFX10-GISEL-NEXT: s_endpgm
2656 ;
2657 ; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2658 ; GFX11-SDAG: ; %bb.0:
2659 ; GFX11-SDAG-NEXT: s_clause 0x1
2660 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2661 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2662 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2663 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2664 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2665 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2666 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2667 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2668 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2669 ; GFX11-SDAG-NEXT: s_nop 0
2670 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2671 ; GFX11-SDAG-NEXT: s_endpgm
2672 ;
2673 ; GFX11-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2674 ; GFX11-GISEL: ; %bb.0:
2675 ; GFX11-GISEL-NEXT: s_clause 0x1
2676 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2677 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2678 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2679 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2680 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2681 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2682 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2683 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2684 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2685 ; GFX11-GISEL-NEXT: s_nop 0
2686 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2687 ; GFX11-GISEL-NEXT: s_endpgm
2688 ;
2689 ; GFX12-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2690 ; GFX12-SDAG: ; %bb.0:
2691 ; GFX12-SDAG-NEXT: s_clause 0x1
2692 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2693 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2694 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2695 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2696 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2697 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2698 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2699 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2700 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2701 ; GFX12-SDAG-NEXT: s_nop 0
2702 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2703 ; GFX12-SDAG-NEXT: s_endpgm
2704 ;
2705 ; GFX12-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
2706 ; GFX12-GISEL: ; %bb.0:
2707 ; GFX12-GISEL-NEXT: s_clause 0x1
2708 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2709 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2710 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2711 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2712 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2713 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2714 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
2715 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
2716 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2717 ; GFX12-GISEL-NEXT: s_nop 0
2718 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2719 ; GFX12-GISEL-NEXT: s_endpgm
2720 %v = call double @llvm.amdgcn.permlane16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 true, i1 true)
2721 store double %v, ptr addrspace(1) %out
2722 ret void
2723 }
2725 define amdgpu_kernel void @v_permlanex16_b32_vss_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
2726 ; GFX10-LABEL: v_permlanex16_b32_vss_i32:
2727 ; GFX10: ; %bb.0:
2728 ; GFX10-NEXT: s_clause 0x1
2729 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2730 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2731 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2732 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2733 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2734 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2735 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2736 ; GFX10-NEXT: s_endpgm
2737 ;
2738 ; GFX11-LABEL: v_permlanex16_b32_vss_i32:
2739 ; GFX11: ; %bb.0:
2740 ; GFX11-NEXT: s_clause 0x1
2741 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2742 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2743 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2744 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2745 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2746 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2747 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2748 ; GFX11-NEXT: s_nop 0
2749 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2750 ; GFX11-NEXT: s_endpgm
2751 ;
2752 ; GFX12-LABEL: v_permlanex16_b32_vss_i32:
2753 ; GFX12: ; %bb.0:
2754 ; GFX12-NEXT: s_clause 0x1
2755 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2756 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2757 ; GFX12-NEXT: s_wait_kmcnt 0x0
2758 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2759 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2760 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2761 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2762 ; GFX12-NEXT: s_nop 0
2763 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2764 ; GFX12-NEXT: s_endpgm
2765 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
2766 store i32 %v, ptr addrspace(1) %out
2767 ret void
2768 }
2770 define amdgpu_kernel void @v_permlanex16_b32_vss_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
2771 ; GFX10-LABEL: v_permlanex16_b32_vss_f32:
2772 ; GFX10: ; %bb.0:
2773 ; GFX10-NEXT: s_clause 0x1
2774 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2775 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
2776 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
2777 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
2778 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
2779 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2780 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
2781 ; GFX10-NEXT: s_endpgm
2782 ;
2783 ; GFX11-LABEL: v_permlanex16_b32_vss_f32:
2784 ; GFX11: ; %bb.0:
2785 ; GFX11-NEXT: s_clause 0x1
2786 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2787 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
2788 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
2789 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2790 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
2791 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2792 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
2793 ; GFX11-NEXT: s_nop 0
2794 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2795 ; GFX11-NEXT: s_endpgm
2796 ;
2797 ; GFX12-LABEL: v_permlanex16_b32_vss_f32:
2798 ; GFX12: ; %bb.0:
2799 ; GFX12-NEXT: s_clause 0x1
2800 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2801 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
2802 ; GFX12-NEXT: s_wait_kmcnt 0x0
2803 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
2804 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
2805 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0
2806 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
2807 ; GFX12-NEXT: s_nop 0
2808 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2809 ; GFX12-NEXT: s_endpgm
2810 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 false, i1 false)
2811 store float %v, ptr addrspace(1) %out
2812 ret void
2813 }
2815 define amdgpu_kernel void @v_permlanex16_b32_vss_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
2816 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_i64:
2817 ; GFX10-SDAG: ; %bb.0:
2818 ; GFX10-SDAG-NEXT: s_clause 0x1
2819 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2820 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2821 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2822 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2823 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2824 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2825 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2826 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2827 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2828 ; GFX10-SDAG-NEXT: s_endpgm
2829 ;
2830 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_i64:
2831 ; GFX10-GISEL: ; %bb.0:
2832 ; GFX10-GISEL-NEXT: s_clause 0x1
2833 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2834 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2835 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2836 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2837 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2838 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2839 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2840 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2841 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2842 ; GFX10-GISEL-NEXT: s_endpgm
2843 ;
2844 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_i64:
2845 ; GFX11-SDAG: ; %bb.0:
2846 ; GFX11-SDAG-NEXT: s_clause 0x1
2847 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2848 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2849 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2850 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2851 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2852 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2853 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2854 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2855 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2856 ; GFX11-SDAG-NEXT: s_nop 0
2857 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2858 ; GFX11-SDAG-NEXT: s_endpgm
2859 ;
2860 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_i64:
2861 ; GFX11-GISEL: ; %bb.0:
2862 ; GFX11-GISEL-NEXT: s_clause 0x1
2863 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2864 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2865 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2866 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2867 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2868 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2869 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2870 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2871 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2872 ; GFX11-GISEL-NEXT: s_nop 0
2873 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2874 ; GFX11-GISEL-NEXT: s_endpgm
2875 ;
2876 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_i64:
2877 ; GFX12-SDAG: ; %bb.0:
2878 ; GFX12-SDAG-NEXT: s_clause 0x1
2879 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2880 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2881 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2882 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2883 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2884 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2885 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2886 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2887 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2888 ; GFX12-SDAG-NEXT: s_nop 0
2889 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2890 ; GFX12-SDAG-NEXT: s_endpgm
2891 ;
2892 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_i64:
2893 ; GFX12-GISEL: ; %bb.0:
2894 ; GFX12-GISEL-NEXT: s_clause 0x1
2895 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2896 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2897 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2898 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2899 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2900 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2901 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2902 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2903 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2904 ; GFX12-GISEL-NEXT: s_nop 0
2905 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2906 ; GFX12-GISEL-NEXT: s_endpgm
2907 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
2908 store i64 %v, ptr addrspace(1) %out
2909 ret void
2910 }
2912 define amdgpu_kernel void @v_permlanex16_b32_vss_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
2913 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_f64:
2914 ; GFX10-SDAG: ; %bb.0:
2915 ; GFX10-SDAG-NEXT: s_clause 0x1
2916 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2917 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2918 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
2919 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2920 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
2921 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
2922 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2923 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2924 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2925 ; GFX10-SDAG-NEXT: s_endpgm
2926 ;
2927 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_f64:
2928 ; GFX10-GISEL: ; %bb.0:
2929 ; GFX10-GISEL-NEXT: s_clause 0x1
2930 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
2931 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
2932 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
2933 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2934 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
2935 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
2936 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2937 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2938 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
2939 ; GFX10-GISEL-NEXT: s_endpgm
2940 ;
2941 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_f64:
2942 ; GFX11-SDAG: ; %bb.0:
2943 ; GFX11-SDAG-NEXT: s_clause 0x1
2944 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2945 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2946 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
2947 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2948 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
2949 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2950 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2951 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2952 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2953 ; GFX11-SDAG-NEXT: s_nop 0
2954 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2955 ; GFX11-SDAG-NEXT: s_endpgm
2956 ;
2957 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_f64:
2958 ; GFX11-GISEL: ; %bb.0:
2959 ; GFX11-GISEL-NEXT: s_clause 0x1
2960 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2961 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2962 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
2963 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
2964 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2965 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2966 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2967 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2968 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2969 ; GFX11-GISEL-NEXT: s_nop 0
2970 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2971 ; GFX11-GISEL-NEXT: s_endpgm
2972 ;
2973 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_f64:
2974 ; GFX12-SDAG: ; %bb.0:
2975 ; GFX12-SDAG-NEXT: s_clause 0x1
2976 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2977 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2978 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
2979 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
2980 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
2981 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
2982 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
2983 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2984 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
2985 ; GFX12-SDAG-NEXT: s_nop 0
2986 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
2987 ; GFX12-SDAG-NEXT: s_endpgm
2988 ;
2989 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_f64:
2990 ; GFX12-GISEL: ; %bb.0:
2991 ; GFX12-GISEL-NEXT: s_clause 0x1
2992 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
2993 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
2994 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
2995 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
2996 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
2997 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2998 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
2999 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
3000 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
3001 ; GFX12-GISEL-NEXT: s_nop 0
3002 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3003 ; GFX12-GISEL-NEXT: s_endpgm
3004 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 false, i1 false)
3005 store double %v, ptr addrspace(1) %out
3006 ret void
3007 }
3009 define amdgpu_kernel void @v_permlanex16_b32_vii_i32(ptr addrspace(1) %out, i32 %src0) {
3010 ; GFX10-LABEL: v_permlanex16_b32_vii_i32:
3011 ; GFX10: ; %bb.0:
3012 ; GFX10-NEXT: s_clause 0x1
3013 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3014 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3015 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3016 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3017 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3018 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3019 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3020 ; GFX10-NEXT: s_endpgm
3021 ;
3022 ; GFX11-LABEL: v_permlanex16_b32_vii_i32:
3023 ; GFX11: ; %bb.0:
3024 ; GFX11-NEXT: s_clause 0x1
3025 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
3026 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3027 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3028 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
3029 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
3030 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3031 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
3032 ; GFX11-NEXT: s_nop 0
3033 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3034 ; GFX11-NEXT: s_endpgm
3035 ;
3036 ; GFX12-LABEL: v_permlanex16_b32_vii_i32:
3037 ; GFX12: ; %bb.0:
3038 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3039 ; GFX12-NEXT: s_wait_kmcnt 0x0
3040 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
3041 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
3042 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3043 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
3044 ; GFX12-NEXT: s_nop 0
3045 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3046 ; GFX12-NEXT: s_endpgm
3047 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 1, i32 2, i1 false, i1 false)
3048 store i32 %v, ptr addrspace(1) %out
3049 ret void
3050 }
3052 define amdgpu_kernel void @v_permlanex16_b32_vii_f32(ptr addrspace(1) %out, float %src0) {
3053 ; GFX10-LABEL: v_permlanex16_b32_vii_f32:
3054 ; GFX10: ; %bb.0:
3055 ; GFX10-NEXT: s_clause 0x1
3056 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3057 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3058 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3059 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3060 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3061 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3062 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3063 ; GFX10-NEXT: s_endpgm
3064 ;
3065 ; GFX11-LABEL: v_permlanex16_b32_vii_f32:
3066 ; GFX11: ; %bb.0:
3067 ; GFX11-NEXT: s_clause 0x1
3068 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
3069 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3070 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3071 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
3072 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
3073 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3074 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
3075 ; GFX11-NEXT: s_nop 0
3076 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3077 ; GFX11-NEXT: s_endpgm
3078 ;
3079 ; GFX12-LABEL: v_permlanex16_b32_vii_f32:
3080 ; GFX12: ; %bb.0:
3081 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3082 ; GFX12-NEXT: s_wait_kmcnt 0x0
3083 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
3084 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
3085 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3086 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
3087 ; GFX12-NEXT: s_nop 0
3088 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3089 ; GFX12-NEXT: s_endpgm
3090 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 1, i32 2, i1 false, i1 false)
3091 store float %v, ptr addrspace(1) %out
3092 ret void
3093 }
3095 define amdgpu_kernel void @v_permlanex16_b32_vii_i64(ptr addrspace(1) %out, i64 %src0) {
3096 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vii_i64:
3097 ; GFX10-SDAG: ; %bb.0:
3098 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3099 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3100 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3101 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3102 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3103 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3104 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3105 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3106 ; GFX10-SDAG-NEXT: s_endpgm
3107 ;
3108 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_i64:
3109 ; GFX10-GISEL: ; %bb.0:
3110 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3111 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3112 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3113 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3114 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3115 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3116 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3117 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3118 ; GFX10-GISEL-NEXT: s_endpgm
3119 ;
3120 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vii_i64:
3121 ; GFX11-SDAG: ; %bb.0:
3122 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3123 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3124 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3125 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
3126 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
3127 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3128 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3129 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3130 ; GFX11-SDAG-NEXT: s_nop 0
3131 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3132 ; GFX11-SDAG-NEXT: s_endpgm
3133 ;
3134 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vii_i64:
3135 ; GFX11-GISEL: ; %bb.0:
3136 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3137 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
3138 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3139 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3140 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
3141 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3142 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3143 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3144 ; GFX11-GISEL-NEXT: s_nop 0
3145 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3146 ; GFX11-GISEL-NEXT: s_endpgm
3147 ;
3148 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vii_i64:
3149 ; GFX12-SDAG: ; %bb.0:
3150 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3151 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3152 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3153 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
3154 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
3155 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3156 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3157 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3158 ; GFX12-SDAG-NEXT: s_nop 0
3159 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3160 ; GFX12-SDAG-NEXT: s_endpgm
3161 ;
3162 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vii_i64:
3163 ; GFX12-GISEL: ; %bb.0:
3164 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3165 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
3166 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3167 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3168 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
3169 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3170 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3171 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3172 ; GFX12-GISEL-NEXT: s_nop 0
3173 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3174 ; GFX12-GISEL-NEXT: s_endpgm
3175 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 1, i32 2, i1 false, i1 false)
3176 store i64 %v, ptr addrspace(1) %out
3177 ret void
3178 }
3180 define amdgpu_kernel void @v_permlanex16_b32_vii_f64(ptr addrspace(1) %out, double %src0) {
3181 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vii_f64:
3182 ; GFX10-SDAG: ; %bb.0:
3183 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3184 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3185 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3186 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3187 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3188 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3189 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3190 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3191 ; GFX10-SDAG-NEXT: s_endpgm
3192 ;
3193 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_f64:
3194 ; GFX10-GISEL: ; %bb.0:
3195 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3196 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3197 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3198 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3199 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3200 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3201 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3202 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3203 ; GFX10-GISEL-NEXT: s_endpgm
3204 ;
3205 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vii_f64:
3206 ; GFX11-SDAG: ; %bb.0:
3207 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3208 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3209 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3210 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
3211 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
3212 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3213 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3214 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3215 ; GFX11-SDAG-NEXT: s_nop 0
3216 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3217 ; GFX11-SDAG-NEXT: s_endpgm
3218 ;
3219 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vii_f64:
3220 ; GFX11-GISEL: ; %bb.0:
3221 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3222 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
3223 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3224 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3225 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
3226 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3227 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3228 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3229 ; GFX11-GISEL-NEXT: s_nop 0
3230 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3231 ; GFX11-GISEL-NEXT: s_endpgm
3232 ;
3233 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vii_f64:
3234 ; GFX12-SDAG: ; %bb.0:
3235 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3236 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3237 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3238 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
3239 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
3240 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3241 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3242 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3243 ; GFX12-SDAG-NEXT: s_nop 0
3244 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3245 ; GFX12-SDAG-NEXT: s_endpgm
3246 ;
3247 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vii_f64:
3248 ; GFX12-GISEL: ; %bb.0:
3249 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3250 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
3251 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3252 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3253 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
3254 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
3255 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
3256 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3257 ; GFX12-GISEL-NEXT: s_nop 0
3258 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3259 ; GFX12-GISEL-NEXT: s_endpgm
3260 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 1, i32 2, i1 false, i1 false)
3261 store double %v, ptr addrspace(1) %out
3262 ret void
3263 }
3265 ; FIXME-GFX10PLUS: It is allowed to have both immediates as literals
3266 define amdgpu_kernel void @v_permlanex16_b32_vll_i32(ptr addrspace(1) %out, i32 %src0) {
3267 ; GFX10-LABEL: v_permlanex16_b32_vll_i32:
3268 ; GFX10: ; %bb.0:
3269 ; GFX10-NEXT: s_clause 0x1
3270 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3271 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3272 ; GFX10-NEXT: s_movk_i32 s2, 0x1234
3273 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3274 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3275 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3276 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3277 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3278 ; GFX10-NEXT: s_endpgm
3279 ;
3280 ; GFX11-LABEL: v_permlanex16_b32_vll_i32:
3281 ; GFX11: ; %bb.0:
3282 ; GFX11-NEXT: s_clause 0x1
3283 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
3284 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3285 ; GFX11-NEXT: s_movk_i32 s2, 0x1234
3286 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3287 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
3288 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
3289 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3290 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
3291 ; GFX11-NEXT: s_nop 0
3292 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3293 ; GFX11-NEXT: s_endpgm
3294 ;
3295 ; GFX12-LABEL: v_permlanex16_b32_vll_i32:
3296 ; GFX12: ; %bb.0:
3297 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3298 ; GFX12-NEXT: s_wait_kmcnt 0x0
3299 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
3300 ; GFX12-NEXT: s_movk_i32 s2, 0x1234
3301 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3302 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3303 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
3304 ; GFX12-NEXT: s_nop 0
3305 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3306 ; GFX12-NEXT: s_endpgm
3307 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 4660, i32 49617, i1 false, i1 false)
3308 store i32 %v, ptr addrspace(1) %out
3309 ret void
3310 }
3312 define amdgpu_kernel void @v_permlanex16_b32_vll_f32(ptr addrspace(1) %out, float %src0) {
3313 ; GFX10-LABEL: v_permlanex16_b32_vll_f32:
3314 ; GFX10: ; %bb.0:
3315 ; GFX10-NEXT: s_clause 0x1
3316 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3317 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3318 ; GFX10-NEXT: s_movk_i32 s2, 0x1234
3319 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3320 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3321 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3322 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3323 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3324 ; GFX10-NEXT: s_endpgm
3325 ;
3326 ; GFX11-LABEL: v_permlanex16_b32_vll_f32:
3327 ; GFX11: ; %bb.0:
3328 ; GFX11-NEXT: s_clause 0x1
3329 ; GFX11-NEXT: s_load_b32 s4, s[2:3], 0x2c
3330 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3331 ; GFX11-NEXT: s_movk_i32 s2, 0x1234
3332 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3333 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s4
3334 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
3335 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3336 ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
3337 ; GFX11-NEXT: s_nop 0
3338 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3339 ; GFX11-NEXT: s_endpgm
3340 ;
3341 ; GFX12-LABEL: v_permlanex16_b32_vll_f32:
3342 ; GFX12: ; %bb.0:
3343 ; GFX12-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3344 ; GFX12-NEXT: s_wait_kmcnt 0x0
3345 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
3346 ; GFX12-NEXT: s_movk_i32 s2, 0x1234
3347 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3348 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3349 ; GFX12-NEXT: global_store_b32 v1, v0, s[0:1]
3350 ; GFX12-NEXT: s_nop 0
3351 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3352 ; GFX12-NEXT: s_endpgm
3353 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 4660, i32 49617, i1 false, i1 false)
3354 store float %v, ptr addrspace(1) %out
3355 ret void
3356 }
3358 define amdgpu_kernel void @v_permlanex16_b32_vll_i64(ptr addrspace(1) %out, i64 %src0) {
3359 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vll_i64:
3360 ; GFX10-SDAG: ; %bb.0:
3361 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3362 ; GFX10-SDAG-NEXT: s_movk_i32 s0, 0x1234
3363 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3364 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3365 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3366 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3367 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, 0xc1d1
3368 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, 0xc1d1
3369 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3370 ; GFX10-SDAG-NEXT: s_endpgm
3371 ;
3372 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_i64:
3373 ; GFX10-GISEL: ; %bb.0:
3374 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3375 ; GFX10-GISEL-NEXT: s_movk_i32 s0, 0x1234
3376 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3377 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3378 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3379 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3380 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, 0xc1d1
3381 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, 0xc1d1
3382 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3383 ; GFX10-GISEL-NEXT: s_endpgm
3384 ;
3385 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vll_i64:
3386 ; GFX11-SDAG: ; %bb.0:
3387 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3388 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3389 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3390 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
3391 ; GFX11-SDAG-NEXT: s_movk_i32 s2, 0x1234
3392 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
3393 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3394 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3395 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3396 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3397 ; GFX11-SDAG-NEXT: s_nop 0
3398 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3399 ; GFX11-SDAG-NEXT: s_endpgm
3400 ;
3401 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vll_i64:
3402 ; GFX11-GISEL: ; %bb.0:
3403 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3404 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
3405 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3406 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3407 ; GFX11-GISEL-NEXT: s_movk_i32 s2, 0x1234
3408 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3409 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3410 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
3411 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3412 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3413 ; GFX11-GISEL-NEXT: s_nop 0
3414 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3415 ; GFX11-GISEL-NEXT: s_endpgm
3416 ;
3417 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vll_i64:
3418 ; GFX12-SDAG: ; %bb.0:
3419 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3420 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3421 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3422 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
3423 ; GFX12-SDAG-NEXT: s_movk_i32 s2, 0x1234
3424 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
3425 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3426 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3427 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3428 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3429 ; GFX12-SDAG-NEXT: s_nop 0
3430 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3431 ; GFX12-SDAG-NEXT: s_endpgm
3432 ;
3433 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vll_i64:
3434 ; GFX12-GISEL: ; %bb.0:
3435 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3436 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
3437 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3438 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3439 ; GFX12-GISEL-NEXT: s_movk_i32 s2, 0x1234
3440 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3441 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3442 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
3443 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3444 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3445 ; GFX12-GISEL-NEXT: s_nop 0
3446 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3447 ; GFX12-GISEL-NEXT: s_endpgm
3448 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 4660, i32 49617, i1 false, i1 false)
3449 store i64 %v, ptr addrspace(1) %out
3450 ret void
3451 }
3453 define amdgpu_kernel void @v_permlanex16_b32_vll_f64(ptr addrspace(1) %out, double %src0) {
3454 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vll_f64:
3455 ; GFX10-SDAG: ; %bb.0:
3456 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3457 ; GFX10-SDAG-NEXT: s_movk_i32 s0, 0x1234
3458 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3459 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3460 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3461 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3462 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, 0xc1d1
3463 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, 0xc1d1
3464 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3465 ; GFX10-SDAG-NEXT: s_endpgm
3466 ;
3467 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_f64:
3468 ; GFX10-GISEL: ; %bb.0:
3469 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3470 ; GFX10-GISEL-NEXT: s_movk_i32 s0, 0x1234
3471 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3472 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3473 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3474 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3475 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, 0xc1d1
3476 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, 0xc1d1
3477 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3478 ; GFX10-GISEL-NEXT: s_endpgm
3479 ;
3480 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vll_f64:
3481 ; GFX11-SDAG: ; %bb.0:
3482 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3483 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3484 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3485 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
3486 ; GFX11-SDAG-NEXT: s_movk_i32 s2, 0x1234
3487 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
3488 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3489 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3490 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3491 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3492 ; GFX11-SDAG-NEXT: s_nop 0
3493 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3494 ; GFX11-SDAG-NEXT: s_endpgm
3495 ;
3496 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vll_f64:
3497 ; GFX11-GISEL: ; %bb.0:
3498 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3499 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
3500 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3501 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3502 ; GFX11-GISEL-NEXT: s_movk_i32 s2, 0x1234
3503 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3504 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3505 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
3506 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3507 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3508 ; GFX11-GISEL-NEXT: s_nop 0
3509 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3510 ; GFX11-GISEL-NEXT: s_endpgm
3511 ;
3512 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vll_f64:
3513 ; GFX12-SDAG: ; %bb.0:
3514 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3515 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3516 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
3517 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
3518 ; GFX12-SDAG-NEXT: s_movk_i32 s2, 0x1234
3519 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
3520 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3521 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3522 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3523 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3524 ; GFX12-SDAG-NEXT: s_nop 0
3525 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3526 ; GFX12-SDAG-NEXT: s_endpgm
3527 ;
3528 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vll_f64:
3529 ; GFX12-GISEL: ; %bb.0:
3530 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3531 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
3532 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3533 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
3534 ; GFX12-GISEL-NEXT: s_movk_i32 s2, 0x1234
3535 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
3536 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
3537 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
3538 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
3539 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3540 ; GFX12-GISEL-NEXT: s_nop 0
3541 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3542 ; GFX12-GISEL-NEXT: s_endpgm
3543 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 4660, i32 49617, i1 false, i1 false)
3544 store double %v, ptr addrspace(1) %out
3545 ret void
3546 }
3548 define amdgpu_kernel void @v_permlanex16_b32_vvv_i32(ptr addrspace(1) %out, i32 %src0) {
3549 ; GFX10-LABEL: v_permlanex16_b32_vvv_i32:
3550 ; GFX10: ; %bb.0:
3551 ; GFX10-NEXT: s_clause 0x1
3552 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3553 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3554 ; GFX10-NEXT: s_mov_b32 null, 0
3555 ; GFX10-NEXT: v_readfirstlane_b32 s2, v0
3556 ; GFX10-NEXT: v_readfirstlane_b32 s3, v1
3557 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3558 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3559 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3560 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, s3
3561 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3562 ; GFX10-NEXT: s_endpgm
3563 ;
3564 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
3565 ; GFX11-SDAG: ; %bb.0:
3566 ; GFX11-SDAG-NEXT: s_clause 0x1
3567 ; GFX11-SDAG-NEXT: s_load_b32 s4, s[2:3], 0x2c
3568 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3569 ; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3570 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
3571 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
3572 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v0
3573 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
3574 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v1
3575 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3576 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s4
3577 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
3578 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
3579 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3580 ; GFX11-SDAG-NEXT: s_nop 0
3581 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3582 ; GFX11-SDAG-NEXT: s_endpgm
3583 ;
3584 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vvv_i32:
3585 ; GFX11-GISEL: ; %bb.0:
3586 ; GFX11-GISEL-NEXT: s_clause 0x1
3587 ; GFX11-GISEL-NEXT: s_load_b32 s4, s[2:3], 0x2c
3588 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3589 ; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3590 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
3591 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3592 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s3, v0
3593 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3594 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s4
3595 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s2, v1
3596 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
3597 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, s3
3598 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3599 ; GFX11-GISEL-NEXT: s_nop 0
3600 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3601 ; GFX11-GISEL-NEXT: s_endpgm
3602 ;
3603 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
3604 ; GFX12-SDAG: ; %bb.0:
3605 ; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3606 ; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3607 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
3608 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
3609 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s3, v1
3610 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3611 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
3612 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
3613 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
3614 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3615 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
3616 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3617 ; GFX12-SDAG-NEXT: s_nop 0
3618 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3619 ; GFX12-SDAG-NEXT: s_endpgm
3620 ;
3621 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vvv_i32:
3622 ; GFX12-GISEL: ; %bb.0:
3623 ; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3624 ; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3625 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
3626 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3627 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
3628 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3629 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
3630 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
3631 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
3632 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
3633 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3634 ; GFX12-GISEL-NEXT: s_nop 0
3635 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3636 ; GFX12-GISEL-NEXT: s_endpgm
3637 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
3638 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
3639 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
3640 store i32 %v, ptr addrspace(1) %out
3641 ret void
3642 }
3644 define amdgpu_kernel void @v_permlanex16_b32_vvv_f32(ptr addrspace(1) %out, float %src0) {
3645 ; GFX10-LABEL: v_permlanex16_b32_vvv_f32:
3646 ; GFX10: ; %bb.0:
3647 ; GFX10-NEXT: s_clause 0x1
3648 ; GFX10-NEXT: s_load_dword s4, s[2:3], 0x2c
3649 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
3650 ; GFX10-NEXT: s_mov_b32 null, 0
3651 ; GFX10-NEXT: v_readfirstlane_b32 s2, v0
3652 ; GFX10-NEXT: v_readfirstlane_b32 s3, v1
3653 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
3654 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
3655 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
3656 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, s3
3657 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
3658 ; GFX10-NEXT: s_endpgm
3659 ;
3660 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_f32:
3661 ; GFX11-SDAG: ; %bb.0:
3662 ; GFX11-SDAG-NEXT: s_clause 0x1
3663 ; GFX11-SDAG-NEXT: s_load_b32 s4, s[2:3], 0x2c
3664 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3665 ; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3666 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
3667 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
3668 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v0
3669 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
3670 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v1
3671 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3672 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s4
3673 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
3674 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
3675 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3676 ; GFX11-SDAG-NEXT: s_nop 0
3677 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3678 ; GFX11-SDAG-NEXT: s_endpgm
3679 ;
3680 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vvv_f32:
3681 ; GFX11-GISEL: ; %bb.0:
3682 ; GFX11-GISEL-NEXT: s_clause 0x1
3683 ; GFX11-GISEL-NEXT: s_load_b32 s4, s[2:3], 0x2c
3684 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x24
3685 ; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3686 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
3687 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3688 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s3, v0
3689 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3690 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s4
3691 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s2, v1
3692 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
3693 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, s3
3694 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3695 ; GFX11-GISEL-NEXT: s_nop 0
3696 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3697 ; GFX11-GISEL-NEXT: s_endpgm
3698 ;
3699 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vvv_f32:
3700 ; GFX12-SDAG: ; %bb.0:
3701 ; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3702 ; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3703 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
3704 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
3705 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s3, v1
3706 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3707 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
3708 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
3709 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
3710 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
3711 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
3712 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3713 ; GFX12-SDAG-NEXT: s_nop 0
3714 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3715 ; GFX12-SDAG-NEXT: s_endpgm
3716 ;
3717 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vvv_f32:
3718 ; GFX12-GISEL: ; %bb.0:
3719 ; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[2:3], 0x24
3720 ; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3721 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
3722 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3723 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
3724 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3725 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
3726 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
3727 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
3728 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
3729 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3730 ; GFX12-GISEL-NEXT: s_nop 0
3731 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3732 ; GFX12-GISEL-NEXT: s_endpgm
3733 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
3734 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
3735 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
3736 store float %v, ptr addrspace(1) %out
3737 ret void
3738 }
3740 define amdgpu_kernel void @v_permlanex16_b32_vvv_i64(ptr addrspace(1) %out, i64 %src0) {
3741 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_i64:
3742 ; GFX10-SDAG: ; %bb.0:
3743 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3744 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
3745 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
3746 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3747 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3748 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3749 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3750 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
3751 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
3752 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3753 ; GFX10-SDAG-NEXT: s_endpgm
3754 ;
3755 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_i64:
3756 ; GFX10-GISEL: ; %bb.0:
3757 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3758 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
3759 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
3760 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3761 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3762 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3763 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3764 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
3765 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
3766 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3767 ; GFX10-GISEL-NEXT: s_endpgm
3768 ;
3769 ; GFX11-LABEL: v_permlanex16_b32_vvv_i64:
3770 ; GFX11: ; %bb.0:
3771 ; GFX11-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3772 ; GFX11-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3773 ; GFX11-NEXT: v_bfe_u32 v0, v0, 10, 10
3774 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
3775 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3776 ; GFX11-NEXT: v_readfirstlane_b32 s5, v0
3777 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3778 ; GFX11-NEXT: v_mov_b32_e32 v0, s2
3779 ; GFX11-NEXT: v_readfirstlane_b32 s4, v1
3780 ; GFX11-NEXT: v_mov_b32_e32 v1, s3
3781 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s4, s5
3782 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
3783 ; GFX11-NEXT: v_permlanex16_b32 v1, v1, s4, s5
3784 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3785 ; GFX11-NEXT: s_nop 0
3786 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3787 ; GFX11-NEXT: s_endpgm
3788 ;
3789 ; GFX12-LABEL: v_permlanex16_b32_vvv_i64:
3790 ; GFX12: ; %bb.0:
3791 ; GFX12-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3792 ; GFX12-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3793 ; GFX12-NEXT: v_bfe_u32 v0, v0, 10, 10
3794 ; GFX12-NEXT: v_mov_b32_e32 v2, 0
3795 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3796 ; GFX12-NEXT: v_readfirstlane_b32 s5, v0
3797 ; GFX12-NEXT: s_wait_kmcnt 0x0
3798 ; GFX12-NEXT: v_mov_b32_e32 v0, s2
3799 ; GFX12-NEXT: v_readfirstlane_b32 s4, v1
3800 ; GFX12-NEXT: v_mov_b32_e32 v1, s3
3801 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s4, s5
3802 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
3803 ; GFX12-NEXT: v_permlanex16_b32 v1, v1, s4, s5
3804 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3805 ; GFX12-NEXT: s_nop 0
3806 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3807 ; GFX12-NEXT: s_endpgm
3808 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
3809 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
3810 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
3811 store i64 %v, ptr addrspace(1) %out
3812 ret void
3813 }
3815 define amdgpu_kernel void @v_permlanex16_b32_vvv_f64(ptr addrspace(1) %out, double %src0) {
3816 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_f64:
3817 ; GFX10-SDAG: ; %bb.0:
3818 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3819 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
3820 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
3821 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
3822 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3823 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
3824 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
3825 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
3826 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
3827 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3828 ; GFX10-SDAG-NEXT: s_endpgm
3829 ;
3830 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_f64:
3831 ; GFX10-GISEL: ; %bb.0:
3832 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3833 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
3834 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
3835 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
3836 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3837 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3838 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
3839 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
3840 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
3841 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
3842 ; GFX10-GISEL-NEXT: s_endpgm
3843 ;
3844 ; GFX11-LABEL: v_permlanex16_b32_vvv_f64:
3845 ; GFX11: ; %bb.0:
3846 ; GFX11-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3847 ; GFX11-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3848 ; GFX11-NEXT: v_bfe_u32 v0, v0, 10, 10
3849 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
3850 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3851 ; GFX11-NEXT: v_readfirstlane_b32 s5, v0
3852 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
3853 ; GFX11-NEXT: v_mov_b32_e32 v0, s2
3854 ; GFX11-NEXT: v_readfirstlane_b32 s4, v1
3855 ; GFX11-NEXT: v_mov_b32_e32 v1, s3
3856 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s4, s5
3857 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
3858 ; GFX11-NEXT: v_permlanex16_b32 v1, v1, s4, s5
3859 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3860 ; GFX11-NEXT: s_nop 0
3861 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3862 ; GFX11-NEXT: s_endpgm
3863 ;
3864 ; GFX12-LABEL: v_permlanex16_b32_vvv_f64:
3865 ; GFX12: ; %bb.0:
3866 ; GFX12-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3867 ; GFX12-NEXT: v_and_b32_e32 v1, 0x3ff, v0
3868 ; GFX12-NEXT: v_bfe_u32 v0, v0, 10, 10
3869 ; GFX12-NEXT: v_mov_b32_e32 v2, 0
3870 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
3871 ; GFX12-NEXT: v_readfirstlane_b32 s5, v0
3872 ; GFX12-NEXT: s_wait_kmcnt 0x0
3873 ; GFX12-NEXT: v_mov_b32_e32 v0, s2
3874 ; GFX12-NEXT: v_readfirstlane_b32 s4, v1
3875 ; GFX12-NEXT: v_mov_b32_e32 v1, s3
3876 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s4, s5
3877 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
3878 ; GFX12-NEXT: v_permlanex16_b32 v1, v1, s4, s5
3879 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
3880 ; GFX12-NEXT: s_nop 0
3881 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3882 ; GFX12-NEXT: s_endpgm
3883 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
3884 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
3885 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %tidx, i32 %tidy, i1 false, i1 false)
3886 store double %v, ptr addrspace(1) %out
3887 ret void
3888 }
3890 define amdgpu_kernel void @v_permlanex16_b32_vvs_i32(ptr addrspace(1) %out, i32 %src0, i32 %src2) {
3891 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
3892 ; GFX10-SDAG: ; %bb.0:
3893 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3894 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
3895 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
3896 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3897 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s6
3898 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s7
3899 ; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[4:5]
3900 ; GFX10-SDAG-NEXT: s_endpgm
3901 ;
3902 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
3903 ; GFX10-GISEL: ; %bb.0:
3904 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3905 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
3906 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
3907 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3908 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3909 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s7
3910 ; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[4:5]
3911 ; GFX10-GISEL-NEXT: s_endpgm
3912 ;
3913 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
3914 ; GFX11-SDAG: ; %bb.0:
3915 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3916 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3917 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
3918 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
3919 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
3920 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
3921 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
3922 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3923 ; GFX11-SDAG-NEXT: s_nop 0
3924 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3925 ; GFX11-SDAG-NEXT: s_endpgm
3926 ;
3927 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
3928 ; GFX11-GISEL: ; %bb.0:
3929 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3930 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
3931 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
3932 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
3933 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3934 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
3935 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
3936 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3937 ; GFX11-GISEL-NEXT: s_nop 0
3938 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3939 ; GFX11-GISEL-NEXT: s_endpgm
3940 ;
3941 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
3942 ; GFX12-SDAG: ; %bb.0:
3943 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3944 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
3945 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
3946 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
3947 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
3948 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
3949 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
3950 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
3951 ; GFX12-SDAG-NEXT: s_nop 0
3952 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3953 ; GFX12-SDAG-NEXT: s_endpgm
3954 ;
3955 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
3956 ; GFX12-GISEL: ; %bb.0:
3957 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
3958 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
3959 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
3960 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
3961 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
3962 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
3963 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
3964 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
3965 ; GFX12-GISEL-NEXT: s_nop 0
3966 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
3967 ; GFX12-GISEL-NEXT: s_endpgm
3968 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
3969 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
3970 store i32 %v, ptr addrspace(1) %out
3971 ret void
3972 }
3974 define amdgpu_kernel void @v_permlanex16_b32_vvs_f32(ptr addrspace(1) %out, float %src0, i32 %src2) {
3975 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
3976 ; GFX10-SDAG: ; %bb.0:
3977 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3978 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
3979 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
3980 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
3981 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s6
3982 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s7
3983 ; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[4:5]
3984 ; GFX10-SDAG-NEXT: s_endpgm
3985 ;
3986 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
3987 ; GFX10-GISEL: ; %bb.0:
3988 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
3989 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
3990 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
3991 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
3992 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
3993 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s7
3994 ; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[4:5]
3995 ; GFX10-GISEL-NEXT: s_endpgm
3996 ;
3997 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
3998 ; GFX11-SDAG: ; %bb.0:
3999 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4000 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4001 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
4002 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4003 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4004 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
4005 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
4006 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4007 ; GFX11-SDAG-NEXT: s_nop 0
4008 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4009 ; GFX11-SDAG-NEXT: s_endpgm
4010 ;
4011 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
4012 ; GFX11-GISEL: ; %bb.0:
4013 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4014 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
4015 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4016 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4017 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4018 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
4019 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
4020 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4021 ; GFX11-GISEL-NEXT: s_nop 0
4022 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4023 ; GFX11-GISEL-NEXT: s_endpgm
4024 ;
4025 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
4026 ; GFX12-SDAG: ; %bb.0:
4027 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4028 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4029 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
4030 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4031 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4032 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
4033 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
4034 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4035 ; GFX12-SDAG-NEXT: s_nop 0
4036 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4037 ; GFX12-SDAG-NEXT: s_endpgm
4038 ;
4039 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
4040 ; GFX12-GISEL: ; %bb.0:
4041 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4042 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
4043 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4044 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4045 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4046 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
4047 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
4048 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4049 ; GFX12-GISEL-NEXT: s_nop 0
4050 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4051 ; GFX12-GISEL-NEXT: s_endpgm
4052 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
4053 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
4054 store float %v, ptr addrspace(1) %out
4055 ret void
4056 }
4058 define amdgpu_kernel void @v_permlanex16_b32_vvs_i64(ptr addrspace(1) %out, i64 %src0, i32 %src2) {
4059 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_i64:
4060 ; GFX10-SDAG: ; %bb.0:
4061 ; GFX10-SDAG-NEXT: s_clause 0x1
4062 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4063 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
4064 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4065 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4066 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4067 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4068 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4069 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4070 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4071 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4072 ; GFX10-SDAG-NEXT: s_endpgm
4073 ;
4074 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i64:
4075 ; GFX10-GISEL: ; %bb.0:
4076 ; GFX10-GISEL-NEXT: s_clause 0x1
4077 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4078 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
4079 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4080 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4081 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4082 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4083 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4084 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4085 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4086 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4087 ; GFX10-GISEL-NEXT: s_endpgm
4088 ;
4089 ; GFX11-LABEL: v_permlanex16_b32_vvs_i64:
4090 ; GFX11: ; %bb.0:
4091 ; GFX11-NEXT: s_clause 0x1
4092 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4093 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4094 ; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
4095 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4096 ; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4097 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4098 ; GFX11-NEXT: v_readfirstlane_b32 s1, v0
4099 ; GFX11-NEXT: v_mov_b32_e32 v0, s6
4100 ; GFX11-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4101 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
4102 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4103 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4104 ; GFX11-NEXT: s_nop 0
4105 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4106 ; GFX11-NEXT: s_endpgm
4107 ;
4108 ; GFX12-LABEL: v_permlanex16_b32_vvs_i64:
4109 ; GFX12: ; %bb.0:
4110 ; GFX12-NEXT: s_clause 0x1
4111 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4112 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4113 ; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
4114 ; GFX12-NEXT: s_wait_kmcnt 0x0
4115 ; GFX12-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4116 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4117 ; GFX12-NEXT: v_readfirstlane_b32 s1, v0
4118 ; GFX12-NEXT: v_mov_b32_e32 v0, s6
4119 ; GFX12-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4120 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
4121 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4122 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4123 ; GFX12-NEXT: s_nop 0
4124 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4125 ; GFX12-NEXT: s_endpgm
4126 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
4127 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
4128 store i64 %v, ptr addrspace(1) %out
4129 ret void
4130 }
4132 define amdgpu_kernel void @v_permlanex16_b32_vvs_f64(ptr addrspace(1) %out, double %src0, i32 %src2) {
4133 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_f64:
4134 ; GFX10-SDAG: ; %bb.0:
4135 ; GFX10-SDAG-NEXT: s_clause 0x1
4136 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4137 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
4138 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4139 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4140 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4141 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4142 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4143 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4144 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4145 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4146 ; GFX10-SDAG-NEXT: s_endpgm
4147 ;
4148 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f64:
4149 ; GFX10-GISEL: ; %bb.0:
4150 ; GFX10-GISEL-NEXT: s_clause 0x1
4151 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4152 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
4153 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4154 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4155 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4156 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4157 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4158 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4159 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4160 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4161 ; GFX10-GISEL-NEXT: s_endpgm
4162 ;
4163 ; GFX11-LABEL: v_permlanex16_b32_vvs_f64:
4164 ; GFX11: ; %bb.0:
4165 ; GFX11-NEXT: s_clause 0x1
4166 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4167 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4168 ; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
4169 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4170 ; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4171 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4172 ; GFX11-NEXT: v_readfirstlane_b32 s1, v0
4173 ; GFX11-NEXT: v_mov_b32_e32 v0, s6
4174 ; GFX11-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4175 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
4176 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4177 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4178 ; GFX11-NEXT: s_nop 0
4179 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4180 ; GFX11-NEXT: s_endpgm
4181 ;
4182 ; GFX12-LABEL: v_permlanex16_b32_vvs_f64:
4183 ; GFX12: ; %bb.0:
4184 ; GFX12-NEXT: s_clause 0x1
4185 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4186 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4187 ; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
4188 ; GFX12-NEXT: s_wait_kmcnt 0x0
4189 ; GFX12-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4190 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4191 ; GFX12-NEXT: v_readfirstlane_b32 s1, v0
4192 ; GFX12-NEXT: v_mov_b32_e32 v0, s6
4193 ; GFX12-NEXT: v_permlanex16_b32 v1, v1, s1, s0
4194 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
4195 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s1, s0
4196 ; GFX12-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4197 ; GFX12-NEXT: s_nop 0
4198 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4199 ; GFX12-NEXT: s_endpgm
4200 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
4201 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %tidx, i32 %src2, i1 false, i1 false)
4202 store double %v, ptr addrspace(1) %out
4203 ret void
4204 }
4206 define amdgpu_kernel void @v_permlanex16_b32_vsv_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1) {
4207 ; GFX10-LABEL: v_permlanex16_b32_vsv_i32:
4208 ; GFX10: ; %bb.0:
4209 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4210 ; GFX10-NEXT: v_readfirstlane_b32 s0, v1
4211 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4212 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4213 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4214 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0
4215 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4216 ; GFX10-NEXT: s_endpgm
4217 ;
4218 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_i32:
4219 ; GFX11-SDAG: ; %bb.0:
4220 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4221 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4222 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4223 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
4224 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4225 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4226 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
4227 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
4228 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4229 ; GFX11-SDAG-NEXT: s_nop 0
4230 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4231 ; GFX11-SDAG-NEXT: s_endpgm
4232 ;
4233 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vsv_i32:
4234 ; GFX11-GISEL: ; %bb.0:
4235 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4236 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4237 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
4238 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4239 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4240 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4241 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
4242 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
4243 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4244 ; GFX11-GISEL-NEXT: s_nop 0
4245 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4246 ; GFX11-GISEL-NEXT: s_endpgm
4247 ;
4248 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vsv_i32:
4249 ; GFX12-SDAG: ; %bb.0:
4250 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4251 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4252 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4253 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
4254 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4255 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4256 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
4257 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
4258 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4259 ; GFX12-SDAG-NEXT: s_nop 0
4260 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4261 ; GFX12-SDAG-NEXT: s_endpgm
4262 ;
4263 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vsv_i32:
4264 ; GFX12-GISEL: ; %bb.0:
4265 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4266 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4267 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
4268 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4269 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4270 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4271 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
4272 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
4273 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4274 ; GFX12-GISEL-NEXT: s_nop 0
4275 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4276 ; GFX12-GISEL-NEXT: s_endpgm
4277 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
4278 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
4279 store i32 %v, ptr addrspace(1) %out
4280 ret void
4281 }
4283 define amdgpu_kernel void @v_permlanex16_b32_vsv_f32(ptr addrspace(1) %out, float %src0, i32 %src1) {
4284 ; GFX10-LABEL: v_permlanex16_b32_vsv_f32:
4285 ; GFX10: ; %bb.0:
4286 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4287 ; GFX10-NEXT: v_readfirstlane_b32 s0, v1
4288 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4289 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4290 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4291 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0
4292 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4293 ; GFX10-NEXT: s_endpgm
4294 ;
4295 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_f32:
4296 ; GFX11-SDAG: ; %bb.0:
4297 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4298 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4299 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4300 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
4301 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4302 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4303 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
4304 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
4305 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4306 ; GFX11-SDAG-NEXT: s_nop 0
4307 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4308 ; GFX11-SDAG-NEXT: s_endpgm
4309 ;
4310 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vsv_f32:
4311 ; GFX11-GISEL: ; %bb.0:
4312 ; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4313 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4314 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
4315 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4316 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4317 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4318 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s2
4319 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
4320 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4321 ; GFX11-GISEL-NEXT: s_nop 0
4322 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4323 ; GFX11-GISEL-NEXT: s_endpgm
4324 ;
4325 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vsv_f32:
4326 ; GFX12-SDAG: ; %bb.0:
4327 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4328 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4329 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4330 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
4331 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4332 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s2, v0
4333 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
4334 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
4335 ; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
4336 ; GFX12-SDAG-NEXT: s_nop 0
4337 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4338 ; GFX12-SDAG-NEXT: s_endpgm
4339 ;
4340 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vsv_f32:
4341 ; GFX12-GISEL: ; %bb.0:
4342 ; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
4343 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4344 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0
4345 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4346 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v0
4347 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4348 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
4349 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
4350 ; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
4351 ; GFX12-GISEL-NEXT: s_nop 0
4352 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4353 ; GFX12-GISEL-NEXT: s_endpgm
4354 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
4355 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
4356 store float %v, ptr addrspace(1) %out
4357 ret void
4358 }
4360 define amdgpu_kernel void @v_permlanex16_b32_vsv_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1) {
4361 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
4362 ; GFX10-SDAG: ; %bb.0:
4363 ; GFX10-SDAG-NEXT: s_clause 0x1
4364 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4365 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
4366 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
4367 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4368 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4369 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4370 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4371 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4372 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4373 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4374 ; GFX10-SDAG-NEXT: s_endpgm
4375 ;
4376 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
4377 ; GFX10-GISEL: ; %bb.0:
4378 ; GFX10-GISEL-NEXT: s_clause 0x1
4379 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4380 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
4381 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
4382 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4383 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4384 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4385 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4386 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4387 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4388 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4389 ; GFX10-GISEL-NEXT: s_endpgm
4390 ;
4391 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
4392 ; GFX11-SDAG: ; %bb.0:
4393 ; GFX11-SDAG-NEXT: s_clause 0x1
4394 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4395 ; GFX11-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
4396 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4397 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
4398 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4399 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4400 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4401 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
4402 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4403 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
4404 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4405 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4406 ; GFX11-SDAG-NEXT: s_nop 0
4407 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4408 ; GFX11-SDAG-NEXT: s_endpgm
4409 ;
4410 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
4411 ; GFX11-GISEL: ; %bb.0:
4412 ; GFX11-GISEL-NEXT: s_clause 0x1
4413 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4414 ; GFX11-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
4415 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4416 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
4417 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4418 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4419 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4420 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4421 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4422 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
4423 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4424 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4425 ; GFX11-GISEL-NEXT: s_nop 0
4426 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4427 ; GFX11-GISEL-NEXT: s_endpgm
4428 ;
4429 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
4430 ; GFX12-SDAG: ; %bb.0:
4431 ; GFX12-SDAG-NEXT: s_clause 0x1
4432 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4433 ; GFX12-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
4434 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4435 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
4436 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4437 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4438 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4439 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
4440 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4441 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
4442 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4443 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4444 ; GFX12-SDAG-NEXT: s_nop 0
4445 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4446 ; GFX12-SDAG-NEXT: s_endpgm
4447 ;
4448 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
4449 ; GFX12-GISEL: ; %bb.0:
4450 ; GFX12-GISEL-NEXT: s_clause 0x1
4451 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4452 ; GFX12-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
4453 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4454 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
4455 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4456 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4457 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4458 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4459 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4460 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
4461 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4462 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4463 ; GFX12-GISEL-NEXT: s_nop 0
4464 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4465 ; GFX12-GISEL-NEXT: s_endpgm
4466 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
4467 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
4468 store i64 %v, ptr addrspace(1) %out
4469 ret void
4470 }
4472 define amdgpu_kernel void @v_permlanex16_b32_vsv_f64(ptr addrspace(1) %out, double %src0, i32 %src1) {
4473 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
4474 ; GFX10-SDAG: ; %bb.0:
4475 ; GFX10-SDAG-NEXT: s_clause 0x1
4476 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4477 ; GFX10-SDAG-NEXT: s_load_dword s0, s[2:3], 0x34
4478 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v1
4479 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4480 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4481 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4482 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4483 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4484 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4485 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4486 ; GFX10-SDAG-NEXT: s_endpgm
4487 ;
4488 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
4489 ; GFX10-GISEL: ; %bb.0:
4490 ; GFX10-GISEL-NEXT: s_clause 0x1
4491 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4492 ; GFX10-GISEL-NEXT: s_load_dword s0, s[2:3], 0x34
4493 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v1
4494 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4495 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4496 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4497 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4498 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4499 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4500 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4501 ; GFX10-GISEL-NEXT: s_endpgm
4502 ;
4503 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
4504 ; GFX11-SDAG: ; %bb.0:
4505 ; GFX11-SDAG-NEXT: s_clause 0x1
4506 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4507 ; GFX11-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
4508 ; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4509 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
4510 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4511 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4512 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4513 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
4514 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4515 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
4516 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4517 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4518 ; GFX11-SDAG-NEXT: s_nop 0
4519 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4520 ; GFX11-SDAG-NEXT: s_endpgm
4521 ;
4522 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
4523 ; GFX11-GISEL: ; %bb.0:
4524 ; GFX11-GISEL-NEXT: s_clause 0x1
4525 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4526 ; GFX11-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
4527 ; GFX11-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4528 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
4529 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4530 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4531 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4532 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4533 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4534 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
4535 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4536 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4537 ; GFX11-GISEL-NEXT: s_nop 0
4538 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4539 ; GFX11-GISEL-NEXT: s_endpgm
4540 ;
4541 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
4542 ; GFX12-SDAG: ; %bb.0:
4543 ; GFX12-SDAG-NEXT: s_clause 0x1
4544 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4545 ; GFX12-SDAG-NEXT: s_load_b32 s0, s[2:3], 0x34
4546 ; GFX12-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
4547 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
4548 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4549 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v0
4550 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4551 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v0, s6
4552 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4553 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
4554 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4555 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4556 ; GFX12-SDAG-NEXT: s_nop 0
4557 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4558 ; GFX12-SDAG-NEXT: s_endpgm
4559 ;
4560 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
4561 ; GFX12-GISEL: ; %bb.0:
4562 ; GFX12-GISEL-NEXT: s_clause 0x1
4563 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4564 ; GFX12-GISEL-NEXT: s_load_b32 s0, s[2:3], 0x34
4565 ; GFX12-GISEL-NEXT: v_bfe_u32 v0, v0, 10, 10
4566 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
4567 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
4568 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v0
4569 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4570 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4571 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
4572 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
4573 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
4574 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4575 ; GFX12-GISEL-NEXT: s_nop 0
4576 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4577 ; GFX12-GISEL-NEXT: s_endpgm
4578 %tidy = call i32 @llvm.amdgcn.workitem.id.y()
4579 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %src1, i32 %tidy, i1 false, i1 false)
4580 store double %v, ptr addrspace(1) %out
4581 ret void
4582 }
4584 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
4585 ; GFX10-LABEL: v_permlanex16_b32_vss_fi_i32:
4586 ; GFX10: ; %bb.0:
4587 ; GFX10-NEXT: s_clause 0x1
4588 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4589 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
4590 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4591 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4592 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4593 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4594 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4595 ; GFX10-NEXT: s_endpgm
4596 ;
4597 ; GFX11-LABEL: v_permlanex16_b32_vss_fi_i32:
4598 ; GFX11: ; %bb.0:
4599 ; GFX11-NEXT: s_clause 0x1
4600 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4601 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4602 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4603 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4604 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
4605 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4606 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
4607 ; GFX11-NEXT: s_nop 0
4608 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4609 ; GFX11-NEXT: s_endpgm
4610 ;
4611 ; GFX12-LABEL: v_permlanex16_b32_vss_fi_i32:
4612 ; GFX12: ; %bb.0:
4613 ; GFX12-NEXT: s_clause 0x1
4614 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4615 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4616 ; GFX12-NEXT: s_wait_kmcnt 0x0
4617 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4618 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
4619 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4620 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
4621 ; GFX12-NEXT: s_nop 0
4622 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4623 ; GFX12-NEXT: s_endpgm
4624 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 false)
4625 store i32 %v, ptr addrspace(1) %out
4626 ret void
4627 }
4629 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
4630 ; GFX10-LABEL: v_permlanex16_b32_vss_fi_f32:
4631 ; GFX10: ; %bb.0:
4632 ; GFX10-NEXT: s_clause 0x1
4633 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4634 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
4635 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4636 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4637 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4638 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4639 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4640 ; GFX10-NEXT: s_endpgm
4641 ;
4642 ; GFX11-LABEL: v_permlanex16_b32_vss_fi_f32:
4643 ; GFX11: ; %bb.0:
4644 ; GFX11-NEXT: s_clause 0x1
4645 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4646 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4647 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4648 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4649 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
4650 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4651 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
4652 ; GFX11-NEXT: s_nop 0
4653 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4654 ; GFX11-NEXT: s_endpgm
4655 ;
4656 ; GFX12-LABEL: v_permlanex16_b32_vss_fi_f32:
4657 ; GFX12: ; %bb.0:
4658 ; GFX12-NEXT: s_clause 0x1
4659 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4660 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4661 ; GFX12-NEXT: s_wait_kmcnt 0x0
4662 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4663 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
4664 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,0]
4665 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
4666 ; GFX12-NEXT: s_nop 0
4667 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4668 ; GFX12-NEXT: s_endpgm
4669 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 true, i1 false)
4670 store float %v, ptr addrspace(1) %out
4671 ret void
4672 }
4674 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
4675 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
4676 ; GFX10-SDAG: ; %bb.0:
4677 ; GFX10-SDAG-NEXT: s_clause 0x1
4678 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4679 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4680 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4681 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4682 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4683 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4684 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4685 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4686 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4687 ; GFX10-SDAG-NEXT: s_endpgm
4688 ;
4689 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
4690 ; GFX10-GISEL: ; %bb.0:
4691 ; GFX10-GISEL-NEXT: s_clause 0x1
4692 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4693 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4694 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4695 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4696 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4697 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4698 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4699 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4700 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4701 ; GFX10-GISEL-NEXT: s_endpgm
4702 ;
4703 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
4704 ; GFX11-SDAG: ; %bb.0:
4705 ; GFX11-SDAG-NEXT: s_clause 0x1
4706 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4707 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4708 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4709 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4710 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
4711 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
4712 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4713 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4714 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4715 ; GFX11-SDAG-NEXT: s_nop 0
4716 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4717 ; GFX11-SDAG-NEXT: s_endpgm
4718 ;
4719 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
4720 ; GFX11-GISEL: ; %bb.0:
4721 ; GFX11-GISEL-NEXT: s_clause 0x1
4722 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4723 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4724 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
4725 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4726 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4727 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
4728 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4729 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4730 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4731 ; GFX11-GISEL-NEXT: s_nop 0
4732 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4733 ; GFX11-GISEL-NEXT: s_endpgm
4734 ;
4735 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
4736 ; GFX12-SDAG: ; %bb.0:
4737 ; GFX12-SDAG-NEXT: s_clause 0x1
4738 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4739 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4740 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4741 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4742 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
4743 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
4744 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4745 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4746 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4747 ; GFX12-SDAG-NEXT: s_nop 0
4748 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4749 ; GFX12-SDAG-NEXT: s_endpgm
4750 ;
4751 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
4752 ; GFX12-GISEL: ; %bb.0:
4753 ; GFX12-GISEL-NEXT: s_clause 0x1
4754 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4755 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4756 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
4757 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4758 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4759 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
4760 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4761 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4762 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4763 ; GFX12-GISEL-NEXT: s_nop 0
4764 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4765 ; GFX12-GISEL-NEXT: s_endpgm
4766 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 true, i1 false)
4767 store i64 %v, ptr addrspace(1) %out
4768 ret void
4769 }
4771 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
4772 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
4773 ; GFX10-SDAG: ; %bb.0:
4774 ; GFX10-SDAG-NEXT: s_clause 0x1
4775 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4776 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4777 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4778 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4779 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4780 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4781 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4782 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4783 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4784 ; GFX10-SDAG-NEXT: s_endpgm
4785 ;
4786 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
4787 ; GFX10-GISEL: ; %bb.0:
4788 ; GFX10-GISEL-NEXT: s_clause 0x1
4789 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4790 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4791 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4792 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4793 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4794 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4795 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4796 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4797 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4798 ; GFX10-GISEL-NEXT: s_endpgm
4799 ;
4800 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
4801 ; GFX11-SDAG: ; %bb.0:
4802 ; GFX11-SDAG-NEXT: s_clause 0x1
4803 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4804 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4805 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4806 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4807 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
4808 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
4809 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4810 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4811 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4812 ; GFX11-SDAG-NEXT: s_nop 0
4813 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4814 ; GFX11-SDAG-NEXT: s_endpgm
4815 ;
4816 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
4817 ; GFX11-GISEL: ; %bb.0:
4818 ; GFX11-GISEL-NEXT: s_clause 0x1
4819 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4820 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4821 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
4822 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4823 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4824 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
4825 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4826 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4827 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4828 ; GFX11-GISEL-NEXT: s_nop 0
4829 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4830 ; GFX11-GISEL-NEXT: s_endpgm
4831 ;
4832 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
4833 ; GFX12-SDAG: ; %bb.0:
4834 ; GFX12-SDAG-NEXT: s_clause 0x1
4835 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4836 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4837 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
4838 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4839 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
4840 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
4841 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4842 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4843 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4844 ; GFX12-SDAG-NEXT: s_nop 0
4845 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4846 ; GFX12-SDAG-NEXT: s_endpgm
4847 ;
4848 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
4849 ; GFX12-GISEL: ; %bb.0:
4850 ; GFX12-GISEL-NEXT: s_clause 0x1
4851 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4852 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4853 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
4854 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
4855 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
4856 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
4857 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
4858 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
4859 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4860 ; GFX12-GISEL-NEXT: s_nop 0
4861 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4862 ; GFX12-GISEL-NEXT: s_endpgm
4863 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 true, i1 false)
4864 store double %v, ptr addrspace(1) %out
4865 ret void
4866 }
4868 define amdgpu_kernel void @v_permlanex16_b32_vss_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
4869 ; GFX10-LABEL: v_permlanex16_b32_vss_bc_i32:
4870 ; GFX10: ; %bb.0:
4871 ; GFX10-NEXT: s_clause 0x1
4872 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4873 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
4874 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4875 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4876 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4877 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4878 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4879 ; GFX10-NEXT: s_endpgm
4880 ;
4881 ; GFX11-LABEL: v_permlanex16_b32_vss_bc_i32:
4882 ; GFX11: ; %bb.0:
4883 ; GFX11-NEXT: s_clause 0x1
4884 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4885 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4886 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4887 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4888 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
4889 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4890 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
4891 ; GFX11-NEXT: s_nop 0
4892 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4893 ; GFX11-NEXT: s_endpgm
4894 ;
4895 ; GFX12-LABEL: v_permlanex16_b32_vss_bc_i32:
4896 ; GFX12: ; %bb.0:
4897 ; GFX12-NEXT: s_clause 0x1
4898 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4899 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4900 ; GFX12-NEXT: s_wait_kmcnt 0x0
4901 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4902 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
4903 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4904 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
4905 ; GFX12-NEXT: s_nop 0
4906 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4907 ; GFX12-NEXT: s_endpgm
4908 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
4909 store i32 %v, ptr addrspace(1) %out
4910 ret void
4911 }
4913 define amdgpu_kernel void @v_permlanex16_b32_vss_bc_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
4914 ; GFX10-LABEL: v_permlanex16_b32_vss_bc_f32:
4915 ; GFX10: ; %bb.0:
4916 ; GFX10-NEXT: s_clause 0x1
4917 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4918 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
4919 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
4920 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
4921 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
4922 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4923 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
4924 ; GFX10-NEXT: s_endpgm
4925 ;
4926 ; GFX11-LABEL: v_permlanex16_b32_vss_bc_f32:
4927 ; GFX11: ; %bb.0:
4928 ; GFX11-NEXT: s_clause 0x1
4929 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4930 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
4931 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
4932 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4933 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
4934 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4935 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
4936 ; GFX11-NEXT: s_nop 0
4937 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4938 ; GFX11-NEXT: s_endpgm
4939 ;
4940 ; GFX12-LABEL: v_permlanex16_b32_vss_bc_f32:
4941 ; GFX12: ; %bb.0:
4942 ; GFX12-NEXT: s_clause 0x1
4943 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4944 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
4945 ; GFX12-NEXT: s_wait_kmcnt 0x0
4946 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
4947 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
4948 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[0,1]
4949 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
4950 ; GFX12-NEXT: s_nop 0
4951 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
4952 ; GFX12-NEXT: s_endpgm
4953 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 false, i1 true)
4954 store float %v, ptr addrspace(1) %out
4955 ret void
4956 }
4958 define amdgpu_kernel void @v_permlanex16_b32_vss_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
4959 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
4960 ; GFX10-SDAG: ; %bb.0:
4961 ; GFX10-SDAG-NEXT: s_clause 0x1
4962 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4963 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4964 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
4965 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4966 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
4967 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
4968 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
4969 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
4970 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4971 ; GFX10-SDAG-NEXT: s_endpgm
4972 ;
4973 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
4974 ; GFX10-GISEL: ; %bb.0:
4975 ; GFX10-GISEL-NEXT: s_clause 0x1
4976 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
4977 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
4978 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
4979 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
4980 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
4981 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
4982 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
4983 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
4984 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
4985 ; GFX10-GISEL-NEXT: s_endpgm
4986 ;
4987 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
4988 ; GFX11-SDAG: ; %bb.0:
4989 ; GFX11-SDAG-NEXT: s_clause 0x1
4990 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
4991 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
4992 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
4993 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
4994 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
4995 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
4996 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
4997 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
4998 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
4999 ; GFX11-SDAG-NEXT: s_nop 0
5000 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5001 ; GFX11-SDAG-NEXT: s_endpgm
5002 ;
5003 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
5004 ; GFX11-GISEL: ; %bb.0:
5005 ; GFX11-GISEL-NEXT: s_clause 0x1
5006 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5007 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5008 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5009 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5010 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5011 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5012 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5013 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5014 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5015 ; GFX11-GISEL-NEXT: s_nop 0
5016 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5017 ; GFX11-GISEL-NEXT: s_endpgm
5018 ;
5019 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
5020 ; GFX12-SDAG: ; %bb.0:
5021 ; GFX12-SDAG-NEXT: s_clause 0x1
5022 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5023 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5024 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5025 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5026 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
5027 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5028 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5029 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5030 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5031 ; GFX12-SDAG-NEXT: s_nop 0
5032 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5033 ; GFX12-SDAG-NEXT: s_endpgm
5034 ;
5035 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
5036 ; GFX12-GISEL: ; %bb.0:
5037 ; GFX12-GISEL-NEXT: s_clause 0x1
5038 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5039 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5040 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5041 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5042 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5043 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5044 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5045 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5046 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5047 ; GFX12-GISEL-NEXT: s_nop 0
5048 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5049 ; GFX12-GISEL-NEXT: s_endpgm
5050 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 false, i1 true)
5051 store i64 %v, ptr addrspace(1) %out
5052 ret void
5053 }
5055 define amdgpu_kernel void @v_permlanex16_b32_vss_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
5056 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
5057 ; GFX10-SDAG: ; %bb.0:
5058 ; GFX10-SDAG-NEXT: s_clause 0x1
5059 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5060 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5061 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5062 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5063 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
5064 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
5065 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5066 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5067 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5068 ; GFX10-SDAG-NEXT: s_endpgm
5069 ;
5070 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
5071 ; GFX10-GISEL: ; %bb.0:
5072 ; GFX10-GISEL-NEXT: s_clause 0x1
5073 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5074 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5075 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5076 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5077 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
5078 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
5079 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5080 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5081 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5082 ; GFX10-GISEL-NEXT: s_endpgm
5083 ;
5084 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
5085 ; GFX11-SDAG: ; %bb.0:
5086 ; GFX11-SDAG-NEXT: s_clause 0x1
5087 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5088 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5089 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5090 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5091 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
5092 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5093 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5094 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5095 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5096 ; GFX11-SDAG-NEXT: s_nop 0
5097 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5098 ; GFX11-SDAG-NEXT: s_endpgm
5099 ;
5100 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
5101 ; GFX11-GISEL: ; %bb.0:
5102 ; GFX11-GISEL-NEXT: s_clause 0x1
5103 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5104 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5105 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5106 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5107 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5108 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5109 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5110 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5111 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5112 ; GFX11-GISEL-NEXT: s_nop 0
5113 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5114 ; GFX11-GISEL-NEXT: s_endpgm
5115 ;
5116 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
5117 ; GFX12-SDAG: ; %bb.0:
5118 ; GFX12-SDAG-NEXT: s_clause 0x1
5119 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5120 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5121 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5122 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5123 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
5124 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5125 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5126 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5127 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5128 ; GFX12-SDAG-NEXT: s_nop 0
5129 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5130 ; GFX12-SDAG-NEXT: s_endpgm
5131 ;
5132 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
5133 ; GFX12-GISEL: ; %bb.0:
5134 ; GFX12-GISEL-NEXT: s_clause 0x1
5135 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5136 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5137 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5138 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5139 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5140 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5141 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
5142 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
5143 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5144 ; GFX12-GISEL-NEXT: s_nop 0
5145 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5146 ; GFX12-GISEL-NEXT: s_endpgm
5147 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 false, i1 true)
5148 store double %v, ptr addrspace(1) %out
5149 ret void
5150 }
5152 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5153 ; GFX10-LABEL: v_permlanex16_b32_vss_fi_bc_i32:
5154 ; GFX10: ; %bb.0:
5155 ; GFX10-NEXT: s_clause 0x1
5156 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5157 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
5158 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5159 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5160 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
5161 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5162 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5163 ; GFX10-NEXT: s_endpgm
5164 ;
5165 ; GFX11-LABEL: v_permlanex16_b32_vss_fi_bc_i32:
5166 ; GFX11: ; %bb.0:
5167 ; GFX11-NEXT: s_clause 0x1
5168 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5169 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
5170 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5171 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
5172 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5173 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5174 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
5175 ; GFX11-NEXT: s_nop 0
5176 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5177 ; GFX11-NEXT: s_endpgm
5178 ;
5179 ; GFX12-LABEL: v_permlanex16_b32_vss_fi_bc_i32:
5180 ; GFX12: ; %bb.0:
5181 ; GFX12-NEXT: s_clause 0x1
5182 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5183 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
5184 ; GFX12-NEXT: s_wait_kmcnt 0x0
5185 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
5186 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5187 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5188 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
5189 ; GFX12-NEXT: s_nop 0
5190 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5191 ; GFX12-NEXT: s_endpgm
5192 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
5193 store i32 %v, ptr addrspace(1) %out
5194 ret void
5195 }
5197 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_f32(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
5198 ; GFX10-LABEL: v_permlanex16_b32_vss_fi_bc_f32:
5199 ; GFX10: ; %bb.0:
5200 ; GFX10-NEXT: s_clause 0x1
5201 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5202 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x34
5203 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5204 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5205 ; GFX10-NEXT: v_mov_b32_e32 v0, s6
5206 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5207 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5208 ; GFX10-NEXT: s_endpgm
5209 ;
5210 ; GFX11-LABEL: v_permlanex16_b32_vss_fi_bc_f32:
5211 ; GFX11: ; %bb.0:
5212 ; GFX11-NEXT: s_clause 0x1
5213 ; GFX11-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5214 ; GFX11-NEXT: s_load_b32 s0, s[2:3], 0x34
5215 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5216 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
5217 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5218 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5219 ; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]
5220 ; GFX11-NEXT: s_nop 0
5221 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5222 ; GFX11-NEXT: s_endpgm
5223 ;
5224 ; GFX12-LABEL: v_permlanex16_b32_vss_fi_bc_f32:
5225 ; GFX12: ; %bb.0:
5226 ; GFX12-NEXT: s_clause 0x1
5227 ; GFX12-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5228 ; GFX12-NEXT: s_load_b32 s0, s[2:3], 0x34
5229 ; GFX12-NEXT: s_wait_kmcnt 0x0
5230 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
5231 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5232 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s7, s0 op_sel:[1,1]
5233 ; GFX12-NEXT: global_store_b32 v1, v0, s[4:5]
5234 ; GFX12-NEXT: s_nop 0
5235 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5236 ; GFX12-NEXT: s_endpgm
5237 %v = call float @llvm.amdgcn.permlanex16.f32(float %src0, float %src0, i32 %src1, i32 %src2, i1 true, i1 true)
5238 store float %v, ptr addrspace(1) %out
5239 ret void
5240 }
5242 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
5243 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5244 ; GFX10-SDAG: ; %bb.0:
5245 ; GFX10-SDAG-NEXT: s_clause 0x1
5246 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5247 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5248 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5249 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5250 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
5251 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
5252 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5253 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5254 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5255 ; GFX10-SDAG-NEXT: s_endpgm
5256 ;
5257 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5258 ; GFX10-GISEL: ; %bb.0:
5259 ; GFX10-GISEL-NEXT: s_clause 0x1
5260 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5261 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5262 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5263 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5264 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
5265 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
5266 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5267 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5268 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5269 ; GFX10-GISEL-NEXT: s_endpgm
5270 ;
5271 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5272 ; GFX11-SDAG: ; %bb.0:
5273 ; GFX11-SDAG-NEXT: s_clause 0x1
5274 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5275 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5276 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5277 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5278 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
5279 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5280 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5281 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5282 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5283 ; GFX11-SDAG-NEXT: s_nop 0
5284 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5285 ; GFX11-SDAG-NEXT: s_endpgm
5286 ;
5287 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5288 ; GFX11-GISEL: ; %bb.0:
5289 ; GFX11-GISEL-NEXT: s_clause 0x1
5290 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5291 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5292 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5293 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5294 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5295 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5296 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5297 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5298 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5299 ; GFX11-GISEL-NEXT: s_nop 0
5300 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5301 ; GFX11-GISEL-NEXT: s_endpgm
5302 ;
5303 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5304 ; GFX12-SDAG: ; %bb.0:
5305 ; GFX12-SDAG-NEXT: s_clause 0x1
5306 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5307 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5308 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5309 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5310 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
5311 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5312 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5313 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5314 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5315 ; GFX12-SDAG-NEXT: s_nop 0
5316 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5317 ; GFX12-SDAG-NEXT: s_endpgm
5318 ;
5319 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
5320 ; GFX12-GISEL: ; %bb.0:
5321 ; GFX12-GISEL-NEXT: s_clause 0x1
5322 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5323 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5324 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5325 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5326 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5327 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5328 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5329 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5330 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5331 ; GFX12-GISEL-NEXT: s_nop 0
5332 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5333 ; GFX12-GISEL-NEXT: s_endpgm
5334 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %src0, i64 %src0, i32 %src1, i32 %src2, i1 true, i1 true)
5335 store i64 %v, ptr addrspace(1) %out
5336 ret void
5337 }
5339 define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
5340 ; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5341 ; GFX10-SDAG: ; %bb.0:
5342 ; GFX10-SDAG-NEXT: s_clause 0x1
5343 ; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5344 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5345 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5346 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5347 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s7
5348 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s6
5349 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5350 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5351 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5352 ; GFX10-SDAG-NEXT: s_endpgm
5353 ;
5354 ; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5355 ; GFX10-GISEL: ; %bb.0:
5356 ; GFX10-GISEL-NEXT: s_clause 0x1
5357 ; GFX10-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x24
5358 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x34
5359 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5360 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5361 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s6
5362 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s7
5363 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5364 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5365 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5366 ; GFX10-GISEL-NEXT: s_endpgm
5367 ;
5368 ; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5369 ; GFX11-SDAG: ; %bb.0:
5370 ; GFX11-SDAG-NEXT: s_clause 0x1
5371 ; GFX11-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5372 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5373 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5374 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5375 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s6
5376 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5377 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5378 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5379 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5380 ; GFX11-SDAG-NEXT: s_nop 0
5381 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5382 ; GFX11-SDAG-NEXT: s_endpgm
5383 ;
5384 ; GFX11-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5385 ; GFX11-GISEL: ; %bb.0:
5386 ; GFX11-GISEL-NEXT: s_clause 0x1
5387 ; GFX11-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5388 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5389 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5390 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5391 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5392 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5393 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5394 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5395 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5396 ; GFX11-GISEL-NEXT: s_nop 0
5397 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5398 ; GFX11-GISEL-NEXT: s_endpgm
5399 ;
5400 ; GFX12-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5401 ; GFX12-SDAG: ; %bb.0:
5402 ; GFX12-SDAG-NEXT: s_clause 0x1
5403 ; GFX12-SDAG-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5404 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5405 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5406 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
5407 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s6
5408 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5409 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5410 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5411 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5412 ; GFX12-SDAG-NEXT: s_nop 0
5413 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5414 ; GFX12-SDAG-NEXT: s_endpgm
5415 ;
5416 ; GFX12-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
5417 ; GFX12-GISEL: ; %bb.0:
5418 ; GFX12-GISEL-NEXT: s_clause 0x1
5419 ; GFX12-GISEL-NEXT: s_load_b128 s[4:7], s[2:3], 0x24
5420 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x34
5421 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5422 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5423 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
5424 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5425 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
5426 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
5427 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5]
5428 ; GFX12-GISEL-NEXT: s_nop 0
5429 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5430 ; GFX12-GISEL-NEXT: s_endpgm
5431 %v = call double @llvm.amdgcn.permlanex16.f64(double %src0, double %src0, i32 %src1, i32 %src2, i1 true, i1 true)
5432 store double %v, ptr addrspace(1) %out
5433 ret void
5434 }
5436 define amdgpu_kernel void @v_permlane16_b32_tid_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5437 ; GFX10-LABEL: v_permlane16_b32_tid_tid_i32:
5438 ; GFX10: ; %bb.0:
5439 ; GFX10-NEXT: s_clause 0x1
5440 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5441 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5442 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5443 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5444 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
5445 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5446 ; GFX10-NEXT: s_endpgm
5447 ;
5448 ; GFX11-LABEL: v_permlane16_b32_tid_tid_i32:
5449 ; GFX11: ; %bb.0:
5450 ; GFX11-NEXT: s_clause 0x1
5451 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5452 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5453 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5454 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5455 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5456 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1
5457 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
5458 ; GFX11-NEXT: s_nop 0
5459 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5460 ; GFX11-NEXT: s_endpgm
5461 ;
5462 ; GFX12-LABEL: v_permlane16_b32_tid_tid_i32:
5463 ; GFX12: ; %bb.0:
5464 ; GFX12-NEXT: s_clause 0x1
5465 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5466 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5467 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5468 ; GFX12-NEXT: s_wait_kmcnt 0x0
5469 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5470 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1
5471 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
5472 ; GFX12-NEXT: s_nop 0
5473 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5474 ; GFX12-NEXT: s_endpgm
5475 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5476 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %tidx, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
5477 store i32 %v, ptr addrspace(1) %out
5478 ret void
5479 }
5481 define amdgpu_kernel void @v_permlane16_b32_tid_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5482 ; GFX10-LABEL: v_permlane16_b32_tid_tid_f32:
5483 ; GFX10: ; %bb.0:
5484 ; GFX10-NEXT: s_clause 0x1
5485 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5486 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5487 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5488 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5489 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
5490 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5491 ; GFX10-NEXT: s_endpgm
5492 ;
5493 ; GFX11-LABEL: v_permlane16_b32_tid_tid_f32:
5494 ; GFX11: ; %bb.0:
5495 ; GFX11-NEXT: s_clause 0x1
5496 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5497 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5498 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5499 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5500 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5501 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1
5502 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
5503 ; GFX11-NEXT: s_nop 0
5504 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5505 ; GFX11-NEXT: s_endpgm
5506 ;
5507 ; GFX12-LABEL: v_permlane16_b32_tid_tid_f32:
5508 ; GFX12: ; %bb.0:
5509 ; GFX12-NEXT: s_clause 0x1
5510 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5511 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5512 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5513 ; GFX12-NEXT: s_wait_kmcnt 0x0
5514 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5515 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1
5516 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
5517 ; GFX12-NEXT: s_nop 0
5518 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5519 ; GFX12-NEXT: s_endpgm
5520 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5521 %tidx_f32 = bitcast i32 %tidx to float
5522 %v = call float @llvm.amdgcn.permlane16.f32(float %tidx_f32, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
5523 store float %v, ptr addrspace(1) %out
5524 ret void
5525 }
5527 define amdgpu_kernel void @v_permlane16_b32_tid_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5528 ; GFX10-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
5529 ; GFX10-SDAG: ; %bb.0:
5530 ; GFX10-SDAG-NEXT: s_clause 0x1
5531 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5532 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5533 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
5534 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5535 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5536 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5537 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5538 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5539 ; GFX10-SDAG-NEXT: s_endpgm
5540 ;
5541 ; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
5542 ; GFX10-GISEL: ; %bb.0:
5543 ; GFX10-GISEL-NEXT: s_clause 0x1
5544 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5545 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5546 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
5547 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5548 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5549 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5550 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5551 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5552 ; GFX10-GISEL-NEXT: s_endpgm
5553 ;
5554 ; GFX11-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
5555 ; GFX11-SDAG: ; %bb.0:
5556 ; GFX11-SDAG-NEXT: s_clause 0x1
5557 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5558 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5559 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5560 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
5561 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5562 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
5563 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5564 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5565 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5566 ; GFX11-SDAG-NEXT: s_nop 0
5567 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5568 ; GFX11-SDAG-NEXT: s_endpgm
5569 ;
5570 ; GFX11-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
5571 ; GFX11-GISEL: ; %bb.0:
5572 ; GFX11-GISEL-NEXT: s_clause 0x1
5573 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5574 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5575 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5576 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5577 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5578 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
5579 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5580 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5581 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5582 ; GFX11-GISEL-NEXT: s_nop 0
5583 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5584 ; GFX11-GISEL-NEXT: s_endpgm
5585 ;
5586 ; GFX12-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
5587 ; GFX12-SDAG: ; %bb.0:
5588 ; GFX12-SDAG-NEXT: s_clause 0x1
5589 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5590 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5591 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5592 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
5593 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5594 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
5595 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5596 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5597 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5598 ; GFX12-SDAG-NEXT: s_nop 0
5599 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5600 ; GFX12-SDAG-NEXT: s_endpgm
5601 ;
5602 ; GFX12-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
5603 ; GFX12-GISEL: ; %bb.0:
5604 ; GFX12-GISEL-NEXT: s_clause 0x1
5605 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5606 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5607 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5608 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5609 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5610 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
5611 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5612 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5613 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5614 ; GFX12-GISEL-NEXT: s_nop 0
5615 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5616 ; GFX12-GISEL-NEXT: s_endpgm
5617 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5618 %tidx_i64 = zext i32 %tidx to i64
5619 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %tidx_i64, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
5620 store i64 %v, ptr addrspace(1) %out
5621 ret void
5622 }
5624 define amdgpu_kernel void @v_permlane16_b32_tid_tid_f64(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
5625 ; GFX10-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
5626 ; GFX10-SDAG: ; %bb.0:
5627 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5628 ; GFX10-SDAG-NEXT: s_clause 0x1
5629 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5630 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5631 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5632 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5633 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5634 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5635 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5636 ; GFX10-SDAG-NEXT: s_endpgm
5637 ;
5638 ; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
5639 ; GFX10-GISEL: ; %bb.0:
5640 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5641 ; GFX10-GISEL-NEXT: s_clause 0x1
5642 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5643 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5644 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5645 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5646 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5647 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5648 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5649 ; GFX10-GISEL-NEXT: s_endpgm
5650 ;
5651 ; GFX11-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
5652 ; GFX11-SDAG: ; %bb.0:
5653 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5654 ; GFX11-SDAG-NEXT: s_clause 0x1
5655 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5656 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5657 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
5658 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5659 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5660 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5661 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5662 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5663 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5664 ; GFX11-SDAG-NEXT: s_nop 0
5665 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5666 ; GFX11-SDAG-NEXT: s_endpgm
5667 ;
5668 ; GFX11-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
5669 ; GFX11-GISEL: ; %bb.0:
5670 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5671 ; GFX11-GISEL-NEXT: s_clause 0x1
5672 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5673 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5674 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5675 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5676 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5677 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5678 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5679 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5680 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5681 ; GFX11-GISEL-NEXT: s_nop 0
5682 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5683 ; GFX11-GISEL-NEXT: s_endpgm
5684 ;
5685 ; GFX12-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
5686 ; GFX12-SDAG: ; %bb.0:
5687 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5688 ; GFX12-SDAG-NEXT: s_clause 0x1
5689 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5690 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5691 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
5692 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5693 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5694 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5695 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5696 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5697 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5698 ; GFX12-SDAG-NEXT: s_nop 0
5699 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5700 ; GFX12-SDAG-NEXT: s_endpgm
5701 ;
5702 ; GFX12-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
5703 ; GFX12-GISEL: ; %bb.0:
5704 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5705 ; GFX12-GISEL-NEXT: s_clause 0x1
5706 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5707 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5708 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5709 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5710 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5711 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5712 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5713 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5714 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5715 ; GFX12-GISEL-NEXT: s_nop 0
5716 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5717 ; GFX12-GISEL-NEXT: s_endpgm
5718 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5719 %tidx_f32 = bitcast i32 %tidx to float
5720 %tidx_f64 = fpext float %tidx_f32 to double
5721 %v = call double @llvm.amdgcn.permlane16.f64(double %tidx_f64, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
5722 store double %v, ptr addrspace(1) %out
5723 ret void
5724 }
5726 define amdgpu_kernel void @v_permlane16_b32_undef_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5727 ; GFX10-LABEL: v_permlane16_b32_undef_tid_i32:
5728 ; GFX10: ; %bb.0:
5729 ; GFX10-NEXT: s_clause 0x1
5730 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5731 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5732 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5733 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5734 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
5735 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5736 ; GFX10-NEXT: s_endpgm
5737 ;
5738 ; GFX11-LABEL: v_permlane16_b32_undef_tid_i32:
5739 ; GFX11: ; %bb.0:
5740 ; GFX11-NEXT: s_clause 0x1
5741 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5742 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5743 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5744 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5745 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5746 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1
5747 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
5748 ; GFX11-NEXT: s_nop 0
5749 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5750 ; GFX11-NEXT: s_endpgm
5751 ;
5752 ; GFX12-LABEL: v_permlane16_b32_undef_tid_i32:
5753 ; GFX12: ; %bb.0:
5754 ; GFX12-NEXT: s_clause 0x1
5755 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5756 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5757 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5758 ; GFX12-NEXT: s_wait_kmcnt 0x0
5759 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5760 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1
5761 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
5762 ; GFX12-NEXT: s_nop 0
5763 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5764 ; GFX12-NEXT: s_endpgm
5765 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5766 %undef = freeze i32 poison
5767 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
5768 store i32 %v, ptr addrspace(1) %out
5769 ret void
5770 }
5772 define amdgpu_kernel void @v_permlane16_b32_undef_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5773 ; GFX10-LABEL: v_permlane16_b32_undef_tid_f32:
5774 ; GFX10: ; %bb.0:
5775 ; GFX10-NEXT: s_clause 0x1
5776 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5777 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5778 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
5779 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
5780 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
5781 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
5782 ; GFX10-NEXT: s_endpgm
5783 ;
5784 ; GFX11-LABEL: v_permlane16_b32_undef_tid_f32:
5785 ; GFX11: ; %bb.0:
5786 ; GFX11-NEXT: s_clause 0x1
5787 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5788 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5789 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5790 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
5791 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
5792 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1
5793 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
5794 ; GFX11-NEXT: s_nop 0
5795 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5796 ; GFX11-NEXT: s_endpgm
5797 ;
5798 ; GFX12-LABEL: v_permlane16_b32_undef_tid_f32:
5799 ; GFX12: ; %bb.0:
5800 ; GFX12-NEXT: s_clause 0x1
5801 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5802 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5803 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
5804 ; GFX12-NEXT: s_wait_kmcnt 0x0
5805 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
5806 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1
5807 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
5808 ; GFX12-NEXT: s_nop 0
5809 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5810 ; GFX12-NEXT: s_endpgm
5811 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5812 %tidx_f32 = bitcast i32 %tidx to float
5813 %undef = freeze float poison
5814 %v = call float @llvm.amdgcn.permlane16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
5815 store float %v, ptr addrspace(1) %out
5816 ret void
5817 }
5819 define amdgpu_kernel void @v_permlane16_b32_undef_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5820 ; GFX10-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
5821 ; GFX10-SDAG: ; %bb.0:
5822 ; GFX10-SDAG-NEXT: s_clause 0x1
5823 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5824 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5825 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5826 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5827 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1
5828 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5829 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5830 ; GFX10-SDAG-NEXT: s_endpgm
5831 ;
5832 ; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
5833 ; GFX10-GISEL: ; %bb.0:
5834 ; GFX10-GISEL-NEXT: s_clause 0x1
5835 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5836 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5837 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5838 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5839 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5840 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1
5841 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5842 ; GFX10-GISEL-NEXT: s_endpgm
5843 ;
5844 ; GFX11-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
5845 ; GFX11-SDAG: ; %bb.0:
5846 ; GFX11-SDAG-NEXT: s_clause 0x1
5847 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5848 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5849 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
5850 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5851 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5852 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5853 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1
5854 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5855 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5856 ; GFX11-SDAG-NEXT: s_nop 0
5857 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5858 ; GFX11-SDAG-NEXT: s_endpgm
5859 ;
5860 ; GFX11-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
5861 ; GFX11-GISEL: ; %bb.0:
5862 ; GFX11-GISEL-NEXT: s_clause 0x1
5863 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5864 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5865 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5866 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5867 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5868 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5869 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5870 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1
5871 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5872 ; GFX11-GISEL-NEXT: s_nop 0
5873 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5874 ; GFX11-GISEL-NEXT: s_endpgm
5875 ;
5876 ; GFX12-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
5877 ; GFX12-SDAG: ; %bb.0:
5878 ; GFX12-SDAG-NEXT: s_clause 0x1
5879 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5880 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5881 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
5882 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5883 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5884 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5885 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1
5886 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5887 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5888 ; GFX12-SDAG-NEXT: s_nop 0
5889 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5890 ; GFX12-SDAG-NEXT: s_endpgm
5891 ;
5892 ; GFX12-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
5893 ; GFX12-GISEL: ; %bb.0:
5894 ; GFX12-GISEL-NEXT: s_clause 0x1
5895 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5896 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5897 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5898 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
5899 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
5900 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
5901 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5902 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1
5903 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5904 ; GFX12-GISEL-NEXT: s_nop 0
5905 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5906 ; GFX12-GISEL-NEXT: s_endpgm
5907 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
5908 %tidx_i64 = zext i32 %tidx to i64
5909 %undef = freeze i64 poison
5910 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
5911 store i64 %v, ptr addrspace(1) %out
5912 ret void
5913 }
5915 define amdgpu_kernel void @v_permlane16_b32_undef_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
5916 ; GFX10-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
5917 ; GFX10-SDAG: ; %bb.0:
5918 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5919 ; GFX10-SDAG-NEXT: s_clause 0x1
5920 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5921 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5922 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
5923 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5924 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5925 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5926 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5927 ; GFX10-SDAG-NEXT: s_endpgm
5928 ;
5929 ; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
5930 ; GFX10-GISEL: ; %bb.0:
5931 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5932 ; GFX10-GISEL-NEXT: s_clause 0x1
5933 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
5934 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
5935 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
5936 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5937 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5938 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5939 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5940 ; GFX10-GISEL-NEXT: s_endpgm
5941 ;
5942 ; GFX11-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
5943 ; GFX11-SDAG: ; %bb.0:
5944 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5945 ; GFX11-SDAG-NEXT: s_clause 0x1
5946 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5947 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5948 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
5949 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5950 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
5951 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5952 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5953 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5954 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5955 ; GFX11-SDAG-NEXT: s_nop 0
5956 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5957 ; GFX11-SDAG-NEXT: s_endpgm
5958 ;
5959 ; GFX11-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
5960 ; GFX11-GISEL: ; %bb.0:
5961 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5962 ; GFX11-GISEL-NEXT: s_clause 0x1
5963 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5964 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5965 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
5966 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5967 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
5968 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5969 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
5970 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
5971 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5972 ; GFX11-GISEL-NEXT: s_nop 0
5973 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5974 ; GFX11-GISEL-NEXT: s_endpgm
5975 ;
5976 ; GFX12-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
5977 ; GFX12-SDAG: ; %bb.0:
5978 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5979 ; GFX12-SDAG-NEXT: s_clause 0x1
5980 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5981 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5982 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
5983 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
5984 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
5985 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
5986 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
5987 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
5988 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
5989 ; GFX12-SDAG-NEXT: s_nop 0
5990 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
5991 ; GFX12-SDAG-NEXT: s_endpgm
5992 ;
5993 ; GFX12-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
5994 ; GFX12-GISEL: ; %bb.0:
5995 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
5996 ; GFX12-GISEL-NEXT: s_clause 0x1
5997 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
5998 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
5999 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
6000 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6001 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6002 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6003 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
6004 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
6005 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6006 ; GFX12-GISEL-NEXT: s_nop 0
6007 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6008 ; GFX12-GISEL-NEXT: s_endpgm
6009 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6010 %tidx_f32 = bitcast i32 %tidx to float
6011 %tidx_f64 = fpext float %tidx_f32 to double
6012 %undef = freeze double poison
6013 %v = call double @llvm.amdgcn.permlane16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
6014 store double %v, ptr addrspace(1) %out
6015 ret void
6016 }
6018 define amdgpu_kernel void @v_permlane16_b32_i_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6019 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
6020 ; GFX10-SDAG: ; %bb.0:
6021 ; GFX10-SDAG-NEXT: s_clause 0x1
6022 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6023 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6024 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
6025 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6026 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6027 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6028 ; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[4:5]
6029 ; GFX10-SDAG-NEXT: s_endpgm
6030 ;
6031 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
6032 ; GFX10-GISEL: ; %bb.0:
6033 ; GFX10-GISEL-NEXT: s_clause 0x1
6034 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6035 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6036 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
6037 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6038 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6039 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
6040 ; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[4:5]
6041 ; GFX10-GISEL-NEXT: s_endpgm
6042 ;
6043 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
6044 ; GFX11-SDAG: ; %bb.0:
6045 ; GFX11-SDAG-NEXT: s_clause 0x1
6046 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6047 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6048 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6049 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
6050 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6051 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
6052 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6053 ; GFX11-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
6054 ; GFX11-SDAG-NEXT: s_nop 0
6055 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6056 ; GFX11-SDAG-NEXT: s_endpgm
6057 ;
6058 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
6059 ; GFX11-GISEL: ; %bb.0:
6060 ; GFX11-GISEL-NEXT: s_clause 0x1
6061 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6062 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6063 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
6064 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6065 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6066 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
6067 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6068 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
6069 ; GFX11-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
6070 ; GFX11-GISEL-NEXT: s_nop 0
6071 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6072 ; GFX11-GISEL-NEXT: s_endpgm
6073 ;
6074 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
6075 ; GFX12-SDAG: ; %bb.0:
6076 ; GFX12-SDAG-NEXT: s_clause 0x1
6077 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6078 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6079 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6080 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
6081 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6082 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
6083 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6084 ; GFX12-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
6085 ; GFX12-SDAG-NEXT: s_nop 0
6086 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6087 ; GFX12-SDAG-NEXT: s_endpgm
6088 ;
6089 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
6090 ; GFX12-GISEL: ; %bb.0:
6091 ; GFX12-GISEL-NEXT: s_clause 0x1
6092 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6093 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6094 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
6095 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6096 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6097 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
6098 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6099 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
6100 ; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
6101 ; GFX12-GISEL-NEXT: s_nop 0
6102 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6103 ; GFX12-GISEL-NEXT: s_endpgm
6104 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6105 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 12345, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
6106 store i32 %v, ptr addrspace(1) %out
6107 ret void
6108 }
6110 define amdgpu_kernel void @v_permlane16_b32_i_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6111 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
6112 ; GFX10-SDAG: ; %bb.0:
6113 ; GFX10-SDAG-NEXT: s_clause 0x1
6114 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6115 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6116 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x449a5000
6117 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6118 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6119 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6120 ; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[4:5]
6121 ; GFX10-SDAG-NEXT: s_endpgm
6122 ;
6123 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
6124 ; GFX10-GISEL: ; %bb.0:
6125 ; GFX10-GISEL-NEXT: s_clause 0x1
6126 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6127 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6128 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
6129 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6130 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6131 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
6132 ; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[4:5]
6133 ; GFX10-GISEL-NEXT: s_endpgm
6134 ;
6135 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
6136 ; GFX11-SDAG: ; %bb.0:
6137 ; GFX11-SDAG-NEXT: s_clause 0x1
6138 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6139 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6140 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6141 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
6142 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6143 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
6144 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6145 ; GFX11-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
6146 ; GFX11-SDAG-NEXT: s_nop 0
6147 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6148 ; GFX11-SDAG-NEXT: s_endpgm
6149 ;
6150 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
6151 ; GFX11-GISEL: ; %bb.0:
6152 ; GFX11-GISEL-NEXT: s_clause 0x1
6153 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6154 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6155 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
6156 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6157 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6158 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
6159 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6160 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
6161 ; GFX11-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
6162 ; GFX11-GISEL-NEXT: s_nop 0
6163 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6164 ; GFX11-GISEL-NEXT: s_endpgm
6165 ;
6166 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
6167 ; GFX12-SDAG: ; %bb.0:
6168 ; GFX12-SDAG-NEXT: s_clause 0x1
6169 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6170 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6171 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6172 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
6173 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6174 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
6175 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6176 ; GFX12-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
6177 ; GFX12-SDAG-NEXT: s_nop 0
6178 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6179 ; GFX12-SDAG-NEXT: s_endpgm
6180 ;
6181 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
6182 ; GFX12-GISEL: ; %bb.0:
6183 ; GFX12-GISEL-NEXT: s_clause 0x1
6184 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6185 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6186 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
6187 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6188 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6189 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
6190 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6191 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
6192 ; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
6193 ; GFX12-GISEL-NEXT: s_nop 0
6194 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6195 ; GFX12-GISEL-NEXT: s_endpgm
6196 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6197 %tidx_f32 = bitcast i32 %tidx to float
6198 %v = call float @llvm.amdgcn.permlane16.f32(float 1234.5, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
6199 store float %v, ptr addrspace(1) %out
6200 ret void
6201 }
6203 define amdgpu_kernel void @v_permlane16_b32_i_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6204 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
6205 ; GFX10-SDAG: ; %bb.0:
6206 ; GFX10-SDAG-NEXT: s_clause 0x1
6207 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6208 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6209 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6210 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
6211 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0
6212 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6213 ; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
6214 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6215 ; GFX10-SDAG-NEXT: global_store_dwordx2 v3, v[1:2], s[4:5]
6216 ; GFX10-SDAG-NEXT: s_endpgm
6217 ;
6218 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
6219 ; GFX10-GISEL: ; %bb.0:
6220 ; GFX10-GISEL-NEXT: s_clause 0x1
6221 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6222 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6223 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
6224 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6225 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
6226 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6227 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6228 ; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
6229 ; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[4:5]
6230 ; GFX10-GISEL-NEXT: s_endpgm
6231 ;
6232 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
6233 ; GFX11-SDAG: ; %bb.0:
6234 ; GFX11-SDAG-NEXT: s_clause 0x1
6235 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6236 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6237 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
6238 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6239 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6240 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6241 ; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
6242 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6243 ; GFX11-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
6244 ; GFX11-SDAG-NEXT: s_nop 0
6245 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6246 ; GFX11-SDAG-NEXT: s_endpgm
6247 ;
6248 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
6249 ; GFX11-GISEL: ; %bb.0:
6250 ; GFX11-GISEL-NEXT: s_clause 0x1
6251 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6252 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6253 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
6254 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6255 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6256 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
6257 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6258 ; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
6259 ; GFX11-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
6260 ; GFX11-GISEL-NEXT: s_nop 0
6261 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6262 ; GFX11-GISEL-NEXT: s_endpgm
6263 ;
6264 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
6265 ; GFX12-SDAG: ; %bb.0:
6266 ; GFX12-SDAG-NEXT: s_clause 0x1
6267 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6268 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6269 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
6270 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6271 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6272 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6273 ; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
6274 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
6275 ; GFX12-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
6276 ; GFX12-SDAG-NEXT: s_nop 0
6277 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6278 ; GFX12-SDAG-NEXT: s_endpgm
6279 ;
6280 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
6281 ; GFX12-GISEL: ; %bb.0:
6282 ; GFX12-GISEL-NEXT: s_clause 0x1
6283 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6284 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6285 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
6286 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6287 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6288 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
6289 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
6290 ; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
6291 ; GFX12-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
6292 ; GFX12-GISEL-NEXT: s_nop 0
6293 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6294 ; GFX12-GISEL-NEXT: s_endpgm
6295 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6296 %tidx_i64 = zext i32 %tidx to i64
6297 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 12345, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
6298 store i64 %v, ptr addrspace(1) %out
6299 ret void
6300 }
6302 define amdgpu_kernel void @v_permlane16_b32_i_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6303 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
6304 ; GFX10-SDAG: ; %bb.0:
6305 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6306 ; GFX10-SDAG-NEXT: s_clause 0x1
6307 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6308 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6309 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x40934a00
6310 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6311 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0
6312 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6313 ; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v1, s0, s1
6314 ; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v0, s0, s1
6315 ; GFX10-SDAG-NEXT: global_store_dwordx2 v4, v[2:3], s[4:5]
6316 ; GFX10-SDAG-NEXT: s_endpgm
6317 ;
6318 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
6319 ; GFX10-GISEL: ; %bb.0:
6320 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6321 ; GFX10-GISEL-NEXT: s_clause 0x1
6322 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6323 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6324 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6325 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
6326 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
6327 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6328 ; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v0, s0, s1
6329 ; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v1, s0, s1
6330 ; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[4:5]
6331 ; GFX10-GISEL-NEXT: s_endpgm
6332 ;
6333 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
6334 ; GFX11-SDAG: ; %bb.0:
6335 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6336 ; GFX11-SDAG-NEXT: s_clause 0x1
6337 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6338 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6339 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
6340 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, 0
6341 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6342 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6343 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6344 ; GFX11-SDAG-NEXT: v_permlane16_b32 v3, v1, s0, s1
6345 ; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v0, s0, s1
6346 ; GFX11-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
6347 ; GFX11-SDAG-NEXT: s_nop 0
6348 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6349 ; GFX11-SDAG-NEXT: s_endpgm
6350 ;
6351 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
6352 ; GFX11-GISEL: ; %bb.0:
6353 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6354 ; GFX11-GISEL-NEXT: s_clause 0x1
6355 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6356 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6357 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40934a00
6358 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, 0
6359 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6360 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6361 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6362 ; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v0, s0, s1
6363 ; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v1, s0, s1
6364 ; GFX11-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
6365 ; GFX11-GISEL-NEXT: s_nop 0
6366 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6367 ; GFX11-GISEL-NEXT: s_endpgm
6368 ;
6369 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
6370 ; GFX12-SDAG: ; %bb.0:
6371 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6372 ; GFX12-SDAG-NEXT: s_clause 0x1
6373 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6374 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6375 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
6376 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, 0
6377 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6378 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6379 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6380 ; GFX12-SDAG-NEXT: v_permlane16_b32 v3, v1, s0, s1
6381 ; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v0, s0, s1
6382 ; GFX12-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
6383 ; GFX12-SDAG-NEXT: s_nop 0
6384 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6385 ; GFX12-SDAG-NEXT: s_endpgm
6386 ;
6387 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
6388 ; GFX12-GISEL: ; %bb.0:
6389 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6390 ; GFX12-GISEL-NEXT: s_clause 0x1
6391 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6392 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6393 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40934a00
6394 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, 0
6395 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6396 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6397 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6398 ; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v0, s0, s1
6399 ; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v1, s0, s1
6400 ; GFX12-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
6401 ; GFX12-GISEL-NEXT: s_nop 0
6402 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6403 ; GFX12-GISEL-NEXT: s_endpgm
6404 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6405 %tidx_f32 = bitcast i32 %tidx to float
6406 %tidx_f64 = fpext float %tidx_f32 to double
6407 %v = call double @llvm.amdgcn.permlane16.f64(double 1234.5, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
6408 store double %v, ptr addrspace(1) %out
6409 ret void
6410 }
6412 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6413 ; GFX10-LABEL: v_permlane16_b32_i_tid_fi_i32:
6414 ; GFX10: ; %bb.0:
6415 ; GFX10-NEXT: s_clause 0x1
6416 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6417 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6418 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
6419 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
6420 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6421 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
6422 ; GFX10-NEXT: s_endpgm
6423 ;
6424 ; GFX11-LABEL: v_permlane16_b32_i_tid_fi_i32:
6425 ; GFX11: ; %bb.0:
6426 ; GFX11-NEXT: s_clause 0x1
6427 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6428 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6429 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6430 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
6431 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
6432 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6433 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
6434 ; GFX11-NEXT: s_nop 0
6435 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6436 ; GFX11-NEXT: s_endpgm
6437 ;
6438 ; GFX12-LABEL: v_permlane16_b32_i_tid_fi_i32:
6439 ; GFX12: ; %bb.0:
6440 ; GFX12-NEXT: s_clause 0x1
6441 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6442 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6443 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6444 ; GFX12-NEXT: s_wait_kmcnt 0x0
6445 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
6446 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6447 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
6448 ; GFX12-NEXT: s_nop 0
6449 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6450 ; GFX12-NEXT: s_endpgm
6451 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6452 %undef = freeze i32 poison
6453 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 true, i1 false)
6454 store i32 %v, ptr addrspace(1) %out
6455 ret void
6456 }
6458 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6459 ; GFX10-LABEL: v_permlane16_b32_i_tid_fi_f32:
6460 ; GFX10: ; %bb.0:
6461 ; GFX10-NEXT: s_clause 0x1
6462 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6463 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6464 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
6465 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
6466 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6467 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
6468 ; GFX10-NEXT: s_endpgm
6469 ;
6470 ; GFX11-LABEL: v_permlane16_b32_i_tid_fi_f32:
6471 ; GFX11: ; %bb.0:
6472 ; GFX11-NEXT: s_clause 0x1
6473 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6474 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6475 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6476 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
6477 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
6478 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6479 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
6480 ; GFX11-NEXT: s_nop 0
6481 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6482 ; GFX11-NEXT: s_endpgm
6483 ;
6484 ; GFX12-LABEL: v_permlane16_b32_i_tid_fi_f32:
6485 ; GFX12: ; %bb.0:
6486 ; GFX12-NEXT: s_clause 0x1
6487 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6488 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6489 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6490 ; GFX12-NEXT: s_wait_kmcnt 0x0
6491 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
6492 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6493 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
6494 ; GFX12-NEXT: s_nop 0
6495 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6496 ; GFX12-NEXT: s_endpgm
6497 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6498 %tidx_f32 = bitcast i32 %tidx to float
6499 %undef = freeze float poison
6500 %v = call float @llvm.amdgcn.permlane16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 true, i1 false)
6501 store float %v, ptr addrspace(1) %out
6502 ret void
6503 }
6505 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6506 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
6507 ; GFX10-SDAG: ; %bb.0:
6508 ; GFX10-SDAG-NEXT: s_clause 0x1
6509 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6510 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6511 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6512 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6513 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6514 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6515 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6516 ; GFX10-SDAG-NEXT: s_endpgm
6517 ;
6518 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
6519 ; GFX10-GISEL: ; %bb.0:
6520 ; GFX10-GISEL-NEXT: s_clause 0x1
6521 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6522 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6523 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6524 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6525 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6526 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6527 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6528 ; GFX10-GISEL-NEXT: s_endpgm
6529 ;
6530 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
6531 ; GFX11-SDAG: ; %bb.0:
6532 ; GFX11-SDAG-NEXT: s_clause 0x1
6533 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6534 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6535 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
6536 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6537 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6538 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6539 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6540 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6541 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6542 ; GFX11-SDAG-NEXT: s_nop 0
6543 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6544 ; GFX11-SDAG-NEXT: s_endpgm
6545 ;
6546 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
6547 ; GFX11-GISEL: ; %bb.0:
6548 ; GFX11-GISEL-NEXT: s_clause 0x1
6549 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6550 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6551 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6552 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
6553 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6554 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6555 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6556 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6557 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6558 ; GFX11-GISEL-NEXT: s_nop 0
6559 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6560 ; GFX11-GISEL-NEXT: s_endpgm
6561 ;
6562 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
6563 ; GFX12-SDAG: ; %bb.0:
6564 ; GFX12-SDAG-NEXT: s_clause 0x1
6565 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6566 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6567 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
6568 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6569 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6570 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6571 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6572 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6573 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6574 ; GFX12-SDAG-NEXT: s_nop 0
6575 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6576 ; GFX12-SDAG-NEXT: s_endpgm
6577 ;
6578 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
6579 ; GFX12-GISEL: ; %bb.0:
6580 ; GFX12-GISEL-NEXT: s_clause 0x1
6581 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6582 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6583 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6584 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
6585 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6586 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6587 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6588 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
6589 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6590 ; GFX12-GISEL-NEXT: s_nop 0
6591 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6592 ; GFX12-GISEL-NEXT: s_endpgm
6593 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6594 %tidx_i64 = zext i32 %tidx to i64
6595 %undef = freeze i64 poison
6596 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 true, i1 false)
6597 store i64 %v, ptr addrspace(1) %out
6598 ret void
6599 }
6601 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6602 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
6603 ; GFX10-SDAG: ; %bb.0:
6604 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6605 ; GFX10-SDAG-NEXT: s_clause 0x1
6606 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6607 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6608 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6609 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6610 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6611 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6612 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6613 ; GFX10-SDAG-NEXT: s_endpgm
6614 ;
6615 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
6616 ; GFX10-GISEL: ; %bb.0:
6617 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6618 ; GFX10-GISEL-NEXT: s_clause 0x1
6619 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6620 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6621 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6622 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6623 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6624 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6625 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6626 ; GFX10-GISEL-NEXT: s_endpgm
6627 ;
6628 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
6629 ; GFX11-SDAG: ; %bb.0:
6630 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6631 ; GFX11-SDAG-NEXT: s_clause 0x1
6632 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6633 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6634 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
6635 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6636 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6637 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6638 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6639 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6640 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6641 ; GFX11-SDAG-NEXT: s_nop 0
6642 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6643 ; GFX11-SDAG-NEXT: s_endpgm
6644 ;
6645 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
6646 ; GFX11-GISEL: ; %bb.0:
6647 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6648 ; GFX11-GISEL-NEXT: s_clause 0x1
6649 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6650 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6651 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
6652 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6653 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6654 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6655 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6656 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6657 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6658 ; GFX11-GISEL-NEXT: s_nop 0
6659 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6660 ; GFX11-GISEL-NEXT: s_endpgm
6661 ;
6662 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
6663 ; GFX12-SDAG: ; %bb.0:
6664 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6665 ; GFX12-SDAG-NEXT: s_clause 0x1
6666 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6667 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6668 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
6669 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6670 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6671 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6672 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6673 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6674 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6675 ; GFX12-SDAG-NEXT: s_nop 0
6676 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6677 ; GFX12-SDAG-NEXT: s_endpgm
6678 ;
6679 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
6680 ; GFX12-GISEL: ; %bb.0:
6681 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6682 ; GFX12-GISEL-NEXT: s_clause 0x1
6683 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6684 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6685 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
6686 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6687 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6688 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6689 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
6690 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
6691 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6692 ; GFX12-GISEL-NEXT: s_nop 0
6693 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6694 ; GFX12-GISEL-NEXT: s_endpgm
6695 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6696 %tidx_f32 = bitcast i32 %tidx to float
6697 %tidx_f64 = fpext float %tidx_f32 to double
6698 %undef = freeze double poison
6699 %v = call double @llvm.amdgcn.permlane16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 true, i1 false)
6700 store double %v, ptr addrspace(1) %out
6701 ret void
6702 }
6704 define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6705 ; GFX10-LABEL: v_permlane16_b32_i_tid_bc_i32:
6706 ; GFX10: ; %bb.0:
6707 ; GFX10-NEXT: s_clause 0x1
6708 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6709 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6710 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
6711 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
6712 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6713 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
6714 ; GFX10-NEXT: s_endpgm
6715 ;
6716 ; GFX11-LABEL: v_permlane16_b32_i_tid_bc_i32:
6717 ; GFX11: ; %bb.0:
6718 ; GFX11-NEXT: s_clause 0x1
6719 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6720 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6721 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6722 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
6723 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
6724 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6725 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
6726 ; GFX11-NEXT: s_nop 0
6727 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6728 ; GFX11-NEXT: s_endpgm
6729 ;
6730 ; GFX12-LABEL: v_permlane16_b32_i_tid_bc_i32:
6731 ; GFX12: ; %bb.0:
6732 ; GFX12-NEXT: s_clause 0x1
6733 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6734 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6735 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6736 ; GFX12-NEXT: s_wait_kmcnt 0x0
6737 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
6738 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6739 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
6740 ; GFX12-NEXT: s_nop 0
6741 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6742 ; GFX12-NEXT: s_endpgm
6743 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6744 %undef = freeze i32 poison
6745 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 true)
6746 store i32 %v, ptr addrspace(1) %out
6747 ret void
6748 }
6750 define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6751 ; GFX10-LABEL: v_permlane16_b32_i_tid_bc_f32:
6752 ; GFX10: ; %bb.0:
6753 ; GFX10-NEXT: s_clause 0x1
6754 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6755 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6756 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
6757 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
6758 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6759 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
6760 ; GFX10-NEXT: s_endpgm
6761 ;
6762 ; GFX11-LABEL: v_permlane16_b32_i_tid_bc_f32:
6763 ; GFX11: ; %bb.0:
6764 ; GFX11-NEXT: s_clause 0x1
6765 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6766 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6767 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6768 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
6769 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
6770 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6771 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
6772 ; GFX11-NEXT: s_nop 0
6773 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6774 ; GFX11-NEXT: s_endpgm
6775 ;
6776 ; GFX12-LABEL: v_permlane16_b32_i_tid_bc_f32:
6777 ; GFX12: ; %bb.0:
6778 ; GFX12-NEXT: s_clause 0x1
6779 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6780 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6781 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
6782 ; GFX12-NEXT: s_wait_kmcnt 0x0
6783 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
6784 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6785 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
6786 ; GFX12-NEXT: s_nop 0
6787 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6788 ; GFX12-NEXT: s_endpgm
6789 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6790 %tidx_f32 = bitcast i32 %tidx to float
6791 %undef = freeze float poison
6792 %v = call float @llvm.amdgcn.permlane16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 true)
6793 store float %v, ptr addrspace(1) %out
6794 ret void
6795 }
6797 define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6798 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
6799 ; GFX10-SDAG: ; %bb.0:
6800 ; GFX10-SDAG-NEXT: s_clause 0x1
6801 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6802 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6803 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6804 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6805 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6806 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6807 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6808 ; GFX10-SDAG-NEXT: s_endpgm
6809 ;
6810 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
6811 ; GFX10-GISEL: ; %bb.0:
6812 ; GFX10-GISEL-NEXT: s_clause 0x1
6813 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6814 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6815 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6816 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6817 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6818 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6819 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6820 ; GFX10-GISEL-NEXT: s_endpgm
6821 ;
6822 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
6823 ; GFX11-SDAG: ; %bb.0:
6824 ; GFX11-SDAG-NEXT: s_clause 0x1
6825 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6826 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6827 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
6828 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6829 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6830 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6831 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6832 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6833 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6834 ; GFX11-SDAG-NEXT: s_nop 0
6835 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6836 ; GFX11-SDAG-NEXT: s_endpgm
6837 ;
6838 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
6839 ; GFX11-GISEL: ; %bb.0:
6840 ; GFX11-GISEL-NEXT: s_clause 0x1
6841 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6842 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6843 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6844 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
6845 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6846 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6847 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6848 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6849 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6850 ; GFX11-GISEL-NEXT: s_nop 0
6851 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6852 ; GFX11-GISEL-NEXT: s_endpgm
6853 ;
6854 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
6855 ; GFX12-SDAG: ; %bb.0:
6856 ; GFX12-SDAG-NEXT: s_clause 0x1
6857 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6858 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6859 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
6860 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6861 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6862 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6863 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6864 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6865 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6866 ; GFX12-SDAG-NEXT: s_nop 0
6867 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6868 ; GFX12-SDAG-NEXT: s_endpgm
6869 ;
6870 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
6871 ; GFX12-GISEL: ; %bb.0:
6872 ; GFX12-GISEL-NEXT: s_clause 0x1
6873 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6874 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6875 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6876 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
6877 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6878 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
6879 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6880 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
6881 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6882 ; GFX12-GISEL-NEXT: s_nop 0
6883 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6884 ; GFX12-GISEL-NEXT: s_endpgm
6885 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6886 %tidx_i64 = zext i32 %tidx to i64
6887 %undef = freeze i64 poison
6888 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 true)
6889 store i64 %v, ptr addrspace(1) %out
6890 ret void
6891 }
6893 define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6894 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
6895 ; GFX10-SDAG: ; %bb.0:
6896 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6897 ; GFX10-SDAG-NEXT: s_clause 0x1
6898 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6899 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6900 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
6901 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6902 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6903 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6904 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6905 ; GFX10-SDAG-NEXT: s_endpgm
6906 ;
6907 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
6908 ; GFX10-GISEL: ; %bb.0:
6909 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6910 ; GFX10-GISEL-NEXT: s_clause 0x1
6911 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
6912 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
6913 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
6914 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6915 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6916 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6917 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6918 ; GFX10-GISEL-NEXT: s_endpgm
6919 ;
6920 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
6921 ; GFX11-SDAG: ; %bb.0:
6922 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6923 ; GFX11-SDAG-NEXT: s_clause 0x1
6924 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6925 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6926 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
6927 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6928 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
6929 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6930 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6931 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6932 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6933 ; GFX11-SDAG-NEXT: s_nop 0
6934 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6935 ; GFX11-SDAG-NEXT: s_endpgm
6936 ;
6937 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
6938 ; GFX11-GISEL: ; %bb.0:
6939 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6940 ; GFX11-GISEL-NEXT: s_clause 0x1
6941 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6942 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6943 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
6944 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6945 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
6946 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6947 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6948 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6949 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6950 ; GFX11-GISEL-NEXT: s_nop 0
6951 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6952 ; GFX11-GISEL-NEXT: s_endpgm
6953 ;
6954 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
6955 ; GFX12-SDAG: ; %bb.0:
6956 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6957 ; GFX12-SDAG-NEXT: s_clause 0x1
6958 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6959 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6960 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
6961 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6962 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
6963 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6964 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6965 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6966 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6967 ; GFX12-SDAG-NEXT: s_nop 0
6968 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6969 ; GFX12-SDAG-NEXT: s_endpgm
6970 ;
6971 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
6972 ; GFX12-GISEL: ; %bb.0:
6973 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
6974 ; GFX12-GISEL-NEXT: s_clause 0x1
6975 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
6976 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
6977 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
6978 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
6979 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
6980 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
6981 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
6982 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
6983 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
6984 ; GFX12-GISEL-NEXT: s_nop 0
6985 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
6986 ; GFX12-GISEL-NEXT: s_endpgm
6987 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
6988 %tidx_f32 = bitcast i32 %tidx to float
6989 %tidx_f64 = fpext float %tidx_f32 to double
6990 %undef = freeze double poison
6991 %v = call double @llvm.amdgcn.permlane16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 true)
6992 store double %v, ptr addrspace(1) %out
6993 ret void
6994 }
6996 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
6997 ; GFX10-LABEL: v_permlane16_b32_i_tid_fi_bc_i32:
6998 ; GFX10: ; %bb.0:
6999 ; GFX10-NEXT: s_clause 0x1
7000 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7001 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7002 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7003 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7004 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7005 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7006 ; GFX10-NEXT: s_endpgm
7007 ;
7008 ; GFX11-LABEL: v_permlane16_b32_i_tid_fi_bc_i32:
7009 ; GFX11: ; %bb.0:
7010 ; GFX11-NEXT: s_clause 0x1
7011 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7012 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7013 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7014 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7015 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7016 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7017 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7018 ; GFX11-NEXT: s_nop 0
7019 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7020 ; GFX11-NEXT: s_endpgm
7021 ;
7022 ; GFX12-LABEL: v_permlane16_b32_i_tid_fi_bc_i32:
7023 ; GFX12: ; %bb.0:
7024 ; GFX12-NEXT: s_clause 0x1
7025 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7026 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7027 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7028 ; GFX12-NEXT: s_wait_kmcnt 0x0
7029 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7030 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7031 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7032 ; GFX12-NEXT: s_nop 0
7033 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7034 ; GFX12-NEXT: s_endpgm
7035 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7036 %undef = freeze i32 poison
7037 %v = call i32 @llvm.amdgcn.permlane16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 true, i1 true)
7038 store i32 %v, ptr addrspace(1) %out
7039 ret void
7040 }
7042 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7043 ; GFX10-LABEL: v_permlane16_b32_i_tid_fi_bc_f32:
7044 ; GFX10: ; %bb.0:
7045 ; GFX10-NEXT: s_clause 0x1
7046 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7047 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7048 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7049 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7050 ; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7051 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7052 ; GFX10-NEXT: s_endpgm
7053 ;
7054 ; GFX11-LABEL: v_permlane16_b32_i_tid_fi_bc_f32:
7055 ; GFX11: ; %bb.0:
7056 ; GFX11-NEXT: s_clause 0x1
7057 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7058 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7059 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7060 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7061 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7062 ; GFX11-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7063 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7064 ; GFX11-NEXT: s_nop 0
7065 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7066 ; GFX11-NEXT: s_endpgm
7067 ;
7068 ; GFX12-LABEL: v_permlane16_b32_i_tid_fi_bc_f32:
7069 ; GFX12: ; %bb.0:
7070 ; GFX12-NEXT: s_clause 0x1
7071 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7072 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7073 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7074 ; GFX12-NEXT: s_wait_kmcnt 0x0
7075 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7076 ; GFX12-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7077 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7078 ; GFX12-NEXT: s_nop 0
7079 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7080 ; GFX12-NEXT: s_endpgm
7081 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7082 %tidx_f32 = bitcast i32 %tidx to float
7083 %undef = freeze float poison
7084 %v = call float @llvm.amdgcn.permlane16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 true, i1 true)
7085 store float %v, ptr addrspace(1) %out
7086 ret void
7087 }
7089 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7090 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7091 ; GFX10-SDAG: ; %bb.0:
7092 ; GFX10-SDAG-NEXT: s_clause 0x1
7093 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7094 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7095 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7096 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7097 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7098 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7099 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7100 ; GFX10-SDAG-NEXT: s_endpgm
7101 ;
7102 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7103 ; GFX10-GISEL: ; %bb.0:
7104 ; GFX10-GISEL-NEXT: s_clause 0x1
7105 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7106 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7107 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7108 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7109 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7110 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7111 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7112 ; GFX10-GISEL-NEXT: s_endpgm
7113 ;
7114 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7115 ; GFX11-SDAG: ; %bb.0:
7116 ; GFX11-SDAG-NEXT: s_clause 0x1
7117 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7118 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7119 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7120 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7121 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7122 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7123 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7124 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7125 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7126 ; GFX11-SDAG-NEXT: s_nop 0
7127 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7128 ; GFX11-SDAG-NEXT: s_endpgm
7129 ;
7130 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7131 ; GFX11-GISEL: ; %bb.0:
7132 ; GFX11-GISEL-NEXT: s_clause 0x1
7133 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7134 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7135 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7136 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7137 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7138 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7139 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7140 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7141 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7142 ; GFX11-GISEL-NEXT: s_nop 0
7143 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7144 ; GFX11-GISEL-NEXT: s_endpgm
7145 ;
7146 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7147 ; GFX12-SDAG: ; %bb.0:
7148 ; GFX12-SDAG-NEXT: s_clause 0x1
7149 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7150 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7151 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7152 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7153 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7154 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7155 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7156 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7157 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7158 ; GFX12-SDAG-NEXT: s_nop 0
7159 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7160 ; GFX12-SDAG-NEXT: s_endpgm
7161 ;
7162 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
7163 ; GFX12-GISEL: ; %bb.0:
7164 ; GFX12-GISEL-NEXT: s_clause 0x1
7165 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7166 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7167 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7168 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7169 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7170 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7171 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7172 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
7173 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7174 ; GFX12-GISEL-NEXT: s_nop 0
7175 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7176 ; GFX12-GISEL-NEXT: s_endpgm
7177 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7178 %tidx_i64 = zext i32 %tidx to i64
7179 %undef = freeze i64 poison
7180 %v = call i64 @llvm.amdgcn.permlane16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 true, i1 true)
7181 store i64 %v, ptr addrspace(1) %out
7182 ret void
7183 }
7185 define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7186 ; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7187 ; GFX10-SDAG: ; %bb.0:
7188 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7189 ; GFX10-SDAG-NEXT: s_clause 0x1
7190 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7191 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7192 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7193 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7194 ; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7195 ; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7196 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7197 ; GFX10-SDAG-NEXT: s_endpgm
7198 ;
7199 ; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7200 ; GFX10-GISEL: ; %bb.0:
7201 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7202 ; GFX10-GISEL-NEXT: s_clause 0x1
7203 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7204 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7205 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7206 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7207 ; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7208 ; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7209 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7210 ; GFX10-GISEL-NEXT: s_endpgm
7211 ;
7212 ; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7213 ; GFX11-SDAG: ; %bb.0:
7214 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7215 ; GFX11-SDAG-NEXT: s_clause 0x1
7216 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7217 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7218 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7219 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7220 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7221 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7222 ; GFX11-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7223 ; GFX11-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7224 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7225 ; GFX11-SDAG-NEXT: s_nop 0
7226 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7227 ; GFX11-SDAG-NEXT: s_endpgm
7228 ;
7229 ; GFX11-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7230 ; GFX11-GISEL: ; %bb.0:
7231 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7232 ; GFX11-GISEL-NEXT: s_clause 0x1
7233 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7234 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7235 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7236 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7237 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7238 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7239 ; GFX11-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7240 ; GFX11-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7241 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7242 ; GFX11-GISEL-NEXT: s_nop 0
7243 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7244 ; GFX11-GISEL-NEXT: s_endpgm
7245 ;
7246 ; GFX12-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7247 ; GFX12-SDAG: ; %bb.0:
7248 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7249 ; GFX12-SDAG-NEXT: s_clause 0x1
7250 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7251 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7252 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7253 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7254 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7255 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7256 ; GFX12-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7257 ; GFX12-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7258 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7259 ; GFX12-SDAG-NEXT: s_nop 0
7260 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7261 ; GFX12-SDAG-NEXT: s_endpgm
7262 ;
7263 ; GFX12-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
7264 ; GFX12-GISEL: ; %bb.0:
7265 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7266 ; GFX12-GISEL-NEXT: s_clause 0x1
7267 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7268 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7269 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7270 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7271 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7272 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7273 ; GFX12-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
7274 ; GFX12-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
7275 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7276 ; GFX12-GISEL-NEXT: s_nop 0
7277 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7278 ; GFX12-GISEL-NEXT: s_endpgm
7279 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7280 %tidx_f32 = bitcast i32 %tidx to float
7281 %tidx_f64 = fpext float %tidx_f32 to double
7282 %undef = freeze double poison
7283 %v = call double @llvm.amdgcn.permlane16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 true, i1 true)
7284 store double %v, ptr addrspace(1) %out
7285 ret void
7286 }
7288 define amdgpu_kernel void @v_permlanex16_b32_tid_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7289 ; GFX10-LABEL: v_permlanex16_b32_tid_tid_i32:
7290 ; GFX10: ; %bb.0:
7291 ; GFX10-NEXT: s_clause 0x1
7292 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7293 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7294 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7295 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7296 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7297 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7298 ; GFX10-NEXT: s_endpgm
7299 ;
7300 ; GFX11-LABEL: v_permlanex16_b32_tid_tid_i32:
7301 ; GFX11: ; %bb.0:
7302 ; GFX11-NEXT: s_clause 0x1
7303 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7304 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7305 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7306 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7307 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7308 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7309 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7310 ; GFX11-NEXT: s_nop 0
7311 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7312 ; GFX11-NEXT: s_endpgm
7313 ;
7314 ; GFX12-LABEL: v_permlanex16_b32_tid_tid_i32:
7315 ; GFX12: ; %bb.0:
7316 ; GFX12-NEXT: s_clause 0x1
7317 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7318 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7319 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7320 ; GFX12-NEXT: s_wait_kmcnt 0x0
7321 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7322 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7323 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7324 ; GFX12-NEXT: s_nop 0
7325 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7326 ; GFX12-NEXT: s_endpgm
7327 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7328 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %tidx, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
7329 store i32 %v, ptr addrspace(1) %out
7330 ret void
7331 }
7333 define amdgpu_kernel void @v_permlanex16_b32_tid_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7334 ; GFX10-LABEL: v_permlanex16_b32_tid_tid_f32:
7335 ; GFX10: ; %bb.0:
7336 ; GFX10-NEXT: s_clause 0x1
7337 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7338 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7339 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7340 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7341 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7342 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7343 ; GFX10-NEXT: s_endpgm
7344 ;
7345 ; GFX11-LABEL: v_permlanex16_b32_tid_tid_f32:
7346 ; GFX11: ; %bb.0:
7347 ; GFX11-NEXT: s_clause 0x1
7348 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7349 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7350 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7351 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7352 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7353 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7354 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7355 ; GFX11-NEXT: s_nop 0
7356 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7357 ; GFX11-NEXT: s_endpgm
7358 ;
7359 ; GFX12-LABEL: v_permlanex16_b32_tid_tid_f32:
7360 ; GFX12: ; %bb.0:
7361 ; GFX12-NEXT: s_clause 0x1
7362 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7363 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7364 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7365 ; GFX12-NEXT: s_wait_kmcnt 0x0
7366 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7367 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7368 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7369 ; GFX12-NEXT: s_nop 0
7370 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7371 ; GFX12-NEXT: s_endpgm
7372 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7373 %tidx_f32 = bitcast i32 %tidx to float
7374 %v = call float @llvm.amdgcn.permlanex16.f32(float %tidx_f32, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
7375 store float %v, ptr addrspace(1) %out
7376 ret void
7377 }
7379 define amdgpu_kernel void @v_permlanex16_b32_tid_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7380 ; GFX10-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
7381 ; GFX10-SDAG: ; %bb.0:
7382 ; GFX10-SDAG-NEXT: s_clause 0x1
7383 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7384 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7385 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
7386 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7387 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7388 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7389 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7390 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7391 ; GFX10-SDAG-NEXT: s_endpgm
7392 ;
7393 ; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
7394 ; GFX10-GISEL: ; %bb.0:
7395 ; GFX10-GISEL-NEXT: s_clause 0x1
7396 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7397 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7398 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
7399 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7400 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7401 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7402 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7403 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7404 ; GFX10-GISEL-NEXT: s_endpgm
7405 ;
7406 ; GFX11-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
7407 ; GFX11-SDAG: ; %bb.0:
7408 ; GFX11-SDAG-NEXT: s_clause 0x1
7409 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7410 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7411 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7412 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7413 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7414 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
7415 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7416 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7417 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7418 ; GFX11-SDAG-NEXT: s_nop 0
7419 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7420 ; GFX11-SDAG-NEXT: s_endpgm
7421 ;
7422 ; GFX11-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
7423 ; GFX11-GISEL: ; %bb.0:
7424 ; GFX11-GISEL-NEXT: s_clause 0x1
7425 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7426 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7427 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7428 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7429 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7430 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
7431 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7432 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7433 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7434 ; GFX11-GISEL-NEXT: s_nop 0
7435 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7436 ; GFX11-GISEL-NEXT: s_endpgm
7437 ;
7438 ; GFX12-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
7439 ; GFX12-SDAG: ; %bb.0:
7440 ; GFX12-SDAG-NEXT: s_clause 0x1
7441 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7442 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7443 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7444 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7445 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7446 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
7447 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7448 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7449 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7450 ; GFX12-SDAG-NEXT: s_nop 0
7451 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7452 ; GFX12-SDAG-NEXT: s_endpgm
7453 ;
7454 ; GFX12-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
7455 ; GFX12-GISEL: ; %bb.0:
7456 ; GFX12-GISEL-NEXT: s_clause 0x1
7457 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7458 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7459 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7460 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7461 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7462 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
7463 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7464 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7465 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7466 ; GFX12-GISEL-NEXT: s_nop 0
7467 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7468 ; GFX12-GISEL-NEXT: s_endpgm
7469 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7470 %tidx_i64 = zext i32 %tidx to i64
7471 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %tidx_i64, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
7472 store i64 %v, ptr addrspace(1) %out
7473 ret void
7474 }
7476 define amdgpu_kernel void @v_permlanex16_b32_tid_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7477 ; GFX10-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
7478 ; GFX10-SDAG: ; %bb.0:
7479 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7480 ; GFX10-SDAG-NEXT: s_clause 0x1
7481 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7482 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7483 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7484 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7485 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7486 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7487 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7488 ; GFX10-SDAG-NEXT: s_endpgm
7489 ;
7490 ; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
7491 ; GFX10-GISEL: ; %bb.0:
7492 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7493 ; GFX10-GISEL-NEXT: s_clause 0x1
7494 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7495 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7496 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7497 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7498 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7499 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7500 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7501 ; GFX10-GISEL-NEXT: s_endpgm
7502 ;
7503 ; GFX11-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
7504 ; GFX11-SDAG: ; %bb.0:
7505 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7506 ; GFX11-SDAG-NEXT: s_clause 0x1
7507 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7508 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7509 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7510 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7511 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7512 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7513 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7514 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7515 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7516 ; GFX11-SDAG-NEXT: s_nop 0
7517 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7518 ; GFX11-SDAG-NEXT: s_endpgm
7519 ;
7520 ; GFX11-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
7521 ; GFX11-GISEL: ; %bb.0:
7522 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7523 ; GFX11-GISEL-NEXT: s_clause 0x1
7524 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7525 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7526 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7527 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7528 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7529 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7530 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7531 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7532 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7533 ; GFX11-GISEL-NEXT: s_nop 0
7534 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7535 ; GFX11-GISEL-NEXT: s_endpgm
7536 ;
7537 ; GFX12-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
7538 ; GFX12-SDAG: ; %bb.0:
7539 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7540 ; GFX12-SDAG-NEXT: s_clause 0x1
7541 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7542 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7543 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7544 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7545 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7546 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7547 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7548 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7549 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7550 ; GFX12-SDAG-NEXT: s_nop 0
7551 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7552 ; GFX12-SDAG-NEXT: s_endpgm
7553 ;
7554 ; GFX12-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
7555 ; GFX12-GISEL: ; %bb.0:
7556 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7557 ; GFX12-GISEL-NEXT: s_clause 0x1
7558 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7559 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7560 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7561 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7562 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7563 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7564 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7565 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7566 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7567 ; GFX12-GISEL-NEXT: s_nop 0
7568 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7569 ; GFX12-GISEL-NEXT: s_endpgm
7570 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7571 %tidx_f32 = bitcast i32 %tidx to float
7572 %tidx_f64 = fpext float %tidx_f32 to double
7573 %v = call double @llvm.amdgcn.permlanex16.f64(double %tidx_f64, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
7574 store double %v, ptr addrspace(1) %out
7575 ret void
7576 }
7578 define amdgpu_kernel void @v_permlanex16_b32_undef_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7579 ; GFX10-LABEL: v_permlanex16_b32_undef_tid_i32:
7580 ; GFX10: ; %bb.0:
7581 ; GFX10-NEXT: s_clause 0x1
7582 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7583 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7584 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7585 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7586 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7587 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7588 ; GFX10-NEXT: s_endpgm
7589 ;
7590 ; GFX11-LABEL: v_permlanex16_b32_undef_tid_i32:
7591 ; GFX11: ; %bb.0:
7592 ; GFX11-NEXT: s_clause 0x1
7593 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7594 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7595 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7596 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7597 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7598 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7599 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7600 ; GFX11-NEXT: s_nop 0
7601 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7602 ; GFX11-NEXT: s_endpgm
7603 ;
7604 ; GFX12-LABEL: v_permlanex16_b32_undef_tid_i32:
7605 ; GFX12: ; %bb.0:
7606 ; GFX12-NEXT: s_clause 0x1
7607 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7608 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7609 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7610 ; GFX12-NEXT: s_wait_kmcnt 0x0
7611 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7612 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7613 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7614 ; GFX12-NEXT: s_nop 0
7615 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7616 ; GFX12-NEXT: s_endpgm
7617 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7618 %undef = freeze i32 poison
7619 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
7620 store i32 %v, ptr addrspace(1) %out
7621 ret void
7622 }
7624 define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7625 ; GFX10-LABEL: v_permlanex16_b32_undef_tid_f32:
7626 ; GFX10: ; %bb.0:
7627 ; GFX10-NEXT: s_clause 0x1
7628 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7629 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7630 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
7631 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
7632 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7633 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
7634 ; GFX10-NEXT: s_endpgm
7635 ;
7636 ; GFX11-LABEL: v_permlanex16_b32_undef_tid_f32:
7637 ; GFX11: ; %bb.0:
7638 ; GFX11-NEXT: s_clause 0x1
7639 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7640 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7641 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7642 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
7643 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
7644 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7645 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
7646 ; GFX11-NEXT: s_nop 0
7647 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7648 ; GFX11-NEXT: s_endpgm
7649 ;
7650 ; GFX12-LABEL: v_permlanex16_b32_undef_tid_f32:
7651 ; GFX12: ; %bb.0:
7652 ; GFX12-NEXT: s_clause 0x1
7653 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7654 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7655 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
7656 ; GFX12-NEXT: s_wait_kmcnt 0x0
7657 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
7658 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7659 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
7660 ; GFX12-NEXT: s_nop 0
7661 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7662 ; GFX12-NEXT: s_endpgm
7663 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7664 %tidx_f32 = bitcast i32 %tidx to float
7665 %undef = freeze float poison
7666 %v = call float @llvm.amdgcn.permlanex16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
7667 store float %v, ptr addrspace(1) %out
7668 ret void
7669 }
7671 define amdgpu_kernel void @v_permlanex16_b32_undef_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7672 ; GFX10-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
7673 ; GFX10-SDAG: ; %bb.0:
7674 ; GFX10-SDAG-NEXT: s_clause 0x1
7675 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7676 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7677 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7678 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7679 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7680 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7681 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7682 ; GFX10-SDAG-NEXT: s_endpgm
7683 ;
7684 ; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
7685 ; GFX10-GISEL: ; %bb.0:
7686 ; GFX10-GISEL-NEXT: s_clause 0x1
7687 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7688 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7689 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7690 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7691 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7692 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7693 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7694 ; GFX10-GISEL-NEXT: s_endpgm
7695 ;
7696 ; GFX11-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
7697 ; GFX11-SDAG: ; %bb.0:
7698 ; GFX11-SDAG-NEXT: s_clause 0x1
7699 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7700 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7701 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7702 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7703 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7704 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7705 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7706 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7707 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7708 ; GFX11-SDAG-NEXT: s_nop 0
7709 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7710 ; GFX11-SDAG-NEXT: s_endpgm
7711 ;
7712 ; GFX11-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
7713 ; GFX11-GISEL: ; %bb.0:
7714 ; GFX11-GISEL-NEXT: s_clause 0x1
7715 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7716 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7717 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7718 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7719 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7720 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7721 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7722 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7723 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7724 ; GFX11-GISEL-NEXT: s_nop 0
7725 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7726 ; GFX11-GISEL-NEXT: s_endpgm
7727 ;
7728 ; GFX12-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
7729 ; GFX12-SDAG: ; %bb.0:
7730 ; GFX12-SDAG-NEXT: s_clause 0x1
7731 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7732 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7733 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7734 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7735 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7736 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7737 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7738 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7739 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7740 ; GFX12-SDAG-NEXT: s_nop 0
7741 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7742 ; GFX12-SDAG-NEXT: s_endpgm
7743 ;
7744 ; GFX12-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
7745 ; GFX12-GISEL: ; %bb.0:
7746 ; GFX12-GISEL-NEXT: s_clause 0x1
7747 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7748 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7749 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7750 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7751 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7752 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
7753 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7754 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1
7755 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7756 ; GFX12-GISEL-NEXT: s_nop 0
7757 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7758 ; GFX12-GISEL-NEXT: s_endpgm
7759 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7760 %tidx_i64 = zext i32 %tidx to i64
7761 %undef = freeze i64 poison
7762 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
7763 store i64 %v, ptr addrspace(1) %out
7764 ret void
7765 }
7767 define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7768 ; GFX10-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
7769 ; GFX10-SDAG: ; %bb.0:
7770 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7771 ; GFX10-SDAG-NEXT: s_clause 0x1
7772 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7773 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7774 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7775 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7776 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7777 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7778 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7779 ; GFX10-SDAG-NEXT: s_endpgm
7780 ;
7781 ; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
7782 ; GFX10-GISEL: ; %bb.0:
7783 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7784 ; GFX10-GISEL-NEXT: s_clause 0x1
7785 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7786 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7787 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
7788 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7789 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7790 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7791 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7792 ; GFX10-GISEL-NEXT: s_endpgm
7793 ;
7794 ; GFX11-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
7795 ; GFX11-SDAG: ; %bb.0:
7796 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7797 ; GFX11-SDAG-NEXT: s_clause 0x1
7798 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7799 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7800 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
7801 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7802 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7803 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7804 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7805 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7806 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7807 ; GFX11-SDAG-NEXT: s_nop 0
7808 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7809 ; GFX11-SDAG-NEXT: s_endpgm
7810 ;
7811 ; GFX11-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
7812 ; GFX11-GISEL: ; %bb.0:
7813 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7814 ; GFX11-GISEL-NEXT: s_clause 0x1
7815 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7816 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7817 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
7818 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7819 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7820 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7821 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7822 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7823 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7824 ; GFX11-GISEL-NEXT: s_nop 0
7825 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7826 ; GFX11-GISEL-NEXT: s_endpgm
7827 ;
7828 ; GFX12-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
7829 ; GFX12-SDAG: ; %bb.0:
7830 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7831 ; GFX12-SDAG-NEXT: s_clause 0x1
7832 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7833 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7834 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
7835 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7836 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7837 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7838 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7839 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7840 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7841 ; GFX12-SDAG-NEXT: s_nop 0
7842 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7843 ; GFX12-SDAG-NEXT: s_endpgm
7844 ;
7845 ; GFX12-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
7846 ; GFX12-GISEL: ; %bb.0:
7847 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7848 ; GFX12-GISEL-NEXT: s_clause 0x1
7849 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7850 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7851 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
7852 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
7853 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7854 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
7855 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
7856 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
7857 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
7858 ; GFX12-GISEL-NEXT: s_nop 0
7859 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7860 ; GFX12-GISEL-NEXT: s_endpgm
7861 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7862 %tidx_f32 = bitcast i32 %tidx to float
7863 %tidx_f64 = fpext float %tidx_f32 to double
7864 %undef = freeze double poison
7865 %v = call double @llvm.amdgcn.permlanex16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
7866 store double %v, ptr addrspace(1) %out
7867 ret void
7868 }
7870 define amdgpu_kernel void @v_permlanex16_b32_i_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7871 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
7872 ; GFX10-SDAG: ; %bb.0:
7873 ; GFX10-SDAG-NEXT: s_clause 0x1
7874 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7875 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7876 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
7877 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7878 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7879 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7880 ; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[4:5]
7881 ; GFX10-SDAG-NEXT: s_endpgm
7882 ;
7883 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
7884 ; GFX10-GISEL: ; %bb.0:
7885 ; GFX10-GISEL-NEXT: s_clause 0x1
7886 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7887 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7888 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
7889 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7890 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7891 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
7892 ; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[4:5]
7893 ; GFX10-GISEL-NEXT: s_endpgm
7894 ;
7895 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
7896 ; GFX11-SDAG: ; %bb.0:
7897 ; GFX11-SDAG-NEXT: s_clause 0x1
7898 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7899 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7900 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7901 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
7902 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7903 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
7904 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7905 ; GFX11-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
7906 ; GFX11-SDAG-NEXT: s_nop 0
7907 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7908 ; GFX11-SDAG-NEXT: s_endpgm
7909 ;
7910 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
7911 ; GFX11-GISEL: ; %bb.0:
7912 ; GFX11-GISEL-NEXT: s_clause 0x1
7913 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7914 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7915 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
7916 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7917 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7918 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
7919 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7920 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
7921 ; GFX11-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
7922 ; GFX11-GISEL-NEXT: s_nop 0
7923 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7924 ; GFX11-GISEL-NEXT: s_endpgm
7925 ;
7926 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
7927 ; GFX12-SDAG: ; %bb.0:
7928 ; GFX12-SDAG-NEXT: s_clause 0x1
7929 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7930 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7931 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7932 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
7933 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
7934 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
7935 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7936 ; GFX12-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
7937 ; GFX12-SDAG-NEXT: s_nop 0
7938 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7939 ; GFX12-SDAG-NEXT: s_endpgm
7940 ;
7941 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
7942 ; GFX12-GISEL: ; %bb.0:
7943 ; GFX12-GISEL-NEXT: s_clause 0x1
7944 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7945 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7946 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
7947 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7948 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
7949 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
7950 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7951 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
7952 ; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
7953 ; GFX12-GISEL-NEXT: s_nop 0
7954 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
7955 ; GFX12-GISEL-NEXT: s_endpgm
7956 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
7957 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 12345, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 false)
7958 store i32 %v, ptr addrspace(1) %out
7959 ret void
7960 }
7962 define amdgpu_kernel void @v_permlanex16_b32_i_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
7963 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
7964 ; GFX10-SDAG: ; %bb.0:
7965 ; GFX10-SDAG-NEXT: s_clause 0x1
7966 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7967 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7968 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x449a5000
7969 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
7970 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7971 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7972 ; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[4:5]
7973 ; GFX10-SDAG-NEXT: s_endpgm
7974 ;
7975 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
7976 ; GFX10-GISEL: ; %bb.0:
7977 ; GFX10-GISEL-NEXT: s_clause 0x1
7978 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
7979 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
7980 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
7981 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
7982 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7983 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
7984 ; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[4:5]
7985 ; GFX10-GISEL-NEXT: s_endpgm
7986 ;
7987 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
7988 ; GFX11-SDAG: ; %bb.0:
7989 ; GFX11-SDAG-NEXT: s_clause 0x1
7990 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
7991 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
7992 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
7993 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
7994 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
7995 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
7996 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
7997 ; GFX11-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
7998 ; GFX11-SDAG-NEXT: s_nop 0
7999 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8000 ; GFX11-SDAG-NEXT: s_endpgm
8001 ;
8002 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
8003 ; GFX11-GISEL: ; %bb.0:
8004 ; GFX11-GISEL-NEXT: s_clause 0x1
8005 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8006 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8007 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
8008 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8009 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8010 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
8011 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8012 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
8013 ; GFX11-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
8014 ; GFX11-GISEL-NEXT: s_nop 0
8015 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8016 ; GFX11-GISEL-NEXT: s_endpgm
8017 ;
8018 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
8019 ; GFX12-SDAG: ; %bb.0:
8020 ; GFX12-SDAG-NEXT: s_clause 0x1
8021 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8022 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8023 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8024 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
8025 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8026 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
8027 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8028 ; GFX12-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
8029 ; GFX12-SDAG-NEXT: s_nop 0
8030 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8031 ; GFX12-SDAG-NEXT: s_endpgm
8032 ;
8033 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
8034 ; GFX12-GISEL: ; %bb.0:
8035 ; GFX12-GISEL-NEXT: s_clause 0x1
8036 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8037 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8038 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
8039 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8040 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8041 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
8042 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8043 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
8044 ; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
8045 ; GFX12-GISEL-NEXT: s_nop 0
8046 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8047 ; GFX12-GISEL-NEXT: s_endpgm
8048 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8049 %tidx_f32 = bitcast i32 %tidx to float
8050 %v = call float @llvm.amdgcn.permlanex16.f32(float 1234.5, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 false)
8051 store float %v, ptr addrspace(1) %out
8052 ret void
8053 }
8055 define amdgpu_kernel void @v_permlanex16_b32_i_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8056 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
8057 ; GFX10-SDAG: ; %bb.0:
8058 ; GFX10-SDAG-NEXT: s_clause 0x1
8059 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8060 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8061 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8062 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
8063 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0
8064 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8065 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8066 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8067 ; GFX10-SDAG-NEXT: global_store_dwordx2 v3, v[1:2], s[4:5]
8068 ; GFX10-SDAG-NEXT: s_endpgm
8069 ;
8070 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
8071 ; GFX10-GISEL: ; %bb.0:
8072 ; GFX10-GISEL-NEXT: s_clause 0x1
8073 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8074 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8075 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
8076 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8077 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
8078 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8079 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8080 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8081 ; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[4:5]
8082 ; GFX10-GISEL-NEXT: s_endpgm
8083 ;
8084 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
8085 ; GFX11-SDAG: ; %bb.0:
8086 ; GFX11-SDAG-NEXT: s_clause 0x1
8087 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8088 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8089 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
8090 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8091 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8092 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8093 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8094 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8095 ; GFX11-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
8096 ; GFX11-SDAG-NEXT: s_nop 0
8097 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8098 ; GFX11-SDAG-NEXT: s_endpgm
8099 ;
8100 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
8101 ; GFX11-GISEL: ; %bb.0:
8102 ; GFX11-GISEL-NEXT: s_clause 0x1
8103 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8104 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8105 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
8106 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8107 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8108 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
8109 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8110 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8111 ; GFX11-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
8112 ; GFX11-GISEL-NEXT: s_nop 0
8113 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8114 ; GFX11-GISEL-NEXT: s_endpgm
8115 ;
8116 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
8117 ; GFX12-SDAG: ; %bb.0:
8118 ; GFX12-SDAG-NEXT: s_clause 0x1
8119 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8120 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8121 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
8122 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8123 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8124 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8125 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8126 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8127 ; GFX12-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
8128 ; GFX12-SDAG-NEXT: s_nop 0
8129 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8130 ; GFX12-SDAG-NEXT: s_endpgm
8131 ;
8132 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
8133 ; GFX12-GISEL: ; %bb.0:
8134 ; GFX12-GISEL-NEXT: s_clause 0x1
8135 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8136 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8137 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
8138 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8139 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8140 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
8141 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
8142 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
8143 ; GFX12-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
8144 ; GFX12-GISEL-NEXT: s_nop 0
8145 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8146 ; GFX12-GISEL-NEXT: s_endpgm
8147 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8148 %tidx_i64 = zext i32 %tidx to i64
8149 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 12345, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 false)
8150 store i64 %v, ptr addrspace(1) %out
8151 ret void
8152 }
8154 define amdgpu_kernel void @v_permlanex16_b32_i_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8155 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
8156 ; GFX10-SDAG: ; %bb.0:
8157 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8158 ; GFX10-SDAG-NEXT: s_clause 0x1
8159 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8160 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8161 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x40934a00
8162 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8163 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0
8164 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8165 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8166 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8167 ; GFX10-SDAG-NEXT: global_store_dwordx2 v4, v[2:3], s[4:5]
8168 ; GFX10-SDAG-NEXT: s_endpgm
8169 ;
8170 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
8171 ; GFX10-GISEL: ; %bb.0:
8172 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8173 ; GFX10-GISEL-NEXT: s_clause 0x1
8174 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8175 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8176 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8177 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
8178 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
8179 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8180 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8181 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8182 ; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[4:5]
8183 ; GFX10-GISEL-NEXT: s_endpgm
8184 ;
8185 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
8186 ; GFX11-SDAG: ; %bb.0:
8187 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8188 ; GFX11-SDAG-NEXT: s_clause 0x1
8189 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8190 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8191 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
8192 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, 0
8193 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8194 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8195 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8196 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8197 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8198 ; GFX11-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
8199 ; GFX11-SDAG-NEXT: s_nop 0
8200 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8201 ; GFX11-SDAG-NEXT: s_endpgm
8202 ;
8203 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
8204 ; GFX11-GISEL: ; %bb.0:
8205 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8206 ; GFX11-GISEL-NEXT: s_clause 0x1
8207 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8208 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8209 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40934a00
8210 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, 0
8211 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8212 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8213 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8214 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8215 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8216 ; GFX11-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
8217 ; GFX11-GISEL-NEXT: s_nop 0
8218 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8219 ; GFX11-GISEL-NEXT: s_endpgm
8220 ;
8221 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
8222 ; GFX12-SDAG: ; %bb.0:
8223 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8224 ; GFX12-SDAG-NEXT: s_clause 0x1
8225 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8226 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8227 ; GFX12-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
8228 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, 0
8229 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8230 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8231 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8232 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8233 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8234 ; GFX12-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
8235 ; GFX12-SDAG-NEXT: s_nop 0
8236 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8237 ; GFX12-SDAG-NEXT: s_endpgm
8238 ;
8239 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
8240 ; GFX12-GISEL: ; %bb.0:
8241 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8242 ; GFX12-GISEL-NEXT: s_clause 0x1
8243 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8244 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8245 ; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40934a00
8246 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, 0
8247 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8248 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8249 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8250 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v0, s0, s1
8251 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v1, s0, s1
8252 ; GFX12-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
8253 ; GFX12-GISEL-NEXT: s_nop 0
8254 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8255 ; GFX12-GISEL-NEXT: s_endpgm
8256 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8257 %tidx_f32 = bitcast i32 %tidx to float
8258 %tidx_f64 = fpext float %tidx_f32 to double
8259 %v = call double @llvm.amdgcn.permlanex16.f64(double 1234.5, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 false)
8260 store double %v, ptr addrspace(1) %out
8261 ret void
8262 }
8264 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8265 ; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_i32:
8266 ; GFX10: ; %bb.0:
8267 ; GFX10-NEXT: s_clause 0x1
8268 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8269 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8270 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8271 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8272 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8273 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8274 ; GFX10-NEXT: s_endpgm
8275 ;
8276 ; GFX11-LABEL: v_permlanex16_b32_i_tid_fi_i32:
8277 ; GFX11: ; %bb.0:
8278 ; GFX11-NEXT: s_clause 0x1
8279 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8280 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8281 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8282 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8283 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8284 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8285 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8286 ; GFX11-NEXT: s_nop 0
8287 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8288 ; GFX11-NEXT: s_endpgm
8289 ;
8290 ; GFX12-LABEL: v_permlanex16_b32_i_tid_fi_i32:
8291 ; GFX12: ; %bb.0:
8292 ; GFX12-NEXT: s_clause 0x1
8293 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8294 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8295 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8296 ; GFX12-NEXT: s_wait_kmcnt 0x0
8297 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8298 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8299 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8300 ; GFX12-NEXT: s_nop 0
8301 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8302 ; GFX12-NEXT: s_endpgm
8303 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8304 %undef = freeze i32 poison
8305 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 true, i1 false)
8306 store i32 %v, ptr addrspace(1) %out
8307 ret void
8308 }
8310 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8311 ; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_f32:
8312 ; GFX10: ; %bb.0:
8313 ; GFX10-NEXT: s_clause 0x1
8314 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8315 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8316 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8317 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8318 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8319 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8320 ; GFX10-NEXT: s_endpgm
8321 ;
8322 ; GFX11-LABEL: v_permlanex16_b32_i_tid_fi_f32:
8323 ; GFX11: ; %bb.0:
8324 ; GFX11-NEXT: s_clause 0x1
8325 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8326 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8327 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8328 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8329 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8330 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8331 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8332 ; GFX11-NEXT: s_nop 0
8333 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8334 ; GFX11-NEXT: s_endpgm
8335 ;
8336 ; GFX12-LABEL: v_permlanex16_b32_i_tid_fi_f32:
8337 ; GFX12: ; %bb.0:
8338 ; GFX12-NEXT: s_clause 0x1
8339 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8340 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8341 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8342 ; GFX12-NEXT: s_wait_kmcnt 0x0
8343 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8344 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8345 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8346 ; GFX12-NEXT: s_nop 0
8347 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8348 ; GFX12-NEXT: s_endpgm
8349 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8350 %tidx_f32 = bitcast i32 %tidx to float
8351 %undef = freeze float poison
8352 %v = call float @llvm.amdgcn.permlanex16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 true, i1 false)
8353 store float %v, ptr addrspace(1) %out
8354 ret void
8355 }
8357 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8358 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8359 ; GFX10-SDAG: ; %bb.0:
8360 ; GFX10-SDAG-NEXT: s_clause 0x1
8361 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8362 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8363 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8364 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8365 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8366 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8367 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8368 ; GFX10-SDAG-NEXT: s_endpgm
8369 ;
8370 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8371 ; GFX10-GISEL: ; %bb.0:
8372 ; GFX10-GISEL-NEXT: s_clause 0x1
8373 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8374 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8375 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8376 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8377 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8378 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8379 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8380 ; GFX10-GISEL-NEXT: s_endpgm
8381 ;
8382 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8383 ; GFX11-SDAG: ; %bb.0:
8384 ; GFX11-SDAG-NEXT: s_clause 0x1
8385 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8386 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8387 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
8388 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8389 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8390 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8391 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8392 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8393 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8394 ; GFX11-SDAG-NEXT: s_nop 0
8395 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8396 ; GFX11-SDAG-NEXT: s_endpgm
8397 ;
8398 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8399 ; GFX11-GISEL: ; %bb.0:
8400 ; GFX11-GISEL-NEXT: s_clause 0x1
8401 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8402 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8403 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8404 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
8405 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8406 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8407 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8408 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8409 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8410 ; GFX11-GISEL-NEXT: s_nop 0
8411 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8412 ; GFX11-GISEL-NEXT: s_endpgm
8413 ;
8414 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8415 ; GFX12-SDAG: ; %bb.0:
8416 ; GFX12-SDAG-NEXT: s_clause 0x1
8417 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8418 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8419 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
8420 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8421 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8422 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8423 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8424 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8425 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8426 ; GFX12-SDAG-NEXT: s_nop 0
8427 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8428 ; GFX12-SDAG-NEXT: s_endpgm
8429 ;
8430 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
8431 ; GFX12-GISEL: ; %bb.0:
8432 ; GFX12-GISEL-NEXT: s_clause 0x1
8433 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8434 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8435 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8436 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
8437 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8438 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8439 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8440 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
8441 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8442 ; GFX12-GISEL-NEXT: s_nop 0
8443 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8444 ; GFX12-GISEL-NEXT: s_endpgm
8445 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8446 %tidx_i64 = zext i32 %tidx to i64
8447 %undef = freeze i64 poison
8448 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 true, i1 false)
8449 store i64 %v, ptr addrspace(1) %out
8450 ret void
8451 }
8453 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8454 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8455 ; GFX10-SDAG: ; %bb.0:
8456 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8457 ; GFX10-SDAG-NEXT: s_clause 0x1
8458 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8459 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8460 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8461 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8462 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8463 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8464 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8465 ; GFX10-SDAG-NEXT: s_endpgm
8466 ;
8467 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8468 ; GFX10-GISEL: ; %bb.0:
8469 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8470 ; GFX10-GISEL-NEXT: s_clause 0x1
8471 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8472 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8473 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8474 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8475 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8476 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8477 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8478 ; GFX10-GISEL-NEXT: s_endpgm
8479 ;
8480 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8481 ; GFX11-SDAG: ; %bb.0:
8482 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8483 ; GFX11-SDAG-NEXT: s_clause 0x1
8484 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8485 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8486 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
8487 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8488 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8489 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8490 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8491 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8492 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8493 ; GFX11-SDAG-NEXT: s_nop 0
8494 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8495 ; GFX11-SDAG-NEXT: s_endpgm
8496 ;
8497 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8498 ; GFX11-GISEL: ; %bb.0:
8499 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8500 ; GFX11-GISEL-NEXT: s_clause 0x1
8501 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8502 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8503 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
8504 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8505 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8506 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8507 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8508 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8509 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8510 ; GFX11-GISEL-NEXT: s_nop 0
8511 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8512 ; GFX11-GISEL-NEXT: s_endpgm
8513 ;
8514 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8515 ; GFX12-SDAG: ; %bb.0:
8516 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8517 ; GFX12-SDAG-NEXT: s_clause 0x1
8518 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8519 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8520 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
8521 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8522 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8523 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8524 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8525 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8526 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8527 ; GFX12-SDAG-NEXT: s_nop 0
8528 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8529 ; GFX12-SDAG-NEXT: s_endpgm
8530 ;
8531 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
8532 ; GFX12-GISEL: ; %bb.0:
8533 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8534 ; GFX12-GISEL-NEXT: s_clause 0x1
8535 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8536 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8537 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
8538 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8539 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8540 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8541 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
8542 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
8543 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8544 ; GFX12-GISEL-NEXT: s_nop 0
8545 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8546 ; GFX12-GISEL-NEXT: s_endpgm
8547 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8548 %tidx_f32 = bitcast i32 %tidx to float
8549 %tidx_f64 = fpext float %tidx_f32 to double
8550 %undef = freeze double poison
8551 %v = call double @llvm.amdgcn.permlanex16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 true, i1 false)
8552 store double %v, ptr addrspace(1) %out
8553 ret void
8554 }
8556 define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8557 ; GFX10-LABEL: v_permlanex16_b32_i_tid_bc_i32:
8558 ; GFX10: ; %bb.0:
8559 ; GFX10-NEXT: s_clause 0x1
8560 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8561 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8562 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8563 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8564 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8565 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8566 ; GFX10-NEXT: s_endpgm
8567 ;
8568 ; GFX11-LABEL: v_permlanex16_b32_i_tid_bc_i32:
8569 ; GFX11: ; %bb.0:
8570 ; GFX11-NEXT: s_clause 0x1
8571 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8572 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8573 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8574 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8575 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8576 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8577 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8578 ; GFX11-NEXT: s_nop 0
8579 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8580 ; GFX11-NEXT: s_endpgm
8581 ;
8582 ; GFX12-LABEL: v_permlanex16_b32_i_tid_bc_i32:
8583 ; GFX12: ; %bb.0:
8584 ; GFX12-NEXT: s_clause 0x1
8585 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8586 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8587 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8588 ; GFX12-NEXT: s_wait_kmcnt 0x0
8589 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8590 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8591 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8592 ; GFX12-NEXT: s_nop 0
8593 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8594 ; GFX12-NEXT: s_endpgm
8595 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8596 %undef = freeze i32 poison
8597 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 false, i1 true)
8598 store i32 %v, ptr addrspace(1) %out
8599 ret void
8600 }
8602 define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8603 ; GFX10-LABEL: v_permlanex16_b32_i_tid_bc_f32:
8604 ; GFX10: ; %bb.0:
8605 ; GFX10-NEXT: s_clause 0x1
8606 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8607 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8608 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8609 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8610 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8611 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8612 ; GFX10-NEXT: s_endpgm
8613 ;
8614 ; GFX11-LABEL: v_permlanex16_b32_i_tid_bc_f32:
8615 ; GFX11: ; %bb.0:
8616 ; GFX11-NEXT: s_clause 0x1
8617 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8618 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8619 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8620 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8621 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8622 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8623 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8624 ; GFX11-NEXT: s_nop 0
8625 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8626 ; GFX11-NEXT: s_endpgm
8627 ;
8628 ; GFX12-LABEL: v_permlanex16_b32_i_tid_bc_f32:
8629 ; GFX12: ; %bb.0:
8630 ; GFX12-NEXT: s_clause 0x1
8631 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8632 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8633 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8634 ; GFX12-NEXT: s_wait_kmcnt 0x0
8635 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8636 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8637 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8638 ; GFX12-NEXT: s_nop 0
8639 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8640 ; GFX12-NEXT: s_endpgm
8641 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8642 %tidx_f32 = bitcast i32 %tidx to float
8643 %undef = freeze float poison
8644 %v = call float @llvm.amdgcn.permlanex16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 false, i1 true)
8645 store float %v, ptr addrspace(1) %out
8646 ret void
8647 }
8649 define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8650 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8651 ; GFX10-SDAG: ; %bb.0:
8652 ; GFX10-SDAG-NEXT: s_clause 0x1
8653 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8654 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8655 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8656 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8657 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8658 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8659 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8660 ; GFX10-SDAG-NEXT: s_endpgm
8661 ;
8662 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8663 ; GFX10-GISEL: ; %bb.0:
8664 ; GFX10-GISEL-NEXT: s_clause 0x1
8665 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8666 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8667 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8668 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8669 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8670 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8671 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8672 ; GFX10-GISEL-NEXT: s_endpgm
8673 ;
8674 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8675 ; GFX11-SDAG: ; %bb.0:
8676 ; GFX11-SDAG-NEXT: s_clause 0x1
8677 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8678 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8679 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
8680 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8681 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8682 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8683 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8684 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8685 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8686 ; GFX11-SDAG-NEXT: s_nop 0
8687 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8688 ; GFX11-SDAG-NEXT: s_endpgm
8689 ;
8690 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8691 ; GFX11-GISEL: ; %bb.0:
8692 ; GFX11-GISEL-NEXT: s_clause 0x1
8693 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8694 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8695 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8696 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
8697 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8698 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8699 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8700 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8701 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8702 ; GFX11-GISEL-NEXT: s_nop 0
8703 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8704 ; GFX11-GISEL-NEXT: s_endpgm
8705 ;
8706 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8707 ; GFX12-SDAG: ; %bb.0:
8708 ; GFX12-SDAG-NEXT: s_clause 0x1
8709 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8710 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8711 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
8712 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8713 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8714 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8715 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8716 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8717 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8718 ; GFX12-SDAG-NEXT: s_nop 0
8719 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8720 ; GFX12-SDAG-NEXT: s_endpgm
8721 ;
8722 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
8723 ; GFX12-GISEL: ; %bb.0:
8724 ; GFX12-GISEL-NEXT: s_clause 0x1
8725 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8726 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8727 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8728 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
8729 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8730 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8731 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8732 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
8733 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8734 ; GFX12-GISEL-NEXT: s_nop 0
8735 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8736 ; GFX12-GISEL-NEXT: s_endpgm
8737 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8738 %tidx_i64 = zext i32 %tidx to i64
8739 %undef = freeze i64 poison
8740 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 false, i1 true)
8741 store i64 %v, ptr addrspace(1) %out
8742 ret void
8743 }
8745 define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8746 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8747 ; GFX10-SDAG: ; %bb.0:
8748 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8749 ; GFX10-SDAG-NEXT: s_clause 0x1
8750 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8751 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8752 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8753 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8754 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8755 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8756 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8757 ; GFX10-SDAG-NEXT: s_endpgm
8758 ;
8759 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8760 ; GFX10-GISEL: ; %bb.0:
8761 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8762 ; GFX10-GISEL-NEXT: s_clause 0x1
8763 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8764 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8765 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8766 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8767 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8768 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8769 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8770 ; GFX10-GISEL-NEXT: s_endpgm
8771 ;
8772 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8773 ; GFX11-SDAG: ; %bb.0:
8774 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8775 ; GFX11-SDAG-NEXT: s_clause 0x1
8776 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8777 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8778 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
8779 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8780 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8781 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8782 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8783 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8784 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8785 ; GFX11-SDAG-NEXT: s_nop 0
8786 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8787 ; GFX11-SDAG-NEXT: s_endpgm
8788 ;
8789 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8790 ; GFX11-GISEL: ; %bb.0:
8791 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8792 ; GFX11-GISEL-NEXT: s_clause 0x1
8793 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8794 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8795 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
8796 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8797 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8798 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8799 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8800 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8801 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8802 ; GFX11-GISEL-NEXT: s_nop 0
8803 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8804 ; GFX11-GISEL-NEXT: s_endpgm
8805 ;
8806 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8807 ; GFX12-SDAG: ; %bb.0:
8808 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8809 ; GFX12-SDAG-NEXT: s_clause 0x1
8810 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8811 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8812 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
8813 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8814 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
8815 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8816 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8817 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8818 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8819 ; GFX12-SDAG-NEXT: s_nop 0
8820 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8821 ; GFX12-SDAG-NEXT: s_endpgm
8822 ;
8823 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
8824 ; GFX12-GISEL: ; %bb.0:
8825 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8826 ; GFX12-GISEL-NEXT: s_clause 0x1
8827 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8828 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8829 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
8830 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
8831 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
8832 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
8833 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
8834 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
8835 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8836 ; GFX12-GISEL-NEXT: s_nop 0
8837 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8838 ; GFX12-GISEL-NEXT: s_endpgm
8839 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8840 %tidx_f32 = bitcast i32 %tidx to float
8841 %tidx_f64 = fpext float %tidx_f32 to double
8842 %undef = freeze double poison
8843 %v = call double @llvm.amdgcn.permlanex16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 false, i1 true)
8844 store double %v, ptr addrspace(1) %out
8845 ret void
8846 }
8848 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8849 ; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_bc_i32:
8850 ; GFX10: ; %bb.0:
8851 ; GFX10-NEXT: s_clause 0x1
8852 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8853 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8854 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8855 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8856 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8857 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8858 ; GFX10-NEXT: s_endpgm
8859 ;
8860 ; GFX11-LABEL: v_permlanex16_b32_i_tid_fi_bc_i32:
8861 ; GFX11: ; %bb.0:
8862 ; GFX11-NEXT: s_clause 0x1
8863 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8864 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8865 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8866 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8867 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8868 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8869 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8870 ; GFX11-NEXT: s_nop 0
8871 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8872 ; GFX11-NEXT: s_endpgm
8873 ;
8874 ; GFX12-LABEL: v_permlanex16_b32_i_tid_fi_bc_i32:
8875 ; GFX12: ; %bb.0:
8876 ; GFX12-NEXT: s_clause 0x1
8877 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8878 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8879 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8880 ; GFX12-NEXT: s_wait_kmcnt 0x0
8881 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8882 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8883 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8884 ; GFX12-NEXT: s_nop 0
8885 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8886 ; GFX12-NEXT: s_endpgm
8887 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8888 %undef = freeze i32 poison
8889 %v = call i32 @llvm.amdgcn.permlanex16.i32(i32 %undef, i32 %tidx, i32 %src1, i32 %src2, i1 true, i1 true)
8890 store i32 %v, ptr addrspace(1) %out
8891 ret void
8892 }
8894 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8895 ; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_bc_f32:
8896 ; GFX10: ; %bb.0:
8897 ; GFX10-NEXT: s_clause 0x1
8898 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8899 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8900 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
8901 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
8902 ; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8903 ; GFX10-NEXT: global_store_dword v1, v0, s[4:5]
8904 ; GFX10-NEXT: s_endpgm
8905 ;
8906 ; GFX11-LABEL: v_permlanex16_b32_i_tid_fi_bc_f32:
8907 ; GFX11: ; %bb.0:
8908 ; GFX11-NEXT: s_clause 0x1
8909 ; GFX11-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8910 ; GFX11-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8911 ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8912 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
8913 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
8914 ; GFX11-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8915 ; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]
8916 ; GFX11-NEXT: s_nop 0
8917 ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8918 ; GFX11-NEXT: s_endpgm
8919 ;
8920 ; GFX12-LABEL: v_permlanex16_b32_i_tid_fi_bc_f32:
8921 ; GFX12: ; %bb.0:
8922 ; GFX12-NEXT: s_clause 0x1
8923 ; GFX12-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8924 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8925 ; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
8926 ; GFX12-NEXT: s_wait_kmcnt 0x0
8927 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
8928 ; GFX12-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8929 ; GFX12-NEXT: global_store_b32 v1, v0, s[2:3]
8930 ; GFX12-NEXT: s_nop 0
8931 ; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8932 ; GFX12-NEXT: s_endpgm
8933 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
8934 %tidx_f32 = bitcast i32 %tidx to float
8935 %undef = freeze float poison
8936 %v = call float @llvm.amdgcn.permlanex16.f32(float %undef, float %tidx_f32, i32 %src1, i32 %src2, i1 true, i1 true)
8937 store float %v, ptr addrspace(1) %out
8938 ret void
8939 }
8941 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
8942 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
8943 ; GFX10-SDAG: ; %bb.0:
8944 ; GFX10-SDAG-NEXT: s_clause 0x1
8945 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8946 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8947 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
8948 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8949 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
8950 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8951 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8952 ; GFX10-SDAG-NEXT: s_endpgm
8953 ;
8954 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
8955 ; GFX10-GISEL: ; %bb.0:
8956 ; GFX10-GISEL-NEXT: s_clause 0x1
8957 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
8958 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
8959 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
8960 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8961 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8962 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
8963 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8964 ; GFX10-GISEL-NEXT: s_endpgm
8965 ;
8966 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
8967 ; GFX11-SDAG: ; %bb.0:
8968 ; GFX11-SDAG-NEXT: s_clause 0x1
8969 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8970 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8971 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
8972 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8973 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
8974 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8975 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
8976 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8977 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8978 ; GFX11-SDAG-NEXT: s_nop 0
8979 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8980 ; GFX11-SDAG-NEXT: s_endpgm
8981 ;
8982 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
8983 ; GFX11-GISEL: ; %bb.0:
8984 ; GFX11-GISEL-NEXT: s_clause 0x1
8985 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
8986 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
8987 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
8988 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
8989 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
8990 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
8991 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
8992 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
8993 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
8994 ; GFX11-GISEL-NEXT: s_nop 0
8995 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
8996 ; GFX11-GISEL-NEXT: s_endpgm
8997 ;
8998 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
8999 ; GFX12-SDAG: ; %bb.0:
9000 ; GFX12-SDAG-NEXT: s_clause 0x1
9001 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9002 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9003 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
9004 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9005 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9006 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
9007 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
9008 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9009 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9010 ; GFX12-SDAG-NEXT: s_nop 0
9011 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9012 ; GFX12-SDAG-NEXT: s_endpgm
9013 ;
9014 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
9015 ; GFX12-GISEL: ; %bb.0:
9016 ; GFX12-GISEL-NEXT: s_clause 0x1
9017 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9018 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9019 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9020 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
9021 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9022 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
9023 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9024 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
9025 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9026 ; GFX12-GISEL-NEXT: s_nop 0
9027 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9028 ; GFX12-GISEL-NEXT: s_endpgm
9029 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
9030 %tidx_i64 = zext i32 %tidx to i64
9031 %undef = freeze i64 poison
9032 %v = call i64 @llvm.amdgcn.permlanex16.i64(i64 %undef, i64 %tidx_i64, i32 %src1, i32 %src2, i1 true, i1 true)
9033 store i64 %v, ptr addrspace(1) %out
9034 ret void
9035 }
9037 define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
9038 ; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9039 ; GFX10-SDAG: ; %bb.0:
9040 ; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9041 ; GFX10-SDAG-NEXT: s_clause 0x1
9042 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
9043 ; GFX10-SDAG-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
9044 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
9045 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
9046 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9047 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9048 ; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
9049 ; GFX10-SDAG-NEXT: s_endpgm
9050 ;
9051 ; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9052 ; GFX10-GISEL: ; %bb.0:
9053 ; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9054 ; GFX10-GISEL-NEXT: s_clause 0x1
9055 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x30
9056 ; GFX10-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x24
9057 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
9058 ; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
9059 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9060 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9061 ; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
9062 ; GFX10-GISEL-NEXT: s_endpgm
9063 ;
9064 ; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9065 ; GFX11-SDAG: ; %bb.0:
9066 ; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9067 ; GFX11-SDAG-NEXT: s_clause 0x1
9068 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9069 ; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9070 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
9071 ; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9072 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
9073 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
9074 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9075 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9076 ; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9077 ; GFX11-SDAG-NEXT: s_nop 0
9078 ; GFX11-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9079 ; GFX11-SDAG-NEXT: s_endpgm
9080 ;
9081 ; GFX11-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9082 ; GFX11-GISEL: ; %bb.0:
9083 ; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9084 ; GFX11-GISEL-NEXT: s_clause 0x1
9085 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9086 ; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9087 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
9088 ; GFX11-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9089 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
9090 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
9091 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9092 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9093 ; GFX11-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9094 ; GFX11-GISEL-NEXT: s_nop 0
9095 ; GFX11-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9096 ; GFX11-GISEL-NEXT: s_endpgm
9097 ;
9098 ; GFX12-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9099 ; GFX12-SDAG: ; %bb.0:
9100 ; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9101 ; GFX12-SDAG-NEXT: s_clause 0x1
9102 ; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9103 ; GFX12-SDAG-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9104 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
9105 ; GFX12-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9106 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9107 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
9108 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9109 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9110 ; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9111 ; GFX12-SDAG-NEXT: s_nop 0
9112 ; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9113 ; GFX12-SDAG-NEXT: s_endpgm
9114 ;
9115 ; GFX12-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
9116 ; GFX12-GISEL: ; %bb.0:
9117 ; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
9118 ; GFX12-GISEL-NEXT: s_clause 0x1
9119 ; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[2:3], 0x30
9120 ; GFX12-GISEL-NEXT: s_load_b64 s[2:3], s[2:3], 0x24
9121 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
9122 ; GFX12-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
9123 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9124 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
9125 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
9126 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
9127 ; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
9128 ; GFX12-GISEL-NEXT: s_nop 0
9129 ; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
9130 ; GFX12-GISEL-NEXT: s_endpgm
9131 %tidx = call i32 @llvm.amdgcn.workitem.id.x()
9132 %tidx_f32 = bitcast i32 %tidx to float
9133 %tidx_f64 = fpext float %tidx_f32 to double
9134 %undef = freeze double poison
9135 %v = call double @llvm.amdgcn.permlanex16.f64(double %undef, double %tidx_f64, i32 %src1, i32 %src2, i1 true, i1 true)
9136 store double %v, ptr addrspace(1) %out
9137 ret void
9138 }
9140 define void @v_permlane16_half(ptr addrspace(1) %out, half %src0, i32 %src1, i32 %src2) {
9141 ; GFX10-LABEL: v_permlane16_half:
9142 ; GFX10: ; %bb.0:
9143 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9144 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9145 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9146 ; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
9147 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9148 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9149 ;
9150 ; GFX11-LABEL: v_permlane16_half:
9151 ; GFX11: ; %bb.0:
9152 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9153 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9154 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9155 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9156 ; GFX11-NEXT: v_permlane16_b32 v2, v2, s0, s1
9157 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9158 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9159 ;
9160 ; GFX12-LABEL: v_permlane16_half:
9161 ; GFX12: ; %bb.0:
9162 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9163 ; GFX12-NEXT: s_wait_expcnt 0x0
9164 ; GFX12-NEXT: s_wait_samplecnt 0x0
9165 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9166 ; GFX12-NEXT: s_wait_kmcnt 0x0
9167 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9168 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9169 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9170 ; GFX12-NEXT: v_permlane16_b32 v2, v2, s0, s1
9171 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9172 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9173 %v = call half @llvm.amdgcn.permlane16.f16(half %src0, half %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9174 store half %v, ptr addrspace(1) %out
9175 ret void
9176 }
9178 define void @v_permlanex16_half(ptr addrspace(1) %out, half %src0, i32 %src1, i32 %src2) {
9179 ; GFX10-LABEL: v_permlanex16_half:
9180 ; GFX10: ; %bb.0:
9181 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9182 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9183 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9184 ; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9185 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9186 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9187 ;
9188 ; GFX11-LABEL: v_permlanex16_half:
9189 ; GFX11: ; %bb.0:
9190 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9191 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9192 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9193 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9194 ; GFX11-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9195 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9196 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9197 ;
9198 ; GFX12-LABEL: v_permlanex16_half:
9199 ; GFX12: ; %bb.0:
9200 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9201 ; GFX12-NEXT: s_wait_expcnt 0x0
9202 ; GFX12-NEXT: s_wait_samplecnt 0x0
9203 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9204 ; GFX12-NEXT: s_wait_kmcnt 0x0
9205 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9206 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9207 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9208 ; GFX12-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9209 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9210 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9211 %v = call half @llvm.amdgcn.permlanex16.f16(half %src0, half %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9212 store half %v, ptr addrspace(1) %out
9213 ret void
9214 }
9216 define void @v_permlane16_bfloat(ptr addrspace(1) %out, bfloat %src0, i32 %src1, i32 %src2) {
9217 ; GFX10-LABEL: v_permlane16_bfloat:
9218 ; GFX10: ; %bb.0:
9219 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9220 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9221 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9222 ; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
9223 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9224 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9225 ;
9226 ; GFX11-LABEL: v_permlane16_bfloat:
9227 ; GFX11: ; %bb.0:
9228 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9229 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9230 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9231 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9232 ; GFX11-NEXT: v_permlane16_b32 v2, v2, s0, s1
9233 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9234 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9235 ;
9236 ; GFX12-LABEL: v_permlane16_bfloat:
9237 ; GFX12: ; %bb.0:
9238 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9239 ; GFX12-NEXT: s_wait_expcnt 0x0
9240 ; GFX12-NEXT: s_wait_samplecnt 0x0
9241 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9242 ; GFX12-NEXT: s_wait_kmcnt 0x0
9243 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9244 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9245 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9246 ; GFX12-NEXT: v_permlane16_b32 v2, v2, s0, s1
9247 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9248 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9249 %v = call bfloat @llvm.amdgcn.permlane16.f16(bfloat %src0, bfloat %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9250 store bfloat %v, ptr addrspace(1) %out
9251 ret void
9252 }
9254 define void @v_permlanex16_bfloat(ptr addrspace(1) %out, bfloat %src0, i32 %src1, i32 %src2) {
9255 ; GFX10-LABEL: v_permlanex16_bfloat:
9256 ; GFX10: ; %bb.0:
9257 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9258 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9259 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9260 ; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9261 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9262 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9263 ;
9264 ; GFX11-LABEL: v_permlanex16_bfloat:
9265 ; GFX11: ; %bb.0:
9266 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9267 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9268 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9269 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9270 ; GFX11-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9271 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9272 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9273 ;
9274 ; GFX12-LABEL: v_permlanex16_bfloat:
9275 ; GFX12: ; %bb.0:
9276 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9277 ; GFX12-NEXT: s_wait_expcnt 0x0
9278 ; GFX12-NEXT: s_wait_samplecnt 0x0
9279 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9280 ; GFX12-NEXT: s_wait_kmcnt 0x0
9281 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9282 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9283 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9284 ; GFX12-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9285 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9286 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9287 %v = call bfloat @llvm.amdgcn.permlanex16.f16(bfloat %src0, bfloat %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9288 store bfloat %v, ptr addrspace(1) %out
9289 ret void
9290 }
9292 define void @v_permlane16_i16(ptr addrspace(1) %out, i16 %src0, i32 %src1, i32 %src2) {
9293 ; GFX10-LABEL: v_permlane16_i16:
9294 ; GFX10: ; %bb.0:
9295 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9296 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9297 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9298 ; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
9299 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9300 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9301 ;
9302 ; GFX11-LABEL: v_permlane16_i16:
9303 ; GFX11: ; %bb.0:
9304 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9305 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9306 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9307 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9308 ; GFX11-NEXT: v_permlane16_b32 v2, v2, s0, s1
9309 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9310 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9311 ;
9312 ; GFX12-LABEL: v_permlane16_i16:
9313 ; GFX12: ; %bb.0:
9314 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9315 ; GFX12-NEXT: s_wait_expcnt 0x0
9316 ; GFX12-NEXT: s_wait_samplecnt 0x0
9317 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9318 ; GFX12-NEXT: s_wait_kmcnt 0x0
9319 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9320 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9321 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9322 ; GFX12-NEXT: v_permlane16_b32 v2, v2, s0, s1
9323 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9324 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9325 %v = call i16 @llvm.amdgcn.permlane16.i16(i16 %src0, i16 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9326 store i16 %v, ptr addrspace(1) %out
9327 ret void
9328 }
9330 define void @v_permlanex16_i16(ptr addrspace(1) %out, i16 %src0, i32 %src1, i32 %src2) {
9331 ; GFX10-LABEL: v_permlanex16_i16:
9332 ; GFX10: ; %bb.0:
9333 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9334 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9335 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9336 ; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9337 ; GFX10-NEXT: global_store_short v[0:1], v2, off
9338 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9339 ;
9340 ; GFX11-LABEL: v_permlanex16_i16:
9341 ; GFX11: ; %bb.0:
9342 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9343 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9344 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9345 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9346 ; GFX11-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9347 ; GFX11-NEXT: global_store_b16 v[0:1], v2, off
9348 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9349 ;
9350 ; GFX12-LABEL: v_permlanex16_i16:
9351 ; GFX12: ; %bb.0:
9352 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9353 ; GFX12-NEXT: s_wait_expcnt 0x0
9354 ; GFX12-NEXT: s_wait_samplecnt 0x0
9355 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9356 ; GFX12-NEXT: s_wait_kmcnt 0x0
9357 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9358 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9359 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9360 ; GFX12-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9361 ; GFX12-NEXT: global_store_b16 v[0:1], v2, off
9362 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9363 %v = call i16 @llvm.amdgcn.permlanex16.i16(i16 %src0, i16 %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9364 store i16 %v, ptr addrspace(1) %out
9365 ret void
9366 }
9368 define void @v_permlane16_v2f16(ptr addrspace(1) %out, <2 x half> %src0, i32 %src1, i32 %src2) {
9369 ; GFX10-LABEL: v_permlane16_v2f16:
9370 ; GFX10: ; %bb.0:
9371 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9372 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9373 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9374 ; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
9375 ; GFX10-NEXT: global_store_dword v[0:1], v2, off
9376 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9377 ;
9378 ; GFX11-LABEL: v_permlane16_v2f16:
9379 ; GFX11: ; %bb.0:
9380 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9381 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9382 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9383 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9384 ; GFX11-NEXT: v_permlane16_b32 v2, v2, s0, s1
9385 ; GFX11-NEXT: global_store_b32 v[0:1], v2, off
9386 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9387 ;
9388 ; GFX12-LABEL: v_permlane16_v2f16:
9389 ; GFX12: ; %bb.0:
9390 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9391 ; GFX12-NEXT: s_wait_expcnt 0x0
9392 ; GFX12-NEXT: s_wait_samplecnt 0x0
9393 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9394 ; GFX12-NEXT: s_wait_kmcnt 0x0
9395 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9396 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9397 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9398 ; GFX12-NEXT: v_permlane16_b32 v2, v2, s0, s1
9399 ; GFX12-NEXT: global_store_b32 v[0:1], v2, off
9400 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9401 %v = call <2 x half> @llvm.amdgcn.permlane16.v2f16(<2 x half> %src0, <2 x half> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9402 store <2 x half> %v, ptr addrspace(1) %out
9403 ret void
9404 }
9406 define void @v_permlanex16_v2f16(ptr addrspace(1) %out, <2 x half> %src0, i32 %src1, i32 %src2) {
9407 ; GFX10-LABEL: v_permlanex16_v2f16:
9408 ; GFX10: ; %bb.0:
9409 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9410 ; GFX10-NEXT: v_readfirstlane_b32 s4, v3
9411 ; GFX10-NEXT: v_readfirstlane_b32 s5, v4
9412 ; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9413 ; GFX10-NEXT: global_store_dword v[0:1], v2, off
9414 ; GFX10-NEXT: s_setpc_b64 s[30:31]
9415 ;
9416 ; GFX11-LABEL: v_permlanex16_v2f16:
9417 ; GFX11: ; %bb.0:
9418 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9419 ; GFX11-NEXT: v_readfirstlane_b32 s0, v3
9420 ; GFX11-NEXT: v_readfirstlane_b32 s1, v4
9421 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
9422 ; GFX11-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9423 ; GFX11-NEXT: global_store_b32 v[0:1], v2, off
9424 ; GFX11-NEXT: s_setpc_b64 s[30:31]
9425 ;
9426 ; GFX12-LABEL: v_permlanex16_v2f16:
9427 ; GFX12: ; %bb.0:
9428 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
9429 ; GFX12-NEXT: s_wait_expcnt 0x0
9430 ; GFX12-NEXT: s_wait_samplecnt 0x0
9431 ; GFX12-NEXT: s_wait_bvhcnt 0x0
9432 ; GFX12-NEXT: s_wait_kmcnt 0x0
9433 ; GFX12-NEXT: v_readfirstlane_b32 s0, v3
9434 ; GFX12-NEXT: v_readfirstlane_b32 s1, v4
9435 ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
9436 ; GFX12-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9437 ; GFX12-NEXT: global_store_b32 v[0:1], v2, off
9438 ; GFX12-NEXT: s_setpc_b64 s[30:31]
9439 %v = call <2 x half> @llvm.amdgcn.permlanex16.v2f16(<2 x half> %src0, <2 x half> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9440 store <2 x half> %v, ptr addrspace(1) %out
9441 ret void
9442 }
9444 define void @v_permlane16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %src1, i32 %src2) {
9445 ; GFX10-SDAG-LABEL: v_permlane16_v2f32:
9446 ; GFX10-SDAG: ; %bb.0:
9447 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9448 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v4
9449 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v5
9450 ; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
9451 ; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
9452 ; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
9453 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9454 ;
9455 ; GFX10-GISEL-LABEL: v_permlane16_v2f32:
9456 ; GFX10-GISEL: ; %bb.0:
9457 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9458 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
9459 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
9460 ; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
9461 ; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
9462 ; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
9463 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9464 ;
9465 ; GFX11-SDAG-LABEL: v_permlane16_v2f32:
9466 ; GFX11-SDAG: ; %bb.0:
9467 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9468 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v4
9469 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v5
9470 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9471 ; GFX11-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9472 ; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9473 ; GFX11-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
9474 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9475 ;
9476 ; GFX11-GISEL-LABEL: v_permlane16_v2f32:
9477 ; GFX11-GISEL: ; %bb.0:
9478 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9479 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v4
9480 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v5
9481 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9482 ; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9483 ; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9484 ; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
9485 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9486 ;
9487 ; GFX12-SDAG-LABEL: v_permlane16_v2f32:
9488 ; GFX12-SDAG: ; %bb.0:
9489 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9490 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9491 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9492 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9493 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9494 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v4
9495 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v5
9496 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9497 ; GFX12-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9498 ; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9499 ; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
9500 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9501 ;
9502 ; GFX12-GISEL-LABEL: v_permlane16_v2f32:
9503 ; GFX12-GISEL: ; %bb.0:
9504 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9505 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9506 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9507 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9508 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9509 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v4
9510 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v5
9511 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9512 ; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9513 ; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9514 ; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
9515 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
9516 %v = call <2 x float> @llvm.amdgcn.permlane16.v2f32(<2 x float> %src0, <2 x float> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9517 store <2 x float> %v, ptr addrspace(1) %out
9518 ret void
9519 }
9521 define void @v_permlanex16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %src1, i32 %src2) {
9522 ; GFX10-SDAG-LABEL: v_permlanex16_v2f32:
9523 ; GFX10-SDAG: ; %bb.0:
9524 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9525 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v4
9526 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v5
9527 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9528 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9529 ; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
9530 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9531 ;
9532 ; GFX10-GISEL-LABEL: v_permlanex16_v2f32:
9533 ; GFX10-GISEL: ; %bb.0:
9534 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9535 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
9536 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
9537 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9538 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9539 ; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
9540 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9541 ;
9542 ; GFX11-SDAG-LABEL: v_permlanex16_v2f32:
9543 ; GFX11-SDAG: ; %bb.0:
9544 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9545 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v4
9546 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v5
9547 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9548 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9549 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9550 ; GFX11-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
9551 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9552 ;
9553 ; GFX11-GISEL-LABEL: v_permlanex16_v2f32:
9554 ; GFX11-GISEL: ; %bb.0:
9555 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9556 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v4
9557 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v5
9558 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9559 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9560 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9561 ; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
9562 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9563 ;
9564 ; GFX12-SDAG-LABEL: v_permlanex16_v2f32:
9565 ; GFX12-SDAG: ; %bb.0:
9566 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9567 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9568 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9569 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9570 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9571 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v4
9572 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v5
9573 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9574 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9575 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9576 ; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
9577 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9578 ;
9579 ; GFX12-GISEL-LABEL: v_permlanex16_v2f32:
9580 ; GFX12-GISEL: ; %bb.0:
9581 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9582 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9583 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9584 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9585 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9586 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v4
9587 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v5
9588 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9589 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9590 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9591 ; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
9592 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
9593 %v = call <2 x float> @llvm.amdgcn.permlanex16.v2f32(<2 x float> %src0, <2 x float> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9594 store <2 x float> %v, ptr addrspace(1) %out
9595 ret void
9596 }
9598 define void @v_permlane16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src1, i32 %src2) {
9599 ; GFX10-SDAG-LABEL: v_permlane16_v7i32:
9600 ; GFX10-SDAG: ; %bb.0:
9601 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9602 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v9
9603 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v10
9604 ; GFX10-SDAG-NEXT: v_permlane16_b32 v8, v8, s4, s5
9605 ; GFX10-SDAG-NEXT: v_permlane16_b32 v7, v7, s4, s5
9606 ; GFX10-SDAG-NEXT: v_permlane16_b32 v6, v6, s4, s5
9607 ; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
9608 ; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
9609 ; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
9610 ; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
9611 ; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
9612 ; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9613 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9614 ;
9615 ; GFX10-GISEL-LABEL: v_permlane16_v7i32:
9616 ; GFX10-GISEL: ; %bb.0:
9617 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9618 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
9619 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
9620 ; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
9621 ; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
9622 ; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
9623 ; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
9624 ; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
9625 ; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
9626 ; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
9627 ; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9628 ; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
9629 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9630 ;
9631 ; GFX11-SDAG-LABEL: v_permlane16_v7i32:
9632 ; GFX11-SDAG: ; %bb.0:
9633 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9634 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v9
9635 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v10
9636 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9637 ; GFX11-SDAG-NEXT: v_permlane16_b32 v8, v8, s0, s1
9638 ; GFX11-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
9639 ; GFX11-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
9640 ; GFX11-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
9641 ; GFX11-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
9642 ; GFX11-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9643 ; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9644 ; GFX11-SDAG-NEXT: s_clause 0x1
9645 ; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9646 ; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9647 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9648 ;
9649 ; GFX11-GISEL-LABEL: v_permlane16_v7i32:
9650 ; GFX11-GISEL: ; %bb.0:
9651 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9652 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v9
9653 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v10
9654 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9655 ; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9656 ; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9657 ; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
9658 ; GFX11-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
9659 ; GFX11-GISEL-NEXT: v_permlane16_b32 v6, v6, s0, s1
9660 ; GFX11-GISEL-NEXT: v_permlane16_b32 v7, v7, s0, s1
9661 ; GFX11-GISEL-NEXT: v_permlane16_b32 v8, v8, s0, s1
9662 ; GFX11-GISEL-NEXT: s_clause 0x1
9663 ; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9664 ; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9665 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9666 ;
9667 ; GFX12-SDAG-LABEL: v_permlane16_v7i32:
9668 ; GFX12-SDAG: ; %bb.0:
9669 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9670 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9671 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9672 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9673 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9674 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v9
9675 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v10
9676 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9677 ; GFX12-SDAG-NEXT: v_permlane16_b32 v8, v8, s0, s1
9678 ; GFX12-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
9679 ; GFX12-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
9680 ; GFX12-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
9681 ; GFX12-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
9682 ; GFX12-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9683 ; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9684 ; GFX12-SDAG-NEXT: s_clause 0x1
9685 ; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9686 ; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9687 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9688 ;
9689 ; GFX12-GISEL-LABEL: v_permlane16_v7i32:
9690 ; GFX12-GISEL: ; %bb.0:
9691 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9692 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9693 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9694 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9695 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9696 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v9
9697 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v10
9698 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9699 ; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9700 ; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9701 ; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
9702 ; GFX12-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
9703 ; GFX12-GISEL-NEXT: v_permlane16_b32 v6, v6, s0, s1
9704 ; GFX12-GISEL-NEXT: v_permlane16_b32 v7, v7, s0, s1
9705 ; GFX12-GISEL-NEXT: v_permlane16_b32 v8, v8, s0, s1
9706 ; GFX12-GISEL-NEXT: s_clause 0x1
9707 ; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9708 ; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9709 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
9710 %v = call <7 x i32> @llvm.amdgcn.permlane16.v7i32(<7 x i32> %src0, <7 x i32> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9711 store <7 x i32> %v, ptr addrspace(1) %out
9712 ret void
9713 }
9715 define void @v_permlanex16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src1, i32 %src2) {
9716 ; GFX10-SDAG-LABEL: v_permlanex16_v7i32:
9717 ; GFX10-SDAG: ; %bb.0:
9718 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9719 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v9
9720 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v10
9721 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v8, v8, s4, s5
9722 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v7, v7, s4, s5
9723 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v6, v6, s4, s5
9724 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
9725 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
9726 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9727 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9728 ; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
9729 ; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9730 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9731 ;
9732 ; GFX10-GISEL-LABEL: v_permlanex16_v7i32:
9733 ; GFX10-GISEL: ; %bb.0:
9734 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9735 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
9736 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
9737 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9738 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9739 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
9740 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
9741 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
9742 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
9743 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
9744 ; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9745 ; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
9746 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9747 ;
9748 ; GFX11-SDAG-LABEL: v_permlanex16_v7i32:
9749 ; GFX11-SDAG: ; %bb.0:
9750 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9751 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v9
9752 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v10
9753 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9754 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
9755 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
9756 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
9757 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9758 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9759 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9760 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9761 ; GFX11-SDAG-NEXT: s_clause 0x1
9762 ; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9763 ; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9764 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9765 ;
9766 ; GFX11-GISEL-LABEL: v_permlanex16_v7i32:
9767 ; GFX11-GISEL: ; %bb.0:
9768 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9769 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v9
9770 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v10
9771 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9772 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9773 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9774 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9775 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9776 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v6, v6, s0, s1
9777 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v7, v7, s0, s1
9778 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v8, v8, s0, s1
9779 ; GFX11-GISEL-NEXT: s_clause 0x1
9780 ; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9781 ; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9782 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9783 ;
9784 ; GFX12-SDAG-LABEL: v_permlanex16_v7i32:
9785 ; GFX12-SDAG: ; %bb.0:
9786 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9787 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9788 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9789 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9790 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9791 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v9
9792 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v10
9793 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9794 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
9795 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
9796 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
9797 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9798 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9799 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9800 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9801 ; GFX12-SDAG-NEXT: s_clause 0x1
9802 ; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9803 ; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9804 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9805 ;
9806 ; GFX12-GISEL-LABEL: v_permlanex16_v7i32:
9807 ; GFX12-GISEL: ; %bb.0:
9808 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9809 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9810 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9811 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9812 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9813 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v9
9814 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v10
9815 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9816 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9817 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9818 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9819 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9820 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v6, v6, s0, s1
9821 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v7, v7, s0, s1
9822 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v8, v8, s0, s1
9823 ; GFX12-GISEL-NEXT: s_clause 0x1
9824 ; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9825 ; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
9826 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
9827 %v = call <7 x i32> @llvm.amdgcn.permlanex16.v7i32(<7 x i32> %src0, <7 x i32> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9828 store <7 x i32> %v, ptr addrspace(1) %out
9829 ret void
9830 }
9832 define void @v_permlane16_v8i16(ptr addrspace(1) %out, <8 x i16> %src0, i32 %src1, i32 %src2) {
9833 ; GFX10-SDAG-LABEL: v_permlane16_v8i16:
9834 ; GFX10-SDAG: ; %bb.0:
9835 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9836 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
9837 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
9838 ; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
9839 ; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
9840 ; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
9841 ; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
9842 ; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9843 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9844 ;
9845 ; GFX10-GISEL-LABEL: v_permlane16_v8i16:
9846 ; GFX10-GISEL: ; %bb.0:
9847 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9848 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
9849 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
9850 ; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
9851 ; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
9852 ; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
9853 ; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
9854 ; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9855 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9856 ;
9857 ; GFX11-SDAG-LABEL: v_permlane16_v8i16:
9858 ; GFX11-SDAG: ; %bb.0:
9859 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9860 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v6
9861 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v7
9862 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9863 ; GFX11-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
9864 ; GFX11-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
9865 ; GFX11-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9866 ; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9867 ; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9868 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9869 ;
9870 ; GFX11-GISEL-LABEL: v_permlane16_v8i16:
9871 ; GFX11-GISEL: ; %bb.0:
9872 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9873 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v6
9874 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v7
9875 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9876 ; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9877 ; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9878 ; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
9879 ; GFX11-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
9880 ; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9881 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9882 ;
9883 ; GFX12-SDAG-LABEL: v_permlane16_v8i16:
9884 ; GFX12-SDAG: ; %bb.0:
9885 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9886 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9887 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9888 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9889 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9890 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v6
9891 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v7
9892 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9893 ; GFX12-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
9894 ; GFX12-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
9895 ; GFX12-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
9896 ; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
9897 ; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9898 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9899 ;
9900 ; GFX12-GISEL-LABEL: v_permlane16_v8i16:
9901 ; GFX12-GISEL: ; %bb.0:
9902 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9903 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9904 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9905 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9906 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9907 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v6
9908 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v7
9909 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9910 ; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
9911 ; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
9912 ; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
9913 ; GFX12-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
9914 ; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9915 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
9916 %v = call <8 x i16> @llvm.amdgcn.permlane16.v8i16(<8 x i16> %src0, <8 x i16> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
9917 store <8 x i16> %v, ptr addrspace(1) %out
9918 ret void
9919 }
9921 define void @v_permlanex16_v8i16(ptr addrspace(1) %out, <8 x i16> %src0, i32 %src1, i32 %src2) {
9922 ; GFX10-SDAG-LABEL: v_permlanex16_v8i16:
9923 ; GFX10-SDAG: ; %bb.0:
9924 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9925 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
9926 ; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
9927 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
9928 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
9929 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9930 ; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9931 ; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9932 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
9933 ;
9934 ; GFX10-GISEL-LABEL: v_permlanex16_v8i16:
9935 ; GFX10-GISEL: ; %bb.0:
9936 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9937 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
9938 ; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
9939 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
9940 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
9941 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
9942 ; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
9943 ; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
9944 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
9945 ;
9946 ; GFX11-SDAG-LABEL: v_permlanex16_v8i16:
9947 ; GFX11-SDAG: ; %bb.0:
9948 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9949 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v6
9950 ; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v7
9951 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9952 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9953 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9954 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9955 ; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9956 ; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9957 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
9958 ;
9959 ; GFX11-GISEL-LABEL: v_permlanex16_v8i16:
9960 ; GFX11-GISEL: ; %bb.0:
9961 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9962 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v6
9963 ; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v7
9964 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9965 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9966 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9967 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9968 ; GFX11-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9969 ; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
9970 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
9971 ;
9972 ; GFX12-SDAG-LABEL: v_permlanex16_v8i16:
9973 ; GFX12-SDAG: ; %bb.0:
9974 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
9975 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
9976 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
9977 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
9978 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
9979 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v6
9980 ; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v7
9981 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
9982 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
9983 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
9984 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
9985 ; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
9986 ; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
9987 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
9988 ;
9989 ; GFX12-GISEL-LABEL: v_permlanex16_v8i16:
9990 ; GFX12-GISEL: ; %bb.0:
9991 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
9992 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
9993 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
9994 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
9995 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
9996 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v6
9997 ; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v7
9998 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
9999 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
10000 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
10001 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
10002 ; GFX12-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
10003 ; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
10004 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
10005 %v = call <8 x i16> @llvm.amdgcn.permlanex16.v8i16(<8 x i16> %src0, <8 x i16> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
10006 store <8 x i16> %v, ptr addrspace(1) %out
10007 ret void
10008 }