llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll

   1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
   2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx600 < %s | FileCheck --check-prefixes=GFX6 %s
   3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx700 < %s | FileCheck --check-prefixes=GFX7 %s
   4 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1010 < %s | FileCheck --check-prefixes=GFX10-WGP %s
   5 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1010 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX10-CU %s
   6 ; RUN: llc -mtriple=amdgcn-amd-amdpal -O0 -mcpu=gfx700 -amdgcn-skip-cache-invalidations < %s | FileCheck --check-prefixes=SKIP-CACHE-INV %s
   7 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx90a < %s | FileCheck -check-prefixes=GFX90A-NOTTGSPLIT %s
   8 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx90a -mattr=+tgsplit < %s | FileCheck -check-prefixes=GFX90A-TGSPLIT %s
   9 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx940 < %s | FileCheck -check-prefixes=GFX940-NOTTGSPLIT %s
  10 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx940 -mattr=+tgsplit < %s | FileCheck -check-prefixes=GFX940-TGSPLIT %s
  11 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1100 < %s | FileCheck --check-prefixes=GFX11-WGP %s
  12 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX11-CU %s
  13 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GFX12-WGP %s
  14 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX12-CU %s
  15
  16 define amdgpu_kernel void @singlethread_acquire_fence() {
  17 ; GFX6-LABEL: singlethread_acquire_fence:
  18 ; GFX6:       ; %bb.0: ; %entry
  19 ; GFX6-NEXT:    s_endpgm
  20 ;
  21 ; GFX7-LABEL: singlethread_acquire_fence:
  22 ; GFX7:       ; %bb.0: ; %entry
  23 ; GFX7-NEXT:    s_endpgm
  24 ;
  25 ; GFX10-WGP-LABEL: singlethread_acquire_fence:
  26 ; GFX10-WGP:       ; %bb.0: ; %entry
  27 ; GFX10-WGP-NEXT:    s_endpgm
  28 ;
  29 ; GFX10-CU-LABEL: singlethread_acquire_fence:
  30 ; GFX10-CU:       ; %bb.0: ; %entry
  31 ; GFX10-CU-NEXT:    s_endpgm
  32 ;
  33 ; SKIP-CACHE-INV-LABEL: singlethread_acquire_fence:
  34 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
  35 ; SKIP-CACHE-INV-NEXT:    s_endpgm
  36 ;
  37 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_acquire_fence:
  38 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
  39 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
  40 ;
  41 ; GFX90A-TGSPLIT-LABEL: singlethread_acquire_fence:
  42 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
  43 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
  44 ;
  45 ; GFX940-NOTTGSPLIT-LABEL: singlethread_acquire_fence:
  46 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
  47 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
  48 ;
  49 ; GFX940-TGSPLIT-LABEL: singlethread_acquire_fence:
  50 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
  51 ; GFX940-TGSPLIT-NEXT:    s_endpgm
  52 ;
  53 ; GFX11-WGP-LABEL: singlethread_acquire_fence:
  54 ; GFX11-WGP:       ; %bb.0: ; %entry
  55 ; GFX11-WGP-NEXT:    s_endpgm
  56 ;
  57 ; GFX11-CU-LABEL: singlethread_acquire_fence:
  58 ; GFX11-CU:       ; %bb.0: ; %entry
  59 ; GFX11-CU-NEXT:    s_endpgm
  60 ;
  61 ; GFX12-WGP-LABEL: singlethread_acquire_fence:
  62 ; GFX12-WGP:       ; %bb.0: ; %entry
  63 ; GFX12-WGP-NEXT:    s_endpgm
  64 ;
  65 ; GFX12-CU-LABEL: singlethread_acquire_fence:
  66 ; GFX12-CU:       ; %bb.0: ; %entry
  67 ; GFX12-CU-NEXT:    s_endpgm
  68 entry:
  69   fence syncscope("singlethread") acquire
  70   ret void
  71 }
  72
  73 define amdgpu_kernel void @singlethread_release_fence() {
  74 ; GFX6-LABEL: singlethread_release_fence:
  75 ; GFX6:       ; %bb.0: ; %entry
  76 ; GFX6-NEXT:    s_endpgm
  77 ;
  78 ; GFX7-LABEL: singlethread_release_fence:
  79 ; GFX7:       ; %bb.0: ; %entry
  80 ; GFX7-NEXT:    s_endpgm
  81 ;
  82 ; GFX10-WGP-LABEL: singlethread_release_fence:
  83 ; GFX10-WGP:       ; %bb.0: ; %entry
  84 ; GFX10-WGP-NEXT:    s_endpgm
  85 ;
  86 ; GFX10-CU-LABEL: singlethread_release_fence:
  87 ; GFX10-CU:       ; %bb.0: ; %entry
  88 ; GFX10-CU-NEXT:    s_endpgm
  89 ;
  90 ; SKIP-CACHE-INV-LABEL: singlethread_release_fence:
  91 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
  92 ; SKIP-CACHE-INV-NEXT:    s_endpgm
  93 ;
  94 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_release_fence:
  95 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
  96 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
  97 ;
  98 ; GFX90A-TGSPLIT-LABEL: singlethread_release_fence:
  99 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 100 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 101 ;
 102 ; GFX940-NOTTGSPLIT-LABEL: singlethread_release_fence:
 103 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 104 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 105 ;
 106 ; GFX940-TGSPLIT-LABEL: singlethread_release_fence:
 107 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 108 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 109 ;
 110 ; GFX11-WGP-LABEL: singlethread_release_fence:
 111 ; GFX11-WGP:       ; %bb.0: ; %entry
 112 ; GFX11-WGP-NEXT:    s_endpgm
 113 ;
 114 ; GFX11-CU-LABEL: singlethread_release_fence:
 115 ; GFX11-CU:       ; %bb.0: ; %entry
 116 ; GFX11-CU-NEXT:    s_endpgm
 117 ;
 118 ; GFX12-WGP-LABEL: singlethread_release_fence:
 119 ; GFX12-WGP:       ; %bb.0: ; %entry
 120 ; GFX12-WGP-NEXT:    s_endpgm
 121 ;
 122 ; GFX12-CU-LABEL: singlethread_release_fence:
 123 ; GFX12-CU:       ; %bb.0: ; %entry
 124 ; GFX12-CU-NEXT:    s_endpgm
 125 entry:
 126   fence syncscope("singlethread") release
 127   ret void
 128 }
 129
 130 define amdgpu_kernel void @singlethread_acq_rel_fence() {
 131 ; GFX6-LABEL: singlethread_acq_rel_fence:
 132 ; GFX6:       ; %bb.0: ; %entry
 133 ; GFX6-NEXT:    s_endpgm
 134 ;
 135 ; GFX7-LABEL: singlethread_acq_rel_fence:
 136 ; GFX7:       ; %bb.0: ; %entry
 137 ; GFX7-NEXT:    s_endpgm
 138 ;
 139 ; GFX10-WGP-LABEL: singlethread_acq_rel_fence:
 140 ; GFX10-WGP:       ; %bb.0: ; %entry
 141 ; GFX10-WGP-NEXT:    s_endpgm
 142 ;
 143 ; GFX10-CU-LABEL: singlethread_acq_rel_fence:
 144 ; GFX10-CU:       ; %bb.0: ; %entry
 145 ; GFX10-CU-NEXT:    s_endpgm
 146 ;
 147 ; SKIP-CACHE-INV-LABEL: singlethread_acq_rel_fence:
 148 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 149 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 150 ;
 151 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_acq_rel_fence:
 152 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 153 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 154 ;
 155 ; GFX90A-TGSPLIT-LABEL: singlethread_acq_rel_fence:
 156 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 157 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 158 ;
 159 ; GFX940-NOTTGSPLIT-LABEL: singlethread_acq_rel_fence:
 160 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 161 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 162 ;
 163 ; GFX940-TGSPLIT-LABEL: singlethread_acq_rel_fence:
 164 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 165 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 166 ;
 167 ; GFX11-WGP-LABEL: singlethread_acq_rel_fence:
 168 ; GFX11-WGP:       ; %bb.0: ; %entry
 169 ; GFX11-WGP-NEXT:    s_endpgm
 170 ;
 171 ; GFX11-CU-LABEL: singlethread_acq_rel_fence:
 172 ; GFX11-CU:       ; %bb.0: ; %entry
 173 ; GFX11-CU-NEXT:    s_endpgm
 174 ;
 175 ; GFX12-WGP-LABEL: singlethread_acq_rel_fence:
 176 ; GFX12-WGP:       ; %bb.0: ; %entry
 177 ; GFX12-WGP-NEXT:    s_endpgm
 178 ;
 179 ; GFX12-CU-LABEL: singlethread_acq_rel_fence:
 180 ; GFX12-CU:       ; %bb.0: ; %entry
 181 ; GFX12-CU-NEXT:    s_endpgm
 182 entry:
 183   fence syncscope("singlethread") acq_rel
 184   ret void
 185 }
 186
 187 define amdgpu_kernel void @singlethread_seq_cst_fence() {
 188 ; GFX6-LABEL: singlethread_seq_cst_fence:
 189 ; GFX6:       ; %bb.0: ; %entry
 190 ; GFX6-NEXT:    s_endpgm
 191 ;
 192 ; GFX7-LABEL: singlethread_seq_cst_fence:
 193 ; GFX7:       ; %bb.0: ; %entry
 194 ; GFX7-NEXT:    s_endpgm
 195 ;
 196 ; GFX10-WGP-LABEL: singlethread_seq_cst_fence:
 197 ; GFX10-WGP:       ; %bb.0: ; %entry
 198 ; GFX10-WGP-NEXT:    s_endpgm
 199 ;
 200 ; GFX10-CU-LABEL: singlethread_seq_cst_fence:
 201 ; GFX10-CU:       ; %bb.0: ; %entry
 202 ; GFX10-CU-NEXT:    s_endpgm
 203 ;
 204 ; SKIP-CACHE-INV-LABEL: singlethread_seq_cst_fence:
 205 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 206 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 207 ;
 208 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_seq_cst_fence:
 209 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 210 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 211 ;
 212 ; GFX90A-TGSPLIT-LABEL: singlethread_seq_cst_fence:
 213 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 214 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 215 ;
 216 ; GFX940-NOTTGSPLIT-LABEL: singlethread_seq_cst_fence:
 217 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 218 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 219 ;
 220 ; GFX940-TGSPLIT-LABEL: singlethread_seq_cst_fence:
 221 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 222 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 223 ;
 224 ; GFX11-WGP-LABEL: singlethread_seq_cst_fence:
 225 ; GFX11-WGP:       ; %bb.0: ; %entry
 226 ; GFX11-WGP-NEXT:    s_endpgm
 227 ;
 228 ; GFX11-CU-LABEL: singlethread_seq_cst_fence:
 229 ; GFX11-CU:       ; %bb.0: ; %entry
 230 ; GFX11-CU-NEXT:    s_endpgm
 231 ;
 232 ; GFX12-WGP-LABEL: singlethread_seq_cst_fence:
 233 ; GFX12-WGP:       ; %bb.0: ; %entry
 234 ; GFX12-WGP-NEXT:    s_endpgm
 235 ;
 236 ; GFX12-CU-LABEL: singlethread_seq_cst_fence:
 237 ; GFX12-CU:       ; %bb.0: ; %entry
 238 ; GFX12-CU-NEXT:    s_endpgm
 239 entry:
 240   fence syncscope("singlethread") seq_cst
 241   ret void
 242 }
 243
 244 define amdgpu_kernel void @singlethread_one_as_acquire_fence() {
 245 ; GFX6-LABEL: singlethread_one_as_acquire_fence:
 246 ; GFX6:       ; %bb.0: ; %entry
 247 ; GFX6-NEXT:    s_endpgm
 248 ;
 249 ; GFX7-LABEL: singlethread_one_as_acquire_fence:
 250 ; GFX7:       ; %bb.0: ; %entry
 251 ; GFX7-NEXT:    s_endpgm
 252 ;
 253 ; GFX10-WGP-LABEL: singlethread_one_as_acquire_fence:
 254 ; GFX10-WGP:       ; %bb.0: ; %entry
 255 ; GFX10-WGP-NEXT:    s_endpgm
 256 ;
 257 ; GFX10-CU-LABEL: singlethread_one_as_acquire_fence:
 258 ; GFX10-CU:       ; %bb.0: ; %entry
 259 ; GFX10-CU-NEXT:    s_endpgm
 260 ;
 261 ; SKIP-CACHE-INV-LABEL: singlethread_one_as_acquire_fence:
 262 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 263 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 264 ;
 265 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_one_as_acquire_fence:
 266 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 267 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 268 ;
 269 ; GFX90A-TGSPLIT-LABEL: singlethread_one_as_acquire_fence:
 270 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 271 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 272 ;
 273 ; GFX940-NOTTGSPLIT-LABEL: singlethread_one_as_acquire_fence:
 274 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 275 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 276 ;
 277 ; GFX940-TGSPLIT-LABEL: singlethread_one_as_acquire_fence:
 278 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 279 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 280 ;
 281 ; GFX11-WGP-LABEL: singlethread_one_as_acquire_fence:
 282 ; GFX11-WGP:       ; %bb.0: ; %entry
 283 ; GFX11-WGP-NEXT:    s_endpgm
 284 ;
 285 ; GFX11-CU-LABEL: singlethread_one_as_acquire_fence:
 286 ; GFX11-CU:       ; %bb.0: ; %entry
 287 ; GFX11-CU-NEXT:    s_endpgm
 288 ;
 289 ; GFX12-WGP-LABEL: singlethread_one_as_acquire_fence:
 290 ; GFX12-WGP:       ; %bb.0: ; %entry
 291 ; GFX12-WGP-NEXT:    s_endpgm
 292 ;
 293 ; GFX12-CU-LABEL: singlethread_one_as_acquire_fence:
 294 ; GFX12-CU:       ; %bb.0: ; %entry
 295 ; GFX12-CU-NEXT:    s_endpgm
 296 entry:
 297   fence syncscope("singlethread-one-as") acquire
 298   ret void
 299 }
 300
 301 define amdgpu_kernel void @singlethread_one_as_release_fence() {
 302 ; GFX6-LABEL: singlethread_one_as_release_fence:
 303 ; GFX6:       ; %bb.0: ; %entry
 304 ; GFX6-NEXT:    s_endpgm
 305 ;
 306 ; GFX7-LABEL: singlethread_one_as_release_fence:
 307 ; GFX7:       ; %bb.0: ; %entry
 308 ; GFX7-NEXT:    s_endpgm
 309 ;
 310 ; GFX10-WGP-LABEL: singlethread_one_as_release_fence:
 311 ; GFX10-WGP:       ; %bb.0: ; %entry
 312 ; GFX10-WGP-NEXT:    s_endpgm
 313 ;
 314 ; GFX10-CU-LABEL: singlethread_one_as_release_fence:
 315 ; GFX10-CU:       ; %bb.0: ; %entry
 316 ; GFX10-CU-NEXT:    s_endpgm
 317 ;
 318 ; SKIP-CACHE-INV-LABEL: singlethread_one_as_release_fence:
 319 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 320 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 321 ;
 322 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_one_as_release_fence:
 323 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 324 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 325 ;
 326 ; GFX90A-TGSPLIT-LABEL: singlethread_one_as_release_fence:
 327 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 328 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 329 ;
 330 ; GFX940-NOTTGSPLIT-LABEL: singlethread_one_as_release_fence:
 331 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 332 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 333 ;
 334 ; GFX940-TGSPLIT-LABEL: singlethread_one_as_release_fence:
 335 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 336 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 337 ;
 338 ; GFX11-WGP-LABEL: singlethread_one_as_release_fence:
 339 ; GFX11-WGP:       ; %bb.0: ; %entry
 340 ; GFX11-WGP-NEXT:    s_endpgm
 341 ;
 342 ; GFX11-CU-LABEL: singlethread_one_as_release_fence:
 343 ; GFX11-CU:       ; %bb.0: ; %entry
 344 ; GFX11-CU-NEXT:    s_endpgm
 345 ;
 346 ; GFX12-WGP-LABEL: singlethread_one_as_release_fence:
 347 ; GFX12-WGP:       ; %bb.0: ; %entry
 348 ; GFX12-WGP-NEXT:    s_endpgm
 349 ;
 350 ; GFX12-CU-LABEL: singlethread_one_as_release_fence:
 351 ; GFX12-CU:       ; %bb.0: ; %entry
 352 ; GFX12-CU-NEXT:    s_endpgm
 353 entry:
 354   fence syncscope("singlethread-one-as") release
 355   ret void
 356 }
 357
 358 define amdgpu_kernel void @singlethread_one_as_acq_rel_fence() {
 359 ; GFX6-LABEL: singlethread_one_as_acq_rel_fence:
 360 ; GFX6:       ; %bb.0: ; %entry
 361 ; GFX6-NEXT:    s_endpgm
 362 ;
 363 ; GFX7-LABEL: singlethread_one_as_acq_rel_fence:
 364 ; GFX7:       ; %bb.0: ; %entry
 365 ; GFX7-NEXT:    s_endpgm
 366 ;
 367 ; GFX10-WGP-LABEL: singlethread_one_as_acq_rel_fence:
 368 ; GFX10-WGP:       ; %bb.0: ; %entry
 369 ; GFX10-WGP-NEXT:    s_endpgm
 370 ;
 371 ; GFX10-CU-LABEL: singlethread_one_as_acq_rel_fence:
 372 ; GFX10-CU:       ; %bb.0: ; %entry
 373 ; GFX10-CU-NEXT:    s_endpgm
 374 ;
 375 ; SKIP-CACHE-INV-LABEL: singlethread_one_as_acq_rel_fence:
 376 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 377 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 378 ;
 379 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_one_as_acq_rel_fence:
 380 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 381 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 382 ;
 383 ; GFX90A-TGSPLIT-LABEL: singlethread_one_as_acq_rel_fence:
 384 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 385 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 386 ;
 387 ; GFX940-NOTTGSPLIT-LABEL: singlethread_one_as_acq_rel_fence:
 388 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 389 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 390 ;
 391 ; GFX940-TGSPLIT-LABEL: singlethread_one_as_acq_rel_fence:
 392 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 393 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 394 ;
 395 ; GFX11-WGP-LABEL: singlethread_one_as_acq_rel_fence:
 396 ; GFX11-WGP:       ; %bb.0: ; %entry
 397 ; GFX11-WGP-NEXT:    s_endpgm
 398 ;
 399 ; GFX11-CU-LABEL: singlethread_one_as_acq_rel_fence:
 400 ; GFX11-CU:       ; %bb.0: ; %entry
 401 ; GFX11-CU-NEXT:    s_endpgm
 402 ;
 403 ; GFX12-WGP-LABEL: singlethread_one_as_acq_rel_fence:
 404 ; GFX12-WGP:       ; %bb.0: ; %entry
 405 ; GFX12-WGP-NEXT:    s_endpgm
 406 ;
 407 ; GFX12-CU-LABEL: singlethread_one_as_acq_rel_fence:
 408 ; GFX12-CU:       ; %bb.0: ; %entry
 409 ; GFX12-CU-NEXT:    s_endpgm
 410 entry:
 411   fence syncscope("singlethread-one-as") acq_rel
 412   ret void
 413 }
 414
 415 define amdgpu_kernel void @singlethread_one_as_seq_cst_fence() {
 416 ; GFX6-LABEL: singlethread_one_as_seq_cst_fence:
 417 ; GFX6:       ; %bb.0: ; %entry
 418 ; GFX6-NEXT:    s_endpgm
 419 ;
 420 ; GFX7-LABEL: singlethread_one_as_seq_cst_fence:
 421 ; GFX7:       ; %bb.0: ; %entry
 422 ; GFX7-NEXT:    s_endpgm
 423 ;
 424 ; GFX10-WGP-LABEL: singlethread_one_as_seq_cst_fence:
 425 ; GFX10-WGP:       ; %bb.0: ; %entry
 426 ; GFX10-WGP-NEXT:    s_endpgm
 427 ;
 428 ; GFX10-CU-LABEL: singlethread_one_as_seq_cst_fence:
 429 ; GFX10-CU:       ; %bb.0: ; %entry
 430 ; GFX10-CU-NEXT:    s_endpgm
 431 ;
 432 ; SKIP-CACHE-INV-LABEL: singlethread_one_as_seq_cst_fence:
 433 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 434 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 435 ;
 436 ; GFX90A-NOTTGSPLIT-LABEL: singlethread_one_as_seq_cst_fence:
 437 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 438 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 439 ;
 440 ; GFX90A-TGSPLIT-LABEL: singlethread_one_as_seq_cst_fence:
 441 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 442 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 443 ;
 444 ; GFX940-NOTTGSPLIT-LABEL: singlethread_one_as_seq_cst_fence:
 445 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 446 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 447 ;
 448 ; GFX940-TGSPLIT-LABEL: singlethread_one_as_seq_cst_fence:
 449 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 450 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 451 ;
 452 ; GFX11-WGP-LABEL: singlethread_one_as_seq_cst_fence:
 453 ; GFX11-WGP:       ; %bb.0: ; %entry
 454 ; GFX11-WGP-NEXT:    s_endpgm
 455 ;
 456 ; GFX11-CU-LABEL: singlethread_one_as_seq_cst_fence:
 457 ; GFX11-CU:       ; %bb.0: ; %entry
 458 ; GFX11-CU-NEXT:    s_endpgm
 459 ;
 460 ; GFX12-WGP-LABEL: singlethread_one_as_seq_cst_fence:
 461 ; GFX12-WGP:       ; %bb.0: ; %entry
 462 ; GFX12-WGP-NEXT:    s_endpgm
 463 ;
 464 ; GFX12-CU-LABEL: singlethread_one_as_seq_cst_fence:
 465 ; GFX12-CU:       ; %bb.0: ; %entry
 466 ; GFX12-CU-NEXT:    s_endpgm
 467 entry:
 468   fence syncscope("singlethread-one-as") seq_cst
 469   ret void
 470 }
 471
 472 define amdgpu_kernel void @wavefront_acquire_fence() {
 473 ; GFX6-LABEL: wavefront_acquire_fence:
 474 ; GFX6:       ; %bb.0: ; %entry
 475 ; GFX6-NEXT:    s_endpgm
 476 ;
 477 ; GFX7-LABEL: wavefront_acquire_fence:
 478 ; GFX7:       ; %bb.0: ; %entry
 479 ; GFX7-NEXT:    s_endpgm
 480 ;
 481 ; GFX10-WGP-LABEL: wavefront_acquire_fence:
 482 ; GFX10-WGP:       ; %bb.0: ; %entry
 483 ; GFX10-WGP-NEXT:    s_endpgm
 484 ;
 485 ; GFX10-CU-LABEL: wavefront_acquire_fence:
 486 ; GFX10-CU:       ; %bb.0: ; %entry
 487 ; GFX10-CU-NEXT:    s_endpgm
 488 ;
 489 ; SKIP-CACHE-INV-LABEL: wavefront_acquire_fence:
 490 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 491 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 492 ;
 493 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_acquire_fence:
 494 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 495 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 496 ;
 497 ; GFX90A-TGSPLIT-LABEL: wavefront_acquire_fence:
 498 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 499 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 500 ;
 501 ; GFX940-NOTTGSPLIT-LABEL: wavefront_acquire_fence:
 502 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 503 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 504 ;
 505 ; GFX940-TGSPLIT-LABEL: wavefront_acquire_fence:
 506 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 507 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 508 ;
 509 ; GFX11-WGP-LABEL: wavefront_acquire_fence:
 510 ; GFX11-WGP:       ; %bb.0: ; %entry
 511 ; GFX11-WGP-NEXT:    s_endpgm
 512 ;
 513 ; GFX11-CU-LABEL: wavefront_acquire_fence:
 514 ; GFX11-CU:       ; %bb.0: ; %entry
 515 ; GFX11-CU-NEXT:    s_endpgm
 516 ;
 517 ; GFX12-WGP-LABEL: wavefront_acquire_fence:
 518 ; GFX12-WGP:       ; %bb.0: ; %entry
 519 ; GFX12-WGP-NEXT:    s_endpgm
 520 ;
 521 ; GFX12-CU-LABEL: wavefront_acquire_fence:
 522 ; GFX12-CU:       ; %bb.0: ; %entry
 523 ; GFX12-CU-NEXT:    s_endpgm
 524 entry:
 525   fence syncscope("wavefront") acquire
 526   ret void
 527 }
 528
 529 define amdgpu_kernel void @wavefront_release_fence() {
 530 ; GFX6-LABEL: wavefront_release_fence:
 531 ; GFX6:       ; %bb.0: ; %entry
 532 ; GFX6-NEXT:    s_endpgm
 533 ;
 534 ; GFX7-LABEL: wavefront_release_fence:
 535 ; GFX7:       ; %bb.0: ; %entry
 536 ; GFX7-NEXT:    s_endpgm
 537 ;
 538 ; GFX10-WGP-LABEL: wavefront_release_fence:
 539 ; GFX10-WGP:       ; %bb.0: ; %entry
 540 ; GFX10-WGP-NEXT:    s_endpgm
 541 ;
 542 ; GFX10-CU-LABEL: wavefront_release_fence:
 543 ; GFX10-CU:       ; %bb.0: ; %entry
 544 ; GFX10-CU-NEXT:    s_endpgm
 545 ;
 546 ; SKIP-CACHE-INV-LABEL: wavefront_release_fence:
 547 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 548 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 549 ;
 550 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_release_fence:
 551 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 552 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 553 ;
 554 ; GFX90A-TGSPLIT-LABEL: wavefront_release_fence:
 555 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 556 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 557 ;
 558 ; GFX940-NOTTGSPLIT-LABEL: wavefront_release_fence:
 559 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 560 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 561 ;
 562 ; GFX940-TGSPLIT-LABEL: wavefront_release_fence:
 563 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 564 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 565 ;
 566 ; GFX11-WGP-LABEL: wavefront_release_fence:
 567 ; GFX11-WGP:       ; %bb.0: ; %entry
 568 ; GFX11-WGP-NEXT:    s_endpgm
 569 ;
 570 ; GFX11-CU-LABEL: wavefront_release_fence:
 571 ; GFX11-CU:       ; %bb.0: ; %entry
 572 ; GFX11-CU-NEXT:    s_endpgm
 573 ;
 574 ; GFX12-WGP-LABEL: wavefront_release_fence:
 575 ; GFX12-WGP:       ; %bb.0: ; %entry
 576 ; GFX12-WGP-NEXT:    s_endpgm
 577 ;
 578 ; GFX12-CU-LABEL: wavefront_release_fence:
 579 ; GFX12-CU:       ; %bb.0: ; %entry
 580 ; GFX12-CU-NEXT:    s_endpgm
 581 entry:
 582   fence syncscope("wavefront") release
 583   ret void
 584 }
 585
 586 define amdgpu_kernel void @wavefront_acq_rel_fence() {
 587 ; GFX6-LABEL: wavefront_acq_rel_fence:
 588 ; GFX6:       ; %bb.0: ; %entry
 589 ; GFX6-NEXT:    s_endpgm
 590 ;
 591 ; GFX7-LABEL: wavefront_acq_rel_fence:
 592 ; GFX7:       ; %bb.0: ; %entry
 593 ; GFX7-NEXT:    s_endpgm
 594 ;
 595 ; GFX10-WGP-LABEL: wavefront_acq_rel_fence:
 596 ; GFX10-WGP:       ; %bb.0: ; %entry
 597 ; GFX10-WGP-NEXT:    s_endpgm
 598 ;
 599 ; GFX10-CU-LABEL: wavefront_acq_rel_fence:
 600 ; GFX10-CU:       ; %bb.0: ; %entry
 601 ; GFX10-CU-NEXT:    s_endpgm
 602 ;
 603 ; SKIP-CACHE-INV-LABEL: wavefront_acq_rel_fence:
 604 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 605 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 606 ;
 607 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_acq_rel_fence:
 608 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 609 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 610 ;
 611 ; GFX90A-TGSPLIT-LABEL: wavefront_acq_rel_fence:
 612 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 613 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 614 ;
 615 ; GFX940-NOTTGSPLIT-LABEL: wavefront_acq_rel_fence:
 616 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 617 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 618 ;
 619 ; GFX940-TGSPLIT-LABEL: wavefront_acq_rel_fence:
 620 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 621 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 622 ;
 623 ; GFX11-WGP-LABEL: wavefront_acq_rel_fence:
 624 ; GFX11-WGP:       ; %bb.0: ; %entry
 625 ; GFX11-WGP-NEXT:    s_endpgm
 626 ;
 627 ; GFX11-CU-LABEL: wavefront_acq_rel_fence:
 628 ; GFX11-CU:       ; %bb.0: ; %entry
 629 ; GFX11-CU-NEXT:    s_endpgm
 630 ;
 631 ; GFX12-WGP-LABEL: wavefront_acq_rel_fence:
 632 ; GFX12-WGP:       ; %bb.0: ; %entry
 633 ; GFX12-WGP-NEXT:    s_endpgm
 634 ;
 635 ; GFX12-CU-LABEL: wavefront_acq_rel_fence:
 636 ; GFX12-CU:       ; %bb.0: ; %entry
 637 ; GFX12-CU-NEXT:    s_endpgm
 638 entry:
 639   fence syncscope("wavefront") acq_rel
 640   ret void
 641 }
 642
 643 define amdgpu_kernel void @wavefront_seq_cst_fence() {
 644 ; GFX6-LABEL: wavefront_seq_cst_fence:
 645 ; GFX6:       ; %bb.0: ; %entry
 646 ; GFX6-NEXT:    s_endpgm
 647 ;
 648 ; GFX7-LABEL: wavefront_seq_cst_fence:
 649 ; GFX7:       ; %bb.0: ; %entry
 650 ; GFX7-NEXT:    s_endpgm
 651 ;
 652 ; GFX10-WGP-LABEL: wavefront_seq_cst_fence:
 653 ; GFX10-WGP:       ; %bb.0: ; %entry
 654 ; GFX10-WGP-NEXT:    s_endpgm
 655 ;
 656 ; GFX10-CU-LABEL: wavefront_seq_cst_fence:
 657 ; GFX10-CU:       ; %bb.0: ; %entry
 658 ; GFX10-CU-NEXT:    s_endpgm
 659 ;
 660 ; SKIP-CACHE-INV-LABEL: wavefront_seq_cst_fence:
 661 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 662 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 663 ;
 664 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_seq_cst_fence:
 665 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 666 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 667 ;
 668 ; GFX90A-TGSPLIT-LABEL: wavefront_seq_cst_fence:
 669 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 670 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 671 ;
 672 ; GFX940-NOTTGSPLIT-LABEL: wavefront_seq_cst_fence:
 673 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 674 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 675 ;
 676 ; GFX940-TGSPLIT-LABEL: wavefront_seq_cst_fence:
 677 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 678 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 679 ;
 680 ; GFX11-WGP-LABEL: wavefront_seq_cst_fence:
 681 ; GFX11-WGP:       ; %bb.0: ; %entry
 682 ; GFX11-WGP-NEXT:    s_endpgm
 683 ;
 684 ; GFX11-CU-LABEL: wavefront_seq_cst_fence:
 685 ; GFX11-CU:       ; %bb.0: ; %entry
 686 ; GFX11-CU-NEXT:    s_endpgm
 687 ;
 688 ; GFX12-WGP-LABEL: wavefront_seq_cst_fence:
 689 ; GFX12-WGP:       ; %bb.0: ; %entry
 690 ; GFX12-WGP-NEXT:    s_endpgm
 691 ;
 692 ; GFX12-CU-LABEL: wavefront_seq_cst_fence:
 693 ; GFX12-CU:       ; %bb.0: ; %entry
 694 ; GFX12-CU-NEXT:    s_endpgm
 695 entry:
 696   fence syncscope("wavefront") seq_cst
 697   ret void
 698 }
 699
 700 define amdgpu_kernel void @wavefront_one_as_acquire_fence() {
 701 ; GFX6-LABEL: wavefront_one_as_acquire_fence:
 702 ; GFX6:       ; %bb.0: ; %entry
 703 ; GFX6-NEXT:    s_endpgm
 704 ;
 705 ; GFX7-LABEL: wavefront_one_as_acquire_fence:
 706 ; GFX7:       ; %bb.0: ; %entry
 707 ; GFX7-NEXT:    s_endpgm
 708 ;
 709 ; GFX10-WGP-LABEL: wavefront_one_as_acquire_fence:
 710 ; GFX10-WGP:       ; %bb.0: ; %entry
 711 ; GFX10-WGP-NEXT:    s_endpgm
 712 ;
 713 ; GFX10-CU-LABEL: wavefront_one_as_acquire_fence:
 714 ; GFX10-CU:       ; %bb.0: ; %entry
 715 ; GFX10-CU-NEXT:    s_endpgm
 716 ;
 717 ; SKIP-CACHE-INV-LABEL: wavefront_one_as_acquire_fence:
 718 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 719 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 720 ;
 721 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_one_as_acquire_fence:
 722 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 723 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 724 ;
 725 ; GFX90A-TGSPLIT-LABEL: wavefront_one_as_acquire_fence:
 726 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 727 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 728 ;
 729 ; GFX940-NOTTGSPLIT-LABEL: wavefront_one_as_acquire_fence:
 730 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 731 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 732 ;
 733 ; GFX940-TGSPLIT-LABEL: wavefront_one_as_acquire_fence:
 734 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 735 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 736 ;
 737 ; GFX11-WGP-LABEL: wavefront_one_as_acquire_fence:
 738 ; GFX11-WGP:       ; %bb.0: ; %entry
 739 ; GFX11-WGP-NEXT:    s_endpgm
 740 ;
 741 ; GFX11-CU-LABEL: wavefront_one_as_acquire_fence:
 742 ; GFX11-CU:       ; %bb.0: ; %entry
 743 ; GFX11-CU-NEXT:    s_endpgm
 744 ;
 745 ; GFX12-WGP-LABEL: wavefront_one_as_acquire_fence:
 746 ; GFX12-WGP:       ; %bb.0: ; %entry
 747 ; GFX12-WGP-NEXT:    s_endpgm
 748 ;
 749 ; GFX12-CU-LABEL: wavefront_one_as_acquire_fence:
 750 ; GFX12-CU:       ; %bb.0: ; %entry
 751 ; GFX12-CU-NEXT:    s_endpgm
 752 entry:
 753   fence syncscope("wavefront-one-as") acquire
 754   ret void
 755 }
 756
 757 define amdgpu_kernel void @wavefront_one_as_release_fence() {
 758 ; GFX6-LABEL: wavefront_one_as_release_fence:
 759 ; GFX6:       ; %bb.0: ; %entry
 760 ; GFX6-NEXT:    s_endpgm
 761 ;
 762 ; GFX7-LABEL: wavefront_one_as_release_fence:
 763 ; GFX7:       ; %bb.0: ; %entry
 764 ; GFX7-NEXT:    s_endpgm
 765 ;
 766 ; GFX10-WGP-LABEL: wavefront_one_as_release_fence:
 767 ; GFX10-WGP:       ; %bb.0: ; %entry
 768 ; GFX10-WGP-NEXT:    s_endpgm
 769 ;
 770 ; GFX10-CU-LABEL: wavefront_one_as_release_fence:
 771 ; GFX10-CU:       ; %bb.0: ; %entry
 772 ; GFX10-CU-NEXT:    s_endpgm
 773 ;
 774 ; SKIP-CACHE-INV-LABEL: wavefront_one_as_release_fence:
 775 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 776 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 777 ;
 778 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_one_as_release_fence:
 779 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 780 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 781 ;
 782 ; GFX90A-TGSPLIT-LABEL: wavefront_one_as_release_fence:
 783 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 784 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 785 ;
 786 ; GFX940-NOTTGSPLIT-LABEL: wavefront_one_as_release_fence:
 787 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 788 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 789 ;
 790 ; GFX940-TGSPLIT-LABEL: wavefront_one_as_release_fence:
 791 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 792 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 793 ;
 794 ; GFX11-WGP-LABEL: wavefront_one_as_release_fence:
 795 ; GFX11-WGP:       ; %bb.0: ; %entry
 796 ; GFX11-WGP-NEXT:    s_endpgm
 797 ;
 798 ; GFX11-CU-LABEL: wavefront_one_as_release_fence:
 799 ; GFX11-CU:       ; %bb.0: ; %entry
 800 ; GFX11-CU-NEXT:    s_endpgm
 801 ;
 802 ; GFX12-WGP-LABEL: wavefront_one_as_release_fence:
 803 ; GFX12-WGP:       ; %bb.0: ; %entry
 804 ; GFX12-WGP-NEXT:    s_endpgm
 805 ;
 806 ; GFX12-CU-LABEL: wavefront_one_as_release_fence:
 807 ; GFX12-CU:       ; %bb.0: ; %entry
 808 ; GFX12-CU-NEXT:    s_endpgm
 809 entry:
 810   fence syncscope("wavefront-one-as") release
 811   ret void
 812 }
 813
 814 define amdgpu_kernel void @wavefront_one_as_acq_rel_fence() {
 815 ; GFX6-LABEL: wavefront_one_as_acq_rel_fence:
 816 ; GFX6:       ; %bb.0: ; %entry
 817 ; GFX6-NEXT:    s_endpgm
 818 ;
 819 ; GFX7-LABEL: wavefront_one_as_acq_rel_fence:
 820 ; GFX7:       ; %bb.0: ; %entry
 821 ; GFX7-NEXT:    s_endpgm
 822 ;
 823 ; GFX10-WGP-LABEL: wavefront_one_as_acq_rel_fence:
 824 ; GFX10-WGP:       ; %bb.0: ; %entry
 825 ; GFX10-WGP-NEXT:    s_endpgm
 826 ;
 827 ; GFX10-CU-LABEL: wavefront_one_as_acq_rel_fence:
 828 ; GFX10-CU:       ; %bb.0: ; %entry
 829 ; GFX10-CU-NEXT:    s_endpgm
 830 ;
 831 ; SKIP-CACHE-INV-LABEL: wavefront_one_as_acq_rel_fence:
 832 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 833 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 834 ;
 835 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_one_as_acq_rel_fence:
 836 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 837 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 838 ;
 839 ; GFX90A-TGSPLIT-LABEL: wavefront_one_as_acq_rel_fence:
 840 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 841 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 842 ;
 843 ; GFX940-NOTTGSPLIT-LABEL: wavefront_one_as_acq_rel_fence:
 844 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 845 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 846 ;
 847 ; GFX940-TGSPLIT-LABEL: wavefront_one_as_acq_rel_fence:
 848 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 849 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 850 ;
 851 ; GFX11-WGP-LABEL: wavefront_one_as_acq_rel_fence:
 852 ; GFX11-WGP:       ; %bb.0: ; %entry
 853 ; GFX11-WGP-NEXT:    s_endpgm
 854 ;
 855 ; GFX11-CU-LABEL: wavefront_one_as_acq_rel_fence:
 856 ; GFX11-CU:       ; %bb.0: ; %entry
 857 ; GFX11-CU-NEXT:    s_endpgm
 858 ;
 859 ; GFX12-WGP-LABEL: wavefront_one_as_acq_rel_fence:
 860 ; GFX12-WGP:       ; %bb.0: ; %entry
 861 ; GFX12-WGP-NEXT:    s_endpgm
 862 ;
 863 ; GFX12-CU-LABEL: wavefront_one_as_acq_rel_fence:
 864 ; GFX12-CU:       ; %bb.0: ; %entry
 865 ; GFX12-CU-NEXT:    s_endpgm
 866 entry:
 867   fence syncscope("wavefront-one-as") acq_rel
 868   ret void
 869 }
 870
 871 define amdgpu_kernel void @wavefront_one_as_seq_cst_fence() {
 872 ; GFX6-LABEL: wavefront_one_as_seq_cst_fence:
 873 ; GFX6:       ; %bb.0: ; %entry
 874 ; GFX6-NEXT:    s_endpgm
 875 ;
 876 ; GFX7-LABEL: wavefront_one_as_seq_cst_fence:
 877 ; GFX7:       ; %bb.0: ; %entry
 878 ; GFX7-NEXT:    s_endpgm
 879 ;
 880 ; GFX10-WGP-LABEL: wavefront_one_as_seq_cst_fence:
 881 ; GFX10-WGP:       ; %bb.0: ; %entry
 882 ; GFX10-WGP-NEXT:    s_endpgm
 883 ;
 884 ; GFX10-CU-LABEL: wavefront_one_as_seq_cst_fence:
 885 ; GFX10-CU:       ; %bb.0: ; %entry
 886 ; GFX10-CU-NEXT:    s_endpgm
 887 ;
 888 ; SKIP-CACHE-INV-LABEL: wavefront_one_as_seq_cst_fence:
 889 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 890 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 891 ;
 892 ; GFX90A-NOTTGSPLIT-LABEL: wavefront_one_as_seq_cst_fence:
 893 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 894 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 895 ;
 896 ; GFX90A-TGSPLIT-LABEL: wavefront_one_as_seq_cst_fence:
 897 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 898 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 899 ;
 900 ; GFX940-NOTTGSPLIT-LABEL: wavefront_one_as_seq_cst_fence:
 901 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 902 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 903 ;
 904 ; GFX940-TGSPLIT-LABEL: wavefront_one_as_seq_cst_fence:
 905 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 906 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 907 ;
 908 ; GFX11-WGP-LABEL: wavefront_one_as_seq_cst_fence:
 909 ; GFX11-WGP:       ; %bb.0: ; %entry
 910 ; GFX11-WGP-NEXT:    s_endpgm
 911 ;
 912 ; GFX11-CU-LABEL: wavefront_one_as_seq_cst_fence:
 913 ; GFX11-CU:       ; %bb.0: ; %entry
 914 ; GFX11-CU-NEXT:    s_endpgm
 915 ;
 916 ; GFX12-WGP-LABEL: wavefront_one_as_seq_cst_fence:
 917 ; GFX12-WGP:       ; %bb.0: ; %entry
 918 ; GFX12-WGP-NEXT:    s_endpgm
 919 ;
 920 ; GFX12-CU-LABEL: wavefront_one_as_seq_cst_fence:
 921 ; GFX12-CU:       ; %bb.0: ; %entry
 922 ; GFX12-CU-NEXT:    s_endpgm
 923 entry:
 924   fence syncscope("wavefront-one-as") seq_cst
 925   ret void
 926 }
 927
 928 define amdgpu_kernel void @workgroup_acquire_fence() {
 929 ; GFX6-LABEL: workgroup_acquire_fence:
 930 ; GFX6:       ; %bb.0: ; %entry
 931 ; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
 932 ; GFX6-NEXT:    s_endpgm
 933 ;
 934 ; GFX7-LABEL: workgroup_acquire_fence:
 935 ; GFX7:       ; %bb.0: ; %entry
 936 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
 937 ; GFX7-NEXT:    s_endpgm
 938 ;
 939 ; GFX10-WGP-LABEL: workgroup_acquire_fence:
 940 ; GFX10-WGP:       ; %bb.0: ; %entry
 941 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 942 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
 943 ; GFX10-WGP-NEXT:    buffer_gl0_inv
 944 ; GFX10-WGP-NEXT:    s_endpgm
 945 ;
 946 ; GFX10-CU-LABEL: workgroup_acquire_fence:
 947 ; GFX10-CU:       ; %bb.0: ; %entry
 948 ; GFX10-CU-NEXT:    s_waitcnt lgkmcnt(0)
 949 ; GFX10-CU-NEXT:    s_endpgm
 950 ;
 951 ; SKIP-CACHE-INV-LABEL: workgroup_acquire_fence:
 952 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
 953 ; SKIP-CACHE-INV-NEXT:    s_waitcnt lgkmcnt(0)
 954 ; SKIP-CACHE-INV-NEXT:    s_endpgm
 955 ;
 956 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_acquire_fence:
 957 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
 958 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
 959 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
 960 ;
 961 ; GFX90A-TGSPLIT-LABEL: workgroup_acquire_fence:
 962 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
 963 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 964 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
 965 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
 966 ;
 967 ; GFX940-NOTTGSPLIT-LABEL: workgroup_acquire_fence:
 968 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
 969 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
 970 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
 971 ;
 972 ; GFX940-TGSPLIT-LABEL: workgroup_acquire_fence:
 973 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
 974 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 975 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
 976 ; GFX940-TGSPLIT-NEXT:    s_endpgm
 977 ;
 978 ; GFX11-WGP-LABEL: workgroup_acquire_fence:
 979 ; GFX11-WGP:       ; %bb.0: ; %entry
 980 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 981 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
 982 ; GFX11-WGP-NEXT:    buffer_gl0_inv
 983 ; GFX11-WGP-NEXT:    s_endpgm
 984 ;
 985 ; GFX11-CU-LABEL: workgroup_acquire_fence:
 986 ; GFX11-CU:       ; %bb.0: ; %entry
 987 ; GFX11-CU-NEXT:    s_waitcnt lgkmcnt(0)
 988 ; GFX11-CU-NEXT:    s_endpgm
 989 ;
 990 ; GFX12-WGP-LABEL: workgroup_acquire_fence:
 991 ; GFX12-WGP:       ; %bb.0: ; %entry
 992 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
 993 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
 994 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
 995 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
 996 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
 997 ; GFX12-WGP-NEXT:    s_endpgm
 998 ;
 999 ; GFX12-CU-LABEL: workgroup_acquire_fence:
1000 ; GFX12-CU:       ; %bb.0: ; %entry
1001 ; GFX12-CU-NEXT:    s_wait_dscnt 0x0
1002 ; GFX12-CU-NEXT:    s_endpgm
1003 entry:
1004   fence syncscope("workgroup") acquire
1005   ret void
1006 }
1007
1008 define amdgpu_kernel void @workgroup_release_fence() {
1009 ; GFX6-LABEL: workgroup_release_fence:
1010 ; GFX6:       ; %bb.0: ; %entry
1011 ; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1012 ; GFX6-NEXT:    s_endpgm
1013 ;
1014 ; GFX7-LABEL: workgroup_release_fence:
1015 ; GFX7:       ; %bb.0: ; %entry
1016 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
1017 ; GFX7-NEXT:    s_endpgm
1018 ;
1019 ; GFX10-WGP-LABEL: workgroup_release_fence:
1020 ; GFX10-WGP:       ; %bb.0: ; %entry
1021 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1022 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1023 ; GFX10-WGP-NEXT:    s_endpgm
1024 ;
1025 ; GFX10-CU-LABEL: workgroup_release_fence:
1026 ; GFX10-CU:       ; %bb.0: ; %entry
1027 ; GFX10-CU-NEXT:    s_waitcnt lgkmcnt(0)
1028 ; GFX10-CU-NEXT:    s_endpgm
1029 ;
1030 ; SKIP-CACHE-INV-LABEL: workgroup_release_fence:
1031 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1032 ; SKIP-CACHE-INV-NEXT:    s_waitcnt lgkmcnt(0)
1033 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1034 ;
1035 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_release_fence:
1036 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1037 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1038 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1039 ;
1040 ; GFX90A-TGSPLIT-LABEL: workgroup_release_fence:
1041 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1042 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1043 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1044 ;
1045 ; GFX940-NOTTGSPLIT-LABEL: workgroup_release_fence:
1046 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1047 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1048 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1049 ;
1050 ; GFX940-TGSPLIT-LABEL: workgroup_release_fence:
1051 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1052 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1053 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1054 ;
1055 ; GFX11-WGP-LABEL: workgroup_release_fence:
1056 ; GFX11-WGP:       ; %bb.0: ; %entry
1057 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1058 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1059 ; GFX11-WGP-NEXT:    s_endpgm
1060 ;
1061 ; GFX11-CU-LABEL: workgroup_release_fence:
1062 ; GFX11-CU:       ; %bb.0: ; %entry
1063 ; GFX11-CU-NEXT:    s_waitcnt lgkmcnt(0)
1064 ; GFX11-CU-NEXT:    s_endpgm
1065 ;
1066 ; GFX12-WGP-LABEL: workgroup_release_fence:
1067 ; GFX12-WGP:       ; %bb.0: ; %entry
1068 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1069 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1070 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1071 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1072 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1073 ; GFX12-WGP-NEXT:    s_endpgm
1074 ;
1075 ; GFX12-CU-LABEL: workgroup_release_fence:
1076 ; GFX12-CU:       ; %bb.0: ; %entry
1077 ; GFX12-CU-NEXT:    s_wait_dscnt 0x0
1078 ; GFX12-CU-NEXT:    s_endpgm
1079 entry:
1080   fence syncscope("workgroup") release
1081   ret void
1082 }
1083
1084 define amdgpu_kernel void @workgroup_acq_rel_fence() {
1085 ; GFX6-LABEL: workgroup_acq_rel_fence:
1086 ; GFX6:       ; %bb.0: ; %entry
1087 ; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1088 ; GFX6-NEXT:    s_endpgm
1089 ;
1090 ; GFX7-LABEL: workgroup_acq_rel_fence:
1091 ; GFX7:       ; %bb.0: ; %entry
1092 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
1093 ; GFX7-NEXT:    s_endpgm
1094 ;
1095 ; GFX10-WGP-LABEL: workgroup_acq_rel_fence:
1096 ; GFX10-WGP:       ; %bb.0: ; %entry
1097 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1098 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1099 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1100 ; GFX10-WGP-NEXT:    s_endpgm
1101 ;
1102 ; GFX10-CU-LABEL: workgroup_acq_rel_fence:
1103 ; GFX10-CU:       ; %bb.0: ; %entry
1104 ; GFX10-CU-NEXT:    s_waitcnt lgkmcnt(0)
1105 ; GFX10-CU-NEXT:    s_endpgm
1106 ;
1107 ; SKIP-CACHE-INV-LABEL: workgroup_acq_rel_fence:
1108 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1109 ; SKIP-CACHE-INV-NEXT:    s_waitcnt lgkmcnt(0)
1110 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1111 ;
1112 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_acq_rel_fence:
1113 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1114 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1115 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1116 ;
1117 ; GFX90A-TGSPLIT-LABEL: workgroup_acq_rel_fence:
1118 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1119 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1120 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1121 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1122 ;
1123 ; GFX940-NOTTGSPLIT-LABEL: workgroup_acq_rel_fence:
1124 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1125 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1126 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1127 ;
1128 ; GFX940-TGSPLIT-LABEL: workgroup_acq_rel_fence:
1129 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1130 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1131 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
1132 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1133 ;
1134 ; GFX11-WGP-LABEL: workgroup_acq_rel_fence:
1135 ; GFX11-WGP:       ; %bb.0: ; %entry
1136 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1137 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1138 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1139 ; GFX11-WGP-NEXT:    s_endpgm
1140 ;
1141 ; GFX11-CU-LABEL: workgroup_acq_rel_fence:
1142 ; GFX11-CU:       ; %bb.0: ; %entry
1143 ; GFX11-CU-NEXT:    s_waitcnt lgkmcnt(0)
1144 ; GFX11-CU-NEXT:    s_endpgm
1145 ;
1146 ; GFX12-WGP-LABEL: workgroup_acq_rel_fence:
1147 ; GFX12-WGP:       ; %bb.0: ; %entry
1148 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1149 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1150 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1151 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1152 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1153 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
1154 ; GFX12-WGP-NEXT:    s_endpgm
1155 ;
1156 ; GFX12-CU-LABEL: workgroup_acq_rel_fence:
1157 ; GFX12-CU:       ; %bb.0: ; %entry
1158 ; GFX12-CU-NEXT:    s_wait_dscnt 0x0
1159 ; GFX12-CU-NEXT:    s_endpgm
1160 entry:
1161   fence syncscope("workgroup") acq_rel
1162   ret void
1163 }
1164
1165 define amdgpu_kernel void @workgroup_seq_cst_fence() {
1166 ; GFX6-LABEL: workgroup_seq_cst_fence:
1167 ; GFX6:       ; %bb.0: ; %entry
1168 ; GFX6-NEXT:    s_waitcnt lgkmcnt(0)
1169 ; GFX6-NEXT:    s_endpgm
1170 ;
1171 ; GFX7-LABEL: workgroup_seq_cst_fence:
1172 ; GFX7:       ; %bb.0: ; %entry
1173 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
1174 ; GFX7-NEXT:    s_endpgm
1175 ;
1176 ; GFX10-WGP-LABEL: workgroup_seq_cst_fence:
1177 ; GFX10-WGP:       ; %bb.0: ; %entry
1178 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1179 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1180 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1181 ; GFX10-WGP-NEXT:    s_endpgm
1182 ;
1183 ; GFX10-CU-LABEL: workgroup_seq_cst_fence:
1184 ; GFX10-CU:       ; %bb.0: ; %entry
1185 ; GFX10-CU-NEXT:    s_waitcnt lgkmcnt(0)
1186 ; GFX10-CU-NEXT:    s_endpgm
1187 ;
1188 ; SKIP-CACHE-INV-LABEL: workgroup_seq_cst_fence:
1189 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1190 ; SKIP-CACHE-INV-NEXT:    s_waitcnt lgkmcnt(0)
1191 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1192 ;
1193 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_seq_cst_fence:
1194 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1195 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1196 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1197 ;
1198 ; GFX90A-TGSPLIT-LABEL: workgroup_seq_cst_fence:
1199 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1200 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1201 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1202 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1203 ;
1204 ; GFX940-NOTTGSPLIT-LABEL: workgroup_seq_cst_fence:
1205 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1206 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt lgkmcnt(0)
1207 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1208 ;
1209 ; GFX940-TGSPLIT-LABEL: workgroup_seq_cst_fence:
1210 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1211 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1212 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
1213 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1214 ;
1215 ; GFX11-WGP-LABEL: workgroup_seq_cst_fence:
1216 ; GFX11-WGP:       ; %bb.0: ; %entry
1217 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1218 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1219 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1220 ; GFX11-WGP-NEXT:    s_endpgm
1221 ;
1222 ; GFX11-CU-LABEL: workgroup_seq_cst_fence:
1223 ; GFX11-CU:       ; %bb.0: ; %entry
1224 ; GFX11-CU-NEXT:    s_waitcnt lgkmcnt(0)
1225 ; GFX11-CU-NEXT:    s_endpgm
1226 ;
1227 ; GFX12-WGP-LABEL: workgroup_seq_cst_fence:
1228 ; GFX12-WGP:       ; %bb.0: ; %entry
1229 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1230 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1231 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1232 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1233 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1234 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
1235 ; GFX12-WGP-NEXT:    s_endpgm
1236 ;
1237 ; GFX12-CU-LABEL: workgroup_seq_cst_fence:
1238 ; GFX12-CU:       ; %bb.0: ; %entry
1239 ; GFX12-CU-NEXT:    s_wait_dscnt 0x0
1240 ; GFX12-CU-NEXT:    s_endpgm
1241 entry:
1242   fence syncscope("workgroup") seq_cst
1243   ret void
1244 }
1245
1246 define amdgpu_kernel void @workgroup_one_as_acquire_fence() {
1247 ; GFX6-LABEL: workgroup_one_as_acquire_fence:
1248 ; GFX6:       ; %bb.0: ; %entry
1249 ; GFX6-NEXT:    s_endpgm
1250 ;
1251 ; GFX7-LABEL: workgroup_one_as_acquire_fence:
1252 ; GFX7:       ; %bb.0: ; %entry
1253 ; GFX7-NEXT:    s_endpgm
1254 ;
1255 ; GFX10-WGP-LABEL: workgroup_one_as_acquire_fence:
1256 ; GFX10-WGP:       ; %bb.0: ; %entry
1257 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
1258 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1259 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1260 ; GFX10-WGP-NEXT:    s_endpgm
1261 ;
1262 ; GFX10-CU-LABEL: workgroup_one_as_acquire_fence:
1263 ; GFX10-CU:       ; %bb.0: ; %entry
1264 ; GFX10-CU-NEXT:    s_endpgm
1265 ;
1266 ; SKIP-CACHE-INV-LABEL: workgroup_one_as_acquire_fence:
1267 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1268 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1269 ;
1270 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_one_as_acquire_fence:
1271 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1272 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1273 ;
1274 ; GFX90A-TGSPLIT-LABEL: workgroup_one_as_acquire_fence:
1275 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1276 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1277 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1278 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1279 ;
1280 ; GFX940-NOTTGSPLIT-LABEL: workgroup_one_as_acquire_fence:
1281 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1282 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1283 ;
1284 ; GFX940-TGSPLIT-LABEL: workgroup_one_as_acquire_fence:
1285 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1286 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1287 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
1288 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1289 ;
1290 ; GFX11-WGP-LABEL: workgroup_one_as_acquire_fence:
1291 ; GFX11-WGP:       ; %bb.0: ; %entry
1292 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
1293 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1294 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1295 ; GFX11-WGP-NEXT:    s_endpgm
1296 ;
1297 ; GFX11-CU-LABEL: workgroup_one_as_acquire_fence:
1298 ; GFX11-CU:       ; %bb.0: ; %entry
1299 ; GFX11-CU-NEXT:    s_endpgm
1300 ;
1301 ; GFX12-WGP-LABEL: workgroup_one_as_acquire_fence:
1302 ; GFX12-WGP:       ; %bb.0: ; %entry
1303 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1304 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1305 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
1306 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1307 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
1308 ; GFX12-WGP-NEXT:    s_endpgm
1309 ;
1310 ; GFX12-CU-LABEL: workgroup_one_as_acquire_fence:
1311 ; GFX12-CU:       ; %bb.0: ; %entry
1312 ; GFX12-CU-NEXT:    s_endpgm
1313 entry:
1314   fence syncscope("workgroup-one-as") acquire
1315   ret void
1316 }
1317
1318 define amdgpu_kernel void @workgroup_one_as_release_fence() {
1319 ; GFX6-LABEL: workgroup_one_as_release_fence:
1320 ; GFX6:       ; %bb.0: ; %entry
1321 ; GFX6-NEXT:    s_endpgm
1322 ;
1323 ; GFX7-LABEL: workgroup_one_as_release_fence:
1324 ; GFX7:       ; %bb.0: ; %entry
1325 ; GFX7-NEXT:    s_endpgm
1326 ;
1327 ; GFX10-WGP-LABEL: workgroup_one_as_release_fence:
1328 ; GFX10-WGP:       ; %bb.0: ; %entry
1329 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
1330 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1331 ; GFX10-WGP-NEXT:    s_endpgm
1332 ;
1333 ; GFX10-CU-LABEL: workgroup_one_as_release_fence:
1334 ; GFX10-CU:       ; %bb.0: ; %entry
1335 ; GFX10-CU-NEXT:    s_endpgm
1336 ;
1337 ; SKIP-CACHE-INV-LABEL: workgroup_one_as_release_fence:
1338 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1339 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1340 ;
1341 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_one_as_release_fence:
1342 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1343 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1344 ;
1345 ; GFX90A-TGSPLIT-LABEL: workgroup_one_as_release_fence:
1346 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1347 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1348 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1349 ;
1350 ; GFX940-NOTTGSPLIT-LABEL: workgroup_one_as_release_fence:
1351 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1352 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1353 ;
1354 ; GFX940-TGSPLIT-LABEL: workgroup_one_as_release_fence:
1355 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1356 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1357 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1358 ;
1359 ; GFX11-WGP-LABEL: workgroup_one_as_release_fence:
1360 ; GFX11-WGP:       ; %bb.0: ; %entry
1361 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
1362 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1363 ; GFX11-WGP-NEXT:    s_endpgm
1364 ;
1365 ; GFX11-CU-LABEL: workgroup_one_as_release_fence:
1366 ; GFX11-CU:       ; %bb.0: ; %entry
1367 ; GFX11-CU-NEXT:    s_endpgm
1368 ;
1369 ; GFX12-WGP-LABEL: workgroup_one_as_release_fence:
1370 ; GFX12-WGP:       ; %bb.0: ; %entry
1371 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1372 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1373 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1374 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
1375 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1376 ; GFX12-WGP-NEXT:    s_endpgm
1377 ;
1378 ; GFX12-CU-LABEL: workgroup_one_as_release_fence:
1379 ; GFX12-CU:       ; %bb.0: ; %entry
1380 ; GFX12-CU-NEXT:    s_endpgm
1381 entry:
1382   fence syncscope("workgroup-one-as") release
1383   ret void
1384 }
1385
1386 define amdgpu_kernel void @workgroup_one_as_acq_rel_fence() {
1387 ; GFX6-LABEL: workgroup_one_as_acq_rel_fence:
1388 ; GFX6:       ; %bb.0: ; %entry
1389 ; GFX6-NEXT:    s_endpgm
1390 ;
1391 ; GFX7-LABEL: workgroup_one_as_acq_rel_fence:
1392 ; GFX7:       ; %bb.0: ; %entry
1393 ; GFX7-NEXT:    s_endpgm
1394 ;
1395 ; GFX10-WGP-LABEL: workgroup_one_as_acq_rel_fence:
1396 ; GFX10-WGP:       ; %bb.0: ; %entry
1397 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
1398 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1399 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1400 ; GFX10-WGP-NEXT:    s_endpgm
1401 ;
1402 ; GFX10-CU-LABEL: workgroup_one_as_acq_rel_fence:
1403 ; GFX10-CU:       ; %bb.0: ; %entry
1404 ; GFX10-CU-NEXT:    s_endpgm
1405 ;
1406 ; SKIP-CACHE-INV-LABEL: workgroup_one_as_acq_rel_fence:
1407 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1408 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1409 ;
1410 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_one_as_acq_rel_fence:
1411 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1412 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1413 ;
1414 ; GFX90A-TGSPLIT-LABEL: workgroup_one_as_acq_rel_fence:
1415 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1416 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1417 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1418 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1419 ;
1420 ; GFX940-NOTTGSPLIT-LABEL: workgroup_one_as_acq_rel_fence:
1421 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1422 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1423 ;
1424 ; GFX940-TGSPLIT-LABEL: workgroup_one_as_acq_rel_fence:
1425 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1426 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1427 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
1428 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1429 ;
1430 ; GFX11-WGP-LABEL: workgroup_one_as_acq_rel_fence:
1431 ; GFX11-WGP:       ; %bb.0: ; %entry
1432 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
1433 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1434 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1435 ; GFX11-WGP-NEXT:    s_endpgm
1436 ;
1437 ; GFX11-CU-LABEL: workgroup_one_as_acq_rel_fence:
1438 ; GFX11-CU:       ; %bb.0: ; %entry
1439 ; GFX11-CU-NEXT:    s_endpgm
1440 ;
1441 ; GFX12-WGP-LABEL: workgroup_one_as_acq_rel_fence:
1442 ; GFX12-WGP:       ; %bb.0: ; %entry
1443 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1444 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1445 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1446 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
1447 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1448 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
1449 ; GFX12-WGP-NEXT:    s_endpgm
1450 ;
1451 ; GFX12-CU-LABEL: workgroup_one_as_acq_rel_fence:
1452 ; GFX12-CU:       ; %bb.0: ; %entry
1453 ; GFX12-CU-NEXT:    s_endpgm
1454 entry:
1455   fence syncscope("workgroup-one-as") acq_rel
1456   ret void
1457 }
1458
1459 define amdgpu_kernel void @workgroup_one_as_seq_cst_fence() {
1460 ; GFX6-LABEL: workgroup_one_as_seq_cst_fence:
1461 ; GFX6:       ; %bb.0: ; %entry
1462 ; GFX6-NEXT:    s_endpgm
1463 ;
1464 ; GFX7-LABEL: workgroup_one_as_seq_cst_fence:
1465 ; GFX7:       ; %bb.0: ; %entry
1466 ; GFX7-NEXT:    s_endpgm
1467 ;
1468 ; GFX10-WGP-LABEL: workgroup_one_as_seq_cst_fence:
1469 ; GFX10-WGP:       ; %bb.0: ; %entry
1470 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
1471 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1472 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1473 ; GFX10-WGP-NEXT:    s_endpgm
1474 ;
1475 ; GFX10-CU-LABEL: workgroup_one_as_seq_cst_fence:
1476 ; GFX10-CU:       ; %bb.0: ; %entry
1477 ; GFX10-CU-NEXT:    s_endpgm
1478 ;
1479 ; SKIP-CACHE-INV-LABEL: workgroup_one_as_seq_cst_fence:
1480 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1481 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1482 ;
1483 ; GFX90A-NOTTGSPLIT-LABEL: workgroup_one_as_seq_cst_fence:
1484 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1485 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1486 ;
1487 ; GFX90A-TGSPLIT-LABEL: workgroup_one_as_seq_cst_fence:
1488 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1489 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1490 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1491 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1492 ;
1493 ; GFX940-NOTTGSPLIT-LABEL: workgroup_one_as_seq_cst_fence:
1494 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1495 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1496 ;
1497 ; GFX940-TGSPLIT-LABEL: workgroup_one_as_seq_cst_fence:
1498 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1499 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1500 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0
1501 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1502 ;
1503 ; GFX11-WGP-LABEL: workgroup_one_as_seq_cst_fence:
1504 ; GFX11-WGP:       ; %bb.0: ; %entry
1505 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
1506 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1507 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1508 ; GFX11-WGP-NEXT:    s_endpgm
1509 ;
1510 ; GFX11-CU-LABEL: workgroup_one_as_seq_cst_fence:
1511 ; GFX11-CU:       ; %bb.0: ; %entry
1512 ; GFX11-CU-NEXT:    s_endpgm
1513 ;
1514 ; GFX12-WGP-LABEL: workgroup_one_as_seq_cst_fence:
1515 ; GFX12-WGP:       ; %bb.0: ; %entry
1516 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SE
1517 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1518 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1519 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
1520 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1521 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SE
1522 ; GFX12-WGP-NEXT:    s_endpgm
1523 ;
1524 ; GFX12-CU-LABEL: workgroup_one_as_seq_cst_fence:
1525 ; GFX12-CU:       ; %bb.0: ; %entry
1526 ; GFX12-CU-NEXT:    s_endpgm
1527 entry:
1528   fence syncscope("workgroup-one-as") seq_cst
1529   ret void
1530 }
1531
1532 define amdgpu_kernel void @agent_acquire_fence() {
1533 ; GFX6-LABEL: agent_acquire_fence:
1534 ; GFX6:       ; %bb.0: ; %entry
1535 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1536 ; GFX6-NEXT:    buffer_wbinvl1
1537 ; GFX6-NEXT:    s_endpgm
1538 ;
1539 ; GFX7-LABEL: agent_acquire_fence:
1540 ; GFX7:       ; %bb.0: ; %entry
1541 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1542 ; GFX7-NEXT:    buffer_wbinvl1_vol
1543 ; GFX7-NEXT:    s_endpgm
1544 ;
1545 ; GFX10-WGP-LABEL: agent_acquire_fence:
1546 ; GFX10-WGP:       ; %bb.0: ; %entry
1547 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1548 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1549 ; GFX10-WGP-NEXT:    buffer_gl1_inv
1550 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1551 ; GFX10-WGP-NEXT:    s_endpgm
1552 ;
1553 ; GFX10-CU-LABEL: agent_acquire_fence:
1554 ; GFX10-CU:       ; %bb.0: ; %entry
1555 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1556 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1557 ; GFX10-CU-NEXT:    buffer_gl1_inv
1558 ; GFX10-CU-NEXT:    buffer_gl0_inv
1559 ; GFX10-CU-NEXT:    s_endpgm
1560 ;
1561 ; SKIP-CACHE-INV-LABEL: agent_acquire_fence:
1562 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1563 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1564 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1565 ;
1566 ; GFX90A-NOTTGSPLIT-LABEL: agent_acquire_fence:
1567 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1568 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1569 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
1570 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1571 ;
1572 ; GFX90A-TGSPLIT-LABEL: agent_acquire_fence:
1573 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1574 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1575 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1576 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1577 ;
1578 ; GFX940-NOTTGSPLIT-LABEL: agent_acquire_fence:
1579 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1580 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1581 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
1582 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1583 ;
1584 ; GFX940-TGSPLIT-LABEL: agent_acquire_fence:
1585 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1586 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1587 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
1588 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1589 ;
1590 ; GFX11-WGP-LABEL: agent_acquire_fence:
1591 ; GFX11-WGP:       ; %bb.0: ; %entry
1592 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1593 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1594 ; GFX11-WGP-NEXT:    buffer_gl1_inv
1595 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1596 ; GFX11-WGP-NEXT:    s_endpgm
1597 ;
1598 ; GFX11-CU-LABEL: agent_acquire_fence:
1599 ; GFX11-CU:       ; %bb.0: ; %entry
1600 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1601 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1602 ; GFX11-CU-NEXT:    buffer_gl1_inv
1603 ; GFX11-CU-NEXT:    buffer_gl0_inv
1604 ; GFX11-CU-NEXT:    s_endpgm
1605 ;
1606 ; GFX12-WGP-LABEL: agent_acquire_fence:
1607 ; GFX12-WGP:       ; %bb.0: ; %entry
1608 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1609 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1610 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1611 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1612 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
1613 ; GFX12-WGP-NEXT:    s_endpgm
1614 ;
1615 ; GFX12-CU-LABEL: agent_acquire_fence:
1616 ; GFX12-CU:       ; %bb.0: ; %entry
1617 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
1618 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
1619 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
1620 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
1621 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
1622 ; GFX12-CU-NEXT:    s_endpgm
1623 entry:
1624   fence syncscope("agent") acquire
1625   ret void
1626 }
1627
1628 define amdgpu_kernel void @agent_release_fence() {
1629 ; GFX6-LABEL: agent_release_fence:
1630 ; GFX6:       ; %bb.0: ; %entry
1631 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1632 ; GFX6-NEXT:    s_endpgm
1633 ;
1634 ; GFX7-LABEL: agent_release_fence:
1635 ; GFX7:       ; %bb.0: ; %entry
1636 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1637 ; GFX7-NEXT:    s_endpgm
1638 ;
1639 ; GFX10-WGP-LABEL: agent_release_fence:
1640 ; GFX10-WGP:       ; %bb.0: ; %entry
1641 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1642 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1643 ; GFX10-WGP-NEXT:    s_endpgm
1644 ;
1645 ; GFX10-CU-LABEL: agent_release_fence:
1646 ; GFX10-CU:       ; %bb.0: ; %entry
1647 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1648 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1649 ; GFX10-CU-NEXT:    s_endpgm
1650 ;
1651 ; SKIP-CACHE-INV-LABEL: agent_release_fence:
1652 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1653 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1654 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1655 ;
1656 ; GFX90A-NOTTGSPLIT-LABEL: agent_release_fence:
1657 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1658 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1659 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1660 ;
1661 ; GFX90A-TGSPLIT-LABEL: agent_release_fence:
1662 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1663 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1664 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1665 ;
1666 ; GFX940-NOTTGSPLIT-LABEL: agent_release_fence:
1667 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1668 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
1669 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1670 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1671 ;
1672 ; GFX940-TGSPLIT-LABEL: agent_release_fence:
1673 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1674 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
1675 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1676 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1677 ;
1678 ; GFX11-WGP-LABEL: agent_release_fence:
1679 ; GFX11-WGP:       ; %bb.0: ; %entry
1680 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1681 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1682 ; GFX11-WGP-NEXT:    s_endpgm
1683 ;
1684 ; GFX11-CU-LABEL: agent_release_fence:
1685 ; GFX11-CU:       ; %bb.0: ; %entry
1686 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1687 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1688 ; GFX11-CU-NEXT:    s_endpgm
1689 ;
1690 ; GFX12-WGP-LABEL: agent_release_fence:
1691 ; GFX12-WGP:       ; %bb.0: ; %entry
1692 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
1693 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1694 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1695 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1696 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1697 ; GFX12-WGP-NEXT:    s_endpgm
1698 ;
1699 ; GFX12-CU-LABEL: agent_release_fence:
1700 ; GFX12-CU:       ; %bb.0: ; %entry
1701 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
1702 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
1703 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
1704 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
1705 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
1706 ; GFX12-CU-NEXT:    s_endpgm
1707 entry:
1708   fence syncscope("agent") release
1709   ret void
1710 }
1711
1712 define amdgpu_kernel void @agent_acq_rel_fence() {
1713 ; GFX6-LABEL: agent_acq_rel_fence:
1714 ; GFX6:       ; %bb.0: ; %entry
1715 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1716 ; GFX6-NEXT:    buffer_wbinvl1
1717 ; GFX6-NEXT:    s_endpgm
1718 ;
1719 ; GFX7-LABEL: agent_acq_rel_fence:
1720 ; GFX7:       ; %bb.0: ; %entry
1721 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1722 ; GFX7-NEXT:    buffer_wbinvl1_vol
1723 ; GFX7-NEXT:    s_endpgm
1724 ;
1725 ; GFX10-WGP-LABEL: agent_acq_rel_fence:
1726 ; GFX10-WGP:       ; %bb.0: ; %entry
1727 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1728 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1729 ; GFX10-WGP-NEXT:    buffer_gl1_inv
1730 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1731 ; GFX10-WGP-NEXT:    s_endpgm
1732 ;
1733 ; GFX10-CU-LABEL: agent_acq_rel_fence:
1734 ; GFX10-CU:       ; %bb.0: ; %entry
1735 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1736 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1737 ; GFX10-CU-NEXT:    buffer_gl1_inv
1738 ; GFX10-CU-NEXT:    buffer_gl0_inv
1739 ; GFX10-CU-NEXT:    s_endpgm
1740 ;
1741 ; SKIP-CACHE-INV-LABEL: agent_acq_rel_fence:
1742 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1743 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1744 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1745 ;
1746 ; GFX90A-NOTTGSPLIT-LABEL: agent_acq_rel_fence:
1747 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1748 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1749 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
1750 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1751 ;
1752 ; GFX90A-TGSPLIT-LABEL: agent_acq_rel_fence:
1753 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1754 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1755 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1756 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1757 ;
1758 ; GFX940-NOTTGSPLIT-LABEL: agent_acq_rel_fence:
1759 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1760 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
1761 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1762 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
1763 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1764 ;
1765 ; GFX940-TGSPLIT-LABEL: agent_acq_rel_fence:
1766 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1767 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
1768 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1769 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
1770 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1771 ;
1772 ; GFX11-WGP-LABEL: agent_acq_rel_fence:
1773 ; GFX11-WGP:       ; %bb.0: ; %entry
1774 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1775 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1776 ; GFX11-WGP-NEXT:    buffer_gl1_inv
1777 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1778 ; GFX11-WGP-NEXT:    s_endpgm
1779 ;
1780 ; GFX11-CU-LABEL: agent_acq_rel_fence:
1781 ; GFX11-CU:       ; %bb.0: ; %entry
1782 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1783 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1784 ; GFX11-CU-NEXT:    buffer_gl1_inv
1785 ; GFX11-CU-NEXT:    buffer_gl0_inv
1786 ; GFX11-CU-NEXT:    s_endpgm
1787 ;
1788 ; GFX12-WGP-LABEL: agent_acq_rel_fence:
1789 ; GFX12-WGP:       ; %bb.0: ; %entry
1790 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
1791 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1792 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1793 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1794 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1795 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
1796 ; GFX12-WGP-NEXT:    s_endpgm
1797 ;
1798 ; GFX12-CU-LABEL: agent_acq_rel_fence:
1799 ; GFX12-CU:       ; %bb.0: ; %entry
1800 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
1801 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
1802 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
1803 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
1804 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
1805 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
1806 ; GFX12-CU-NEXT:    s_endpgm
1807 entry:
1808   fence syncscope("agent") acq_rel
1809   ret void
1810 }
1811
1812 define amdgpu_kernel void @agent_seq_cst_fence() {
1813 ; GFX6-LABEL: agent_seq_cst_fence:
1814 ; GFX6:       ; %bb.0: ; %entry
1815 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1816 ; GFX6-NEXT:    buffer_wbinvl1
1817 ; GFX6-NEXT:    s_endpgm
1818 ;
1819 ; GFX7-LABEL: agent_seq_cst_fence:
1820 ; GFX7:       ; %bb.0: ; %entry
1821 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1822 ; GFX7-NEXT:    buffer_wbinvl1_vol
1823 ; GFX7-NEXT:    s_endpgm
1824 ;
1825 ; GFX10-WGP-LABEL: agent_seq_cst_fence:
1826 ; GFX10-WGP:       ; %bb.0: ; %entry
1827 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1828 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1829 ; GFX10-WGP-NEXT:    buffer_gl1_inv
1830 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1831 ; GFX10-WGP-NEXT:    s_endpgm
1832 ;
1833 ; GFX10-CU-LABEL: agent_seq_cst_fence:
1834 ; GFX10-CU:       ; %bb.0: ; %entry
1835 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1836 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1837 ; GFX10-CU-NEXT:    buffer_gl1_inv
1838 ; GFX10-CU-NEXT:    buffer_gl0_inv
1839 ; GFX10-CU-NEXT:    s_endpgm
1840 ;
1841 ; SKIP-CACHE-INV-LABEL: agent_seq_cst_fence:
1842 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1843 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1844 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1845 ;
1846 ; GFX90A-NOTTGSPLIT-LABEL: agent_seq_cst_fence:
1847 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1848 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1849 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
1850 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1851 ;
1852 ; GFX90A-TGSPLIT-LABEL: agent_seq_cst_fence:
1853 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1854 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1855 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1856 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1857 ;
1858 ; GFX940-NOTTGSPLIT-LABEL: agent_seq_cst_fence:
1859 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1860 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
1861 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1862 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
1863 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1864 ;
1865 ; GFX940-TGSPLIT-LABEL: agent_seq_cst_fence:
1866 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1867 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
1868 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1869 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
1870 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1871 ;
1872 ; GFX11-WGP-LABEL: agent_seq_cst_fence:
1873 ; GFX11-WGP:       ; %bb.0: ; %entry
1874 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1875 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1876 ; GFX11-WGP-NEXT:    buffer_gl1_inv
1877 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1878 ; GFX11-WGP-NEXT:    s_endpgm
1879 ;
1880 ; GFX11-CU-LABEL: agent_seq_cst_fence:
1881 ; GFX11-CU:       ; %bb.0: ; %entry
1882 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
1883 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1884 ; GFX11-CU-NEXT:    buffer_gl1_inv
1885 ; GFX11-CU-NEXT:    buffer_gl0_inv
1886 ; GFX11-CU-NEXT:    s_endpgm
1887 ;
1888 ; GFX12-WGP-LABEL: agent_seq_cst_fence:
1889 ; GFX12-WGP:       ; %bb.0: ; %entry
1890 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
1891 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1892 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1893 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1894 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
1895 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
1896 ; GFX12-WGP-NEXT:    s_endpgm
1897 ;
1898 ; GFX12-CU-LABEL: agent_seq_cst_fence:
1899 ; GFX12-CU:       ; %bb.0: ; %entry
1900 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
1901 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
1902 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
1903 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
1904 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
1905 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
1906 ; GFX12-CU-NEXT:    s_endpgm
1907 entry:
1908   fence syncscope("agent") seq_cst
1909   ret void
1910 }
1911
1912 define amdgpu_kernel void @agent_one_as_acquire_fence() {
1913 ; GFX6-LABEL: agent_one_as_acquire_fence:
1914 ; GFX6:       ; %bb.0: ; %entry
1915 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
1916 ; GFX6-NEXT:    buffer_wbinvl1
1917 ; GFX6-NEXT:    s_endpgm
1918 ;
1919 ; GFX7-LABEL: agent_one_as_acquire_fence:
1920 ; GFX7:       ; %bb.0: ; %entry
1921 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
1922 ; GFX7-NEXT:    buffer_wbinvl1_vol
1923 ; GFX7-NEXT:    s_endpgm
1924 ;
1925 ; GFX10-WGP-LABEL: agent_one_as_acquire_fence:
1926 ; GFX10-WGP:       ; %bb.0: ; %entry
1927 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
1928 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1929 ; GFX10-WGP-NEXT:    buffer_gl1_inv
1930 ; GFX10-WGP-NEXT:    buffer_gl0_inv
1931 ; GFX10-WGP-NEXT:    s_endpgm
1932 ;
1933 ; GFX10-CU-LABEL: agent_one_as_acquire_fence:
1934 ; GFX10-CU:       ; %bb.0: ; %entry
1935 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
1936 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1937 ; GFX10-CU-NEXT:    buffer_gl1_inv
1938 ; GFX10-CU-NEXT:    buffer_gl0_inv
1939 ; GFX10-CU-NEXT:    s_endpgm
1940 ;
1941 ; SKIP-CACHE-INV-LABEL: agent_one_as_acquire_fence:
1942 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
1943 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
1944 ; SKIP-CACHE-INV-NEXT:    s_endpgm
1945 ;
1946 ; GFX90A-NOTTGSPLIT-LABEL: agent_one_as_acquire_fence:
1947 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
1948 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1949 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
1950 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
1951 ;
1952 ; GFX90A-TGSPLIT-LABEL: agent_one_as_acquire_fence:
1953 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
1954 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1955 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
1956 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
1957 ;
1958 ; GFX940-NOTTGSPLIT-LABEL: agent_one_as_acquire_fence:
1959 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
1960 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1961 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
1962 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
1963 ;
1964 ; GFX940-TGSPLIT-LABEL: agent_one_as_acquire_fence:
1965 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
1966 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
1967 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
1968 ; GFX940-TGSPLIT-NEXT:    s_endpgm
1969 ;
1970 ; GFX11-WGP-LABEL: agent_one_as_acquire_fence:
1971 ; GFX11-WGP:       ; %bb.0: ; %entry
1972 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
1973 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
1974 ; GFX11-WGP-NEXT:    buffer_gl1_inv
1975 ; GFX11-WGP-NEXT:    buffer_gl0_inv
1976 ; GFX11-WGP-NEXT:    s_endpgm
1977 ;
1978 ; GFX11-CU-LABEL: agent_one_as_acquire_fence:
1979 ; GFX11-CU:       ; %bb.0: ; %entry
1980 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
1981 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
1982 ; GFX11-CU-NEXT:    buffer_gl1_inv
1983 ; GFX11-CU-NEXT:    buffer_gl0_inv
1984 ; GFX11-CU-NEXT:    s_endpgm
1985 ;
1986 ; GFX12-WGP-LABEL: agent_one_as_acquire_fence:
1987 ; GFX12-WGP:       ; %bb.0: ; %entry
1988 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
1989 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
1990 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
1991 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
1992 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
1993 ; GFX12-WGP-NEXT:    s_endpgm
1994 ;
1995 ; GFX12-CU-LABEL: agent_one_as_acquire_fence:
1996 ; GFX12-CU:       ; %bb.0: ; %entry
1997 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
1998 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
1999 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2000 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2001 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
2002 ; GFX12-CU-NEXT:    s_endpgm
2003 entry:
2004   fence syncscope("agent-one-as") acquire
2005   ret void
2006 }
2007
2008 define amdgpu_kernel void @agent_one_as_release_fence() {
2009 ; GFX6-LABEL: agent_one_as_release_fence:
2010 ; GFX6:       ; %bb.0: ; %entry
2011 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2012 ; GFX6-NEXT:    s_endpgm
2013 ;
2014 ; GFX7-LABEL: agent_one_as_release_fence:
2015 ; GFX7:       ; %bb.0: ; %entry
2016 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2017 ; GFX7-NEXT:    s_endpgm
2018 ;
2019 ; GFX10-WGP-LABEL: agent_one_as_release_fence:
2020 ; GFX10-WGP:       ; %bb.0: ; %entry
2021 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2022 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2023 ; GFX10-WGP-NEXT:    s_endpgm
2024 ;
2025 ; GFX10-CU-LABEL: agent_one_as_release_fence:
2026 ; GFX10-CU:       ; %bb.0: ; %entry
2027 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2028 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2029 ; GFX10-CU-NEXT:    s_endpgm
2030 ;
2031 ; SKIP-CACHE-INV-LABEL: agent_one_as_release_fence:
2032 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2033 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2034 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2035 ;
2036 ; GFX90A-NOTTGSPLIT-LABEL: agent_one_as_release_fence:
2037 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2038 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2039 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2040 ;
2041 ; GFX90A-TGSPLIT-LABEL: agent_one_as_release_fence:
2042 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2043 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2044 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2045 ;
2046 ; GFX940-NOTTGSPLIT-LABEL: agent_one_as_release_fence:
2047 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2048 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
2049 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2050 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2051 ;
2052 ; GFX940-TGSPLIT-LABEL: agent_one_as_release_fence:
2053 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2054 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
2055 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2056 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2057 ;
2058 ; GFX11-WGP-LABEL: agent_one_as_release_fence:
2059 ; GFX11-WGP:       ; %bb.0: ; %entry
2060 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2061 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2062 ; GFX11-WGP-NEXT:    s_endpgm
2063 ;
2064 ; GFX11-CU-LABEL: agent_one_as_release_fence:
2065 ; GFX11-CU:       ; %bb.0: ; %entry
2066 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2067 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2068 ; GFX11-CU-NEXT:    s_endpgm
2069 ;
2070 ; GFX12-WGP-LABEL: agent_one_as_release_fence:
2071 ; GFX12-WGP:       ; %bb.0: ; %entry
2072 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
2073 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2074 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2075 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2076 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2077 ; GFX12-WGP-NEXT:    s_endpgm
2078 ;
2079 ; GFX12-CU-LABEL: agent_one_as_release_fence:
2080 ; GFX12-CU:       ; %bb.0: ; %entry
2081 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
2082 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2083 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2084 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2085 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2086 ; GFX12-CU-NEXT:    s_endpgm
2087 entry:
2088   fence syncscope("agent-one-as") release
2089   ret void
2090 }
2091
2092 define amdgpu_kernel void @agent_one_as_acq_rel_fence() {
2093 ; GFX6-LABEL: agent_one_as_acq_rel_fence:
2094 ; GFX6:       ; %bb.0: ; %entry
2095 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2096 ; GFX6-NEXT:    buffer_wbinvl1
2097 ; GFX6-NEXT:    s_endpgm
2098 ;
2099 ; GFX7-LABEL: agent_one_as_acq_rel_fence:
2100 ; GFX7:       ; %bb.0: ; %entry
2101 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2102 ; GFX7-NEXT:    buffer_wbinvl1_vol
2103 ; GFX7-NEXT:    s_endpgm
2104 ;
2105 ; GFX10-WGP-LABEL: agent_one_as_acq_rel_fence:
2106 ; GFX10-WGP:       ; %bb.0: ; %entry
2107 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2108 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2109 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2110 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2111 ; GFX10-WGP-NEXT:    s_endpgm
2112 ;
2113 ; GFX10-CU-LABEL: agent_one_as_acq_rel_fence:
2114 ; GFX10-CU:       ; %bb.0: ; %entry
2115 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2116 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2117 ; GFX10-CU-NEXT:    buffer_gl1_inv
2118 ; GFX10-CU-NEXT:    buffer_gl0_inv
2119 ; GFX10-CU-NEXT:    s_endpgm
2120 ;
2121 ; SKIP-CACHE-INV-LABEL: agent_one_as_acq_rel_fence:
2122 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2123 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2124 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2125 ;
2126 ; GFX90A-NOTTGSPLIT-LABEL: agent_one_as_acq_rel_fence:
2127 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2128 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2129 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2130 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2131 ;
2132 ; GFX90A-TGSPLIT-LABEL: agent_one_as_acq_rel_fence:
2133 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2134 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2135 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2136 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2137 ;
2138 ; GFX940-NOTTGSPLIT-LABEL: agent_one_as_acq_rel_fence:
2139 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2140 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
2141 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2142 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
2143 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2144 ;
2145 ; GFX940-TGSPLIT-LABEL: agent_one_as_acq_rel_fence:
2146 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2147 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
2148 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2149 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
2150 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2151 ;
2152 ; GFX11-WGP-LABEL: agent_one_as_acq_rel_fence:
2153 ; GFX11-WGP:       ; %bb.0: ; %entry
2154 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2155 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2156 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2157 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2158 ; GFX11-WGP-NEXT:    s_endpgm
2159 ;
2160 ; GFX11-CU-LABEL: agent_one_as_acq_rel_fence:
2161 ; GFX11-CU:       ; %bb.0: ; %entry
2162 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2163 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2164 ; GFX11-CU-NEXT:    buffer_gl1_inv
2165 ; GFX11-CU-NEXT:    buffer_gl0_inv
2166 ; GFX11-CU-NEXT:    s_endpgm
2167 ;
2168 ; GFX12-WGP-LABEL: agent_one_as_acq_rel_fence:
2169 ; GFX12-WGP:       ; %bb.0: ; %entry
2170 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
2171 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2172 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2173 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2174 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2175 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
2176 ; GFX12-WGP-NEXT:    s_endpgm
2177 ;
2178 ; GFX12-CU-LABEL: agent_one_as_acq_rel_fence:
2179 ; GFX12-CU:       ; %bb.0: ; %entry
2180 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
2181 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2182 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2183 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2184 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2185 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
2186 ; GFX12-CU-NEXT:    s_endpgm
2187 entry:
2188   fence syncscope("agent-one-as") acq_rel
2189   ret void
2190 }
2191
2192 define amdgpu_kernel void @agent_one_as_seq_cst_fence() {
2193 ; GFX6-LABEL: agent_one_as_seq_cst_fence:
2194 ; GFX6:       ; %bb.0: ; %entry
2195 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2196 ; GFX6-NEXT:    buffer_wbinvl1
2197 ; GFX6-NEXT:    s_endpgm
2198 ;
2199 ; GFX7-LABEL: agent_one_as_seq_cst_fence:
2200 ; GFX7:       ; %bb.0: ; %entry
2201 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2202 ; GFX7-NEXT:    buffer_wbinvl1_vol
2203 ; GFX7-NEXT:    s_endpgm
2204 ;
2205 ; GFX10-WGP-LABEL: agent_one_as_seq_cst_fence:
2206 ; GFX10-WGP:       ; %bb.0: ; %entry
2207 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2208 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2209 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2210 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2211 ; GFX10-WGP-NEXT:    s_endpgm
2212 ;
2213 ; GFX10-CU-LABEL: agent_one_as_seq_cst_fence:
2214 ; GFX10-CU:       ; %bb.0: ; %entry
2215 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2216 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2217 ; GFX10-CU-NEXT:    buffer_gl1_inv
2218 ; GFX10-CU-NEXT:    buffer_gl0_inv
2219 ; GFX10-CU-NEXT:    s_endpgm
2220 ;
2221 ; SKIP-CACHE-INV-LABEL: agent_one_as_seq_cst_fence:
2222 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2223 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2224 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2225 ;
2226 ; GFX90A-NOTTGSPLIT-LABEL: agent_one_as_seq_cst_fence:
2227 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2228 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2229 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2230 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2231 ;
2232 ; GFX90A-TGSPLIT-LABEL: agent_one_as_seq_cst_fence:
2233 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2234 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2235 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2236 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2237 ;
2238 ; GFX940-NOTTGSPLIT-LABEL: agent_one_as_seq_cst_fence:
2239 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2240 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc1
2241 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2242 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc1
2243 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2244 ;
2245 ; GFX940-TGSPLIT-LABEL: agent_one_as_seq_cst_fence:
2246 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2247 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc1
2248 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2249 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc1
2250 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2251 ;
2252 ; GFX11-WGP-LABEL: agent_one_as_seq_cst_fence:
2253 ; GFX11-WGP:       ; %bb.0: ; %entry
2254 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2255 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2256 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2257 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2258 ; GFX11-WGP-NEXT:    s_endpgm
2259 ;
2260 ; GFX11-CU-LABEL: agent_one_as_seq_cst_fence:
2261 ; GFX11-CU:       ; %bb.0: ; %entry
2262 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2263 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2264 ; GFX11-CU-NEXT:    buffer_gl1_inv
2265 ; GFX11-CU-NEXT:    buffer_gl0_inv
2266 ; GFX11-CU-NEXT:    s_endpgm
2267 ;
2268 ; GFX12-WGP-LABEL: agent_one_as_seq_cst_fence:
2269 ; GFX12-WGP:       ; %bb.0: ; %entry
2270 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_DEV
2271 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2272 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2273 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2274 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2275 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_DEV
2276 ; GFX12-WGP-NEXT:    s_endpgm
2277 ;
2278 ; GFX12-CU-LABEL: agent_one_as_seq_cst_fence:
2279 ; GFX12-CU:       ; %bb.0: ; %entry
2280 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_DEV
2281 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2282 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2283 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2284 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2285 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_DEV
2286 ; GFX12-CU-NEXT:    s_endpgm
2287 entry:
2288   fence syncscope("agent-one-as") seq_cst
2289   ret void
2290 }
2291
2292 define amdgpu_kernel void @system_acquire_fence() {
2293 ; GFX6-LABEL: system_acquire_fence:
2294 ; GFX6:       ; %bb.0: ; %entry
2295 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2296 ; GFX6-NEXT:    buffer_wbinvl1
2297 ; GFX6-NEXT:    s_endpgm
2298 ;
2299 ; GFX7-LABEL: system_acquire_fence:
2300 ; GFX7:       ; %bb.0: ; %entry
2301 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2302 ; GFX7-NEXT:    buffer_wbinvl1_vol
2303 ; GFX7-NEXT:    s_endpgm
2304 ;
2305 ; GFX10-WGP-LABEL: system_acquire_fence:
2306 ; GFX10-WGP:       ; %bb.0: ; %entry
2307 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2308 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2309 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2310 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2311 ; GFX10-WGP-NEXT:    s_endpgm
2312 ;
2313 ; GFX10-CU-LABEL: system_acquire_fence:
2314 ; GFX10-CU:       ; %bb.0: ; %entry
2315 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2316 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2317 ; GFX10-CU-NEXT:    buffer_gl1_inv
2318 ; GFX10-CU-NEXT:    buffer_gl0_inv
2319 ; GFX10-CU-NEXT:    s_endpgm
2320 ;
2321 ; SKIP-CACHE-INV-LABEL: system_acquire_fence:
2322 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2323 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2324 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2325 ;
2326 ; GFX90A-NOTTGSPLIT-LABEL: system_acquire_fence:
2327 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2328 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2329 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
2330 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2331 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2332 ;
2333 ; GFX90A-TGSPLIT-LABEL: system_acquire_fence:
2334 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2335 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2336 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
2337 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2338 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2339 ;
2340 ; GFX940-NOTTGSPLIT-LABEL: system_acquire_fence:
2341 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2342 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2343 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
2344 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2345 ;
2346 ; GFX940-TGSPLIT-LABEL: system_acquire_fence:
2347 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2348 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2349 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
2350 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2351 ;
2352 ; GFX11-WGP-LABEL: system_acquire_fence:
2353 ; GFX11-WGP:       ; %bb.0: ; %entry
2354 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2355 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2356 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2357 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2358 ; GFX11-WGP-NEXT:    s_endpgm
2359 ;
2360 ; GFX11-CU-LABEL: system_acquire_fence:
2361 ; GFX11-CU:       ; %bb.0: ; %entry
2362 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2363 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2364 ; GFX11-CU-NEXT:    buffer_gl1_inv
2365 ; GFX11-CU-NEXT:    buffer_gl0_inv
2366 ; GFX11-CU-NEXT:    s_endpgm
2367 ;
2368 ; GFX12-WGP-LABEL: system_acquire_fence:
2369 ; GFX12-WGP:       ; %bb.0: ; %entry
2370 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2371 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2372 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2373 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
2374 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
2375 ; GFX12-WGP-NEXT:    s_endpgm
2376 ;
2377 ; GFX12-CU-LABEL: system_acquire_fence:
2378 ; GFX12-CU:       ; %bb.0: ; %entry
2379 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2380 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2381 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2382 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
2383 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
2384 ; GFX12-CU-NEXT:    s_endpgm
2385 entry:
2386   fence acquire
2387   ret void
2388 }
2389
2390 define amdgpu_kernel void @system_release_fence() {
2391 ; GFX6-LABEL: system_release_fence:
2392 ; GFX6:       ; %bb.0: ; %entry
2393 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2394 ; GFX6-NEXT:    s_endpgm
2395 ;
2396 ; GFX7-LABEL: system_release_fence:
2397 ; GFX7:       ; %bb.0: ; %entry
2398 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2399 ; GFX7-NEXT:    s_endpgm
2400 ;
2401 ; GFX10-WGP-LABEL: system_release_fence:
2402 ; GFX10-WGP:       ; %bb.0: ; %entry
2403 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2404 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2405 ; GFX10-WGP-NEXT:    s_endpgm
2406 ;
2407 ; GFX10-CU-LABEL: system_release_fence:
2408 ; GFX10-CU:       ; %bb.0: ; %entry
2409 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2410 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2411 ; GFX10-CU-NEXT:    s_endpgm
2412 ;
2413 ; SKIP-CACHE-INV-LABEL: system_release_fence:
2414 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2415 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2416 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2417 ;
2418 ; GFX90A-NOTTGSPLIT-LABEL: system_release_fence:
2419 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2420 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
2421 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2422 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2423 ;
2424 ; GFX90A-TGSPLIT-LABEL: system_release_fence:
2425 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2426 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
2427 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2428 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2429 ;
2430 ; GFX940-NOTTGSPLIT-LABEL: system_release_fence:
2431 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2432 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2433 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2434 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2435 ;
2436 ; GFX940-TGSPLIT-LABEL: system_release_fence:
2437 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2438 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2439 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2440 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2441 ;
2442 ; GFX11-WGP-LABEL: system_release_fence:
2443 ; GFX11-WGP:       ; %bb.0: ; %entry
2444 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2445 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2446 ; GFX11-WGP-NEXT:    s_endpgm
2447 ;
2448 ; GFX11-CU-LABEL: system_release_fence:
2449 ; GFX11-CU:       ; %bb.0: ; %entry
2450 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2451 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2452 ; GFX11-CU-NEXT:    s_endpgm
2453 ;
2454 ; GFX12-WGP-LABEL: system_release_fence:
2455 ; GFX12-WGP:       ; %bb.0: ; %entry
2456 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
2457 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2458 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2459 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2460 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
2461 ; GFX12-WGP-NEXT:    s_endpgm
2462 ;
2463 ; GFX12-CU-LABEL: system_release_fence:
2464 ; GFX12-CU:       ; %bb.0: ; %entry
2465 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
2466 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2467 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2468 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2469 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
2470 ; GFX12-CU-NEXT:    s_endpgm
2471 entry:
2472   fence release
2473   ret void
2474 }
2475
2476 define amdgpu_kernel void @system_acq_rel_fence() {
2477 ; GFX6-LABEL: system_acq_rel_fence:
2478 ; GFX6:       ; %bb.0: ; %entry
2479 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2480 ; GFX6-NEXT:    buffer_wbinvl1
2481 ; GFX6-NEXT:    s_endpgm
2482 ;
2483 ; GFX7-LABEL: system_acq_rel_fence:
2484 ; GFX7:       ; %bb.0: ; %entry
2485 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2486 ; GFX7-NEXT:    buffer_wbinvl1_vol
2487 ; GFX7-NEXT:    s_endpgm
2488 ;
2489 ; GFX10-WGP-LABEL: system_acq_rel_fence:
2490 ; GFX10-WGP:       ; %bb.0: ; %entry
2491 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2492 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2493 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2494 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2495 ; GFX10-WGP-NEXT:    s_endpgm
2496 ;
2497 ; GFX10-CU-LABEL: system_acq_rel_fence:
2498 ; GFX10-CU:       ; %bb.0: ; %entry
2499 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2500 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2501 ; GFX10-CU-NEXT:    buffer_gl1_inv
2502 ; GFX10-CU-NEXT:    buffer_gl0_inv
2503 ; GFX10-CU-NEXT:    s_endpgm
2504 ;
2505 ; SKIP-CACHE-INV-LABEL: system_acq_rel_fence:
2506 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2507 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2508 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2509 ;
2510 ; GFX90A-NOTTGSPLIT-LABEL: system_acq_rel_fence:
2511 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2512 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
2513 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2514 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
2515 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2516 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2517 ;
2518 ; GFX90A-TGSPLIT-LABEL: system_acq_rel_fence:
2519 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2520 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
2521 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2522 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
2523 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2524 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2525 ;
2526 ; GFX940-NOTTGSPLIT-LABEL: system_acq_rel_fence:
2527 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2528 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2529 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2530 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
2531 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2532 ;
2533 ; GFX940-TGSPLIT-LABEL: system_acq_rel_fence:
2534 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2535 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2536 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2537 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
2538 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2539 ;
2540 ; GFX11-WGP-LABEL: system_acq_rel_fence:
2541 ; GFX11-WGP:       ; %bb.0: ; %entry
2542 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2543 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2544 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2545 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2546 ; GFX11-WGP-NEXT:    s_endpgm
2547 ;
2548 ; GFX11-CU-LABEL: system_acq_rel_fence:
2549 ; GFX11-CU:       ; %bb.0: ; %entry
2550 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2551 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2552 ; GFX11-CU-NEXT:    buffer_gl1_inv
2553 ; GFX11-CU-NEXT:    buffer_gl0_inv
2554 ; GFX11-CU-NEXT:    s_endpgm
2555 ;
2556 ; GFX12-WGP-LABEL: system_acq_rel_fence:
2557 ; GFX12-WGP:       ; %bb.0: ; %entry
2558 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
2559 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2560 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2561 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2562 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
2563 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
2564 ; GFX12-WGP-NEXT:    s_endpgm
2565 ;
2566 ; GFX12-CU-LABEL: system_acq_rel_fence:
2567 ; GFX12-CU:       ; %bb.0: ; %entry
2568 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
2569 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2570 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2571 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2572 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
2573 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
2574 ; GFX12-CU-NEXT:    s_endpgm
2575 entry:
2576   fence acq_rel
2577   ret void
2578 }
2579
2580 define amdgpu_kernel void @system_seq_cst_fence() {
2581 ; GFX6-LABEL: system_seq_cst_fence:
2582 ; GFX6:       ; %bb.0: ; %entry
2583 ; GFX6-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2584 ; GFX6-NEXT:    buffer_wbinvl1
2585 ; GFX6-NEXT:    s_endpgm
2586 ;
2587 ; GFX7-LABEL: system_seq_cst_fence:
2588 ; GFX7:       ; %bb.0: ; %entry
2589 ; GFX7-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2590 ; GFX7-NEXT:    buffer_wbinvl1_vol
2591 ; GFX7-NEXT:    s_endpgm
2592 ;
2593 ; GFX10-WGP-LABEL: system_seq_cst_fence:
2594 ; GFX10-WGP:       ; %bb.0: ; %entry
2595 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2596 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2597 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2598 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2599 ; GFX10-WGP-NEXT:    s_endpgm
2600 ;
2601 ; GFX10-CU-LABEL: system_seq_cst_fence:
2602 ; GFX10-CU:       ; %bb.0: ; %entry
2603 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2604 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2605 ; GFX10-CU-NEXT:    buffer_gl1_inv
2606 ; GFX10-CU-NEXT:    buffer_gl0_inv
2607 ; GFX10-CU-NEXT:    s_endpgm
2608 ;
2609 ; SKIP-CACHE-INV-LABEL: system_seq_cst_fence:
2610 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2611 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2612 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2613 ;
2614 ; GFX90A-NOTTGSPLIT-LABEL: system_seq_cst_fence:
2615 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2616 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
2617 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2618 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
2619 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2620 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2621 ;
2622 ; GFX90A-TGSPLIT-LABEL: system_seq_cst_fence:
2623 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2624 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
2625 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2626 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
2627 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2628 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2629 ;
2630 ; GFX940-NOTTGSPLIT-LABEL: system_seq_cst_fence:
2631 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2632 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2633 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2634 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
2635 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2636 ;
2637 ; GFX940-TGSPLIT-LABEL: system_seq_cst_fence:
2638 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2639 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2640 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2641 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
2642 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2643 ;
2644 ; GFX11-WGP-LABEL: system_seq_cst_fence:
2645 ; GFX11-WGP:       ; %bb.0: ; %entry
2646 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2647 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2648 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2649 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2650 ; GFX11-WGP-NEXT:    s_endpgm
2651 ;
2652 ; GFX11-CU-LABEL: system_seq_cst_fence:
2653 ; GFX11-CU:       ; %bb.0: ; %entry
2654 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
2655 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2656 ; GFX11-CU-NEXT:    buffer_gl1_inv
2657 ; GFX11-CU-NEXT:    buffer_gl0_inv
2658 ; GFX11-CU-NEXT:    s_endpgm
2659 ;
2660 ; GFX12-WGP-LABEL: system_seq_cst_fence:
2661 ; GFX12-WGP:       ; %bb.0: ; %entry
2662 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
2663 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2664 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2665 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2666 ; GFX12-WGP-NEXT:    s_wait_loadcnt_dscnt 0x0
2667 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
2668 ; GFX12-WGP-NEXT:    s_endpgm
2669 ;
2670 ; GFX12-CU-LABEL: system_seq_cst_fence:
2671 ; GFX12-CU:       ; %bb.0: ; %entry
2672 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
2673 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2674 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2675 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2676 ; GFX12-CU-NEXT:    s_wait_loadcnt_dscnt 0x0
2677 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
2678 ; GFX12-CU-NEXT:    s_endpgm
2679 entry:
2680   fence seq_cst
2681   ret void
2682 }
2683
2684 define amdgpu_kernel void @system_one_as_acquire_fence() {
2685 ; GFX6-LABEL: system_one_as_acquire_fence:
2686 ; GFX6:       ; %bb.0: ; %entry
2687 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2688 ; GFX6-NEXT:    buffer_wbinvl1
2689 ; GFX6-NEXT:    s_endpgm
2690 ;
2691 ; GFX7-LABEL: system_one_as_acquire_fence:
2692 ; GFX7:       ; %bb.0: ; %entry
2693 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2694 ; GFX7-NEXT:    buffer_wbinvl1_vol
2695 ; GFX7-NEXT:    s_endpgm
2696 ;
2697 ; GFX10-WGP-LABEL: system_one_as_acquire_fence:
2698 ; GFX10-WGP:       ; %bb.0: ; %entry
2699 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2700 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2701 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2702 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2703 ; GFX10-WGP-NEXT:    s_endpgm
2704 ;
2705 ; GFX10-CU-LABEL: system_one_as_acquire_fence:
2706 ; GFX10-CU:       ; %bb.0: ; %entry
2707 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2708 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2709 ; GFX10-CU-NEXT:    buffer_gl1_inv
2710 ; GFX10-CU-NEXT:    buffer_gl0_inv
2711 ; GFX10-CU-NEXT:    s_endpgm
2712 ;
2713 ; SKIP-CACHE-INV-LABEL: system_one_as_acquire_fence:
2714 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2715 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2716 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2717 ;
2718 ; GFX90A-NOTTGSPLIT-LABEL: system_one_as_acquire_fence:
2719 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2720 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2721 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
2722 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2723 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2724 ;
2725 ; GFX90A-TGSPLIT-LABEL: system_one_as_acquire_fence:
2726 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2727 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2728 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
2729 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2730 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2731 ;
2732 ; GFX940-NOTTGSPLIT-LABEL: system_one_as_acquire_fence:
2733 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2734 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2735 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
2736 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2737 ;
2738 ; GFX940-TGSPLIT-LABEL: system_one_as_acquire_fence:
2739 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2740 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2741 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
2742 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2743 ;
2744 ; GFX11-WGP-LABEL: system_one_as_acquire_fence:
2745 ; GFX11-WGP:       ; %bb.0: ; %entry
2746 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2747 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2748 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2749 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2750 ; GFX11-WGP-NEXT:    s_endpgm
2751 ;
2752 ; GFX11-CU-LABEL: system_one_as_acquire_fence:
2753 ; GFX11-CU:       ; %bb.0: ; %entry
2754 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2755 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2756 ; GFX11-CU-NEXT:    buffer_gl1_inv
2757 ; GFX11-CU-NEXT:    buffer_gl0_inv
2758 ; GFX11-CU-NEXT:    s_endpgm
2759 ;
2760 ; GFX12-WGP-LABEL: system_one_as_acquire_fence:
2761 ; GFX12-WGP:       ; %bb.0: ; %entry
2762 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2763 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2764 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2765 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2766 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
2767 ; GFX12-WGP-NEXT:    s_endpgm
2768 ;
2769 ; GFX12-CU-LABEL: system_one_as_acquire_fence:
2770 ; GFX12-CU:       ; %bb.0: ; %entry
2771 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2772 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2773 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2774 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2775 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
2776 ; GFX12-CU-NEXT:    s_endpgm
2777 entry:
2778   fence syncscope("one-as") acquire
2779   ret void
2780 }
2781
2782 define amdgpu_kernel void @system_one_as_release_fence() {
2783 ; GFX6-LABEL: system_one_as_release_fence:
2784 ; GFX6:       ; %bb.0: ; %entry
2785 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2786 ; GFX6-NEXT:    s_endpgm
2787 ;
2788 ; GFX7-LABEL: system_one_as_release_fence:
2789 ; GFX7:       ; %bb.0: ; %entry
2790 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2791 ; GFX7-NEXT:    s_endpgm
2792 ;
2793 ; GFX10-WGP-LABEL: system_one_as_release_fence:
2794 ; GFX10-WGP:       ; %bb.0: ; %entry
2795 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2796 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2797 ; GFX10-WGP-NEXT:    s_endpgm
2798 ;
2799 ; GFX10-CU-LABEL: system_one_as_release_fence:
2800 ; GFX10-CU:       ; %bb.0: ; %entry
2801 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2802 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2803 ; GFX10-CU-NEXT:    s_endpgm
2804 ;
2805 ; SKIP-CACHE-INV-LABEL: system_one_as_release_fence:
2806 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2807 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2808 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2809 ;
2810 ; GFX90A-NOTTGSPLIT-LABEL: system_one_as_release_fence:
2811 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2812 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
2813 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2814 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2815 ;
2816 ; GFX90A-TGSPLIT-LABEL: system_one_as_release_fence:
2817 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2818 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
2819 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2820 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2821 ;
2822 ; GFX940-NOTTGSPLIT-LABEL: system_one_as_release_fence:
2823 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2824 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2825 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2826 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2827 ;
2828 ; GFX940-TGSPLIT-LABEL: system_one_as_release_fence:
2829 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2830 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2831 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2832 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2833 ;
2834 ; GFX11-WGP-LABEL: system_one_as_release_fence:
2835 ; GFX11-WGP:       ; %bb.0: ; %entry
2836 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2837 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2838 ; GFX11-WGP-NEXT:    s_endpgm
2839 ;
2840 ; GFX11-CU-LABEL: system_one_as_release_fence:
2841 ; GFX11-CU:       ; %bb.0: ; %entry
2842 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2843 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2844 ; GFX11-CU-NEXT:    s_endpgm
2845 ;
2846 ; GFX12-WGP-LABEL: system_one_as_release_fence:
2847 ; GFX12-WGP:       ; %bb.0: ; %entry
2848 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
2849 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2850 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2851 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2852 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2853 ; GFX12-WGP-NEXT:    s_endpgm
2854 ;
2855 ; GFX12-CU-LABEL: system_one_as_release_fence:
2856 ; GFX12-CU:       ; %bb.0: ; %entry
2857 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
2858 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2859 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2860 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2861 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2862 ; GFX12-CU-NEXT:    s_endpgm
2863 entry:
2864   fence syncscope("one-as") release
2865   ret void
2866 }
2867
2868 define amdgpu_kernel void @system_one_as_acq_rel_fence() {
2869 ; GFX6-LABEL: system_one_as_acq_rel_fence:
2870 ; GFX6:       ; %bb.0: ; %entry
2871 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2872 ; GFX6-NEXT:    buffer_wbinvl1
2873 ; GFX6-NEXT:    s_endpgm
2874 ;
2875 ; GFX7-LABEL: system_one_as_acq_rel_fence:
2876 ; GFX7:       ; %bb.0: ; %entry
2877 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2878 ; GFX7-NEXT:    buffer_wbinvl1_vol
2879 ; GFX7-NEXT:    s_endpgm
2880 ;
2881 ; GFX10-WGP-LABEL: system_one_as_acq_rel_fence:
2882 ; GFX10-WGP:       ; %bb.0: ; %entry
2883 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2884 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2885 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2886 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2887 ; GFX10-WGP-NEXT:    s_endpgm
2888 ;
2889 ; GFX10-CU-LABEL: system_one_as_acq_rel_fence:
2890 ; GFX10-CU:       ; %bb.0: ; %entry
2891 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2892 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2893 ; GFX10-CU-NEXT:    buffer_gl1_inv
2894 ; GFX10-CU-NEXT:    buffer_gl0_inv
2895 ; GFX10-CU-NEXT:    s_endpgm
2896 ;
2897 ; SKIP-CACHE-INV-LABEL: system_one_as_acq_rel_fence:
2898 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
2899 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
2900 ; SKIP-CACHE-INV-NEXT:    s_endpgm
2901 ;
2902 ; GFX90A-NOTTGSPLIT-LABEL: system_one_as_acq_rel_fence:
2903 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
2904 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
2905 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2906 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
2907 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
2908 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
2909 ;
2910 ; GFX90A-TGSPLIT-LABEL: system_one_as_acq_rel_fence:
2911 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
2912 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
2913 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2914 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
2915 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
2916 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
2917 ;
2918 ; GFX940-NOTTGSPLIT-LABEL: system_one_as_acq_rel_fence:
2919 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
2920 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2921 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2922 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
2923 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
2924 ;
2925 ; GFX940-TGSPLIT-LABEL: system_one_as_acq_rel_fence:
2926 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
2927 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
2928 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
2929 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
2930 ; GFX940-TGSPLIT-NEXT:    s_endpgm
2931 ;
2932 ; GFX11-WGP-LABEL: system_one_as_acq_rel_fence:
2933 ; GFX11-WGP:       ; %bb.0: ; %entry
2934 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
2935 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2936 ; GFX11-WGP-NEXT:    buffer_gl1_inv
2937 ; GFX11-WGP-NEXT:    buffer_gl0_inv
2938 ; GFX11-WGP-NEXT:    s_endpgm
2939 ;
2940 ; GFX11-CU-LABEL: system_one_as_acq_rel_fence:
2941 ; GFX11-CU:       ; %bb.0: ; %entry
2942 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
2943 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2944 ; GFX11-CU-NEXT:    buffer_gl1_inv
2945 ; GFX11-CU-NEXT:    buffer_gl0_inv
2946 ; GFX11-CU-NEXT:    s_endpgm
2947 ;
2948 ; GFX12-WGP-LABEL: system_one_as_acq_rel_fence:
2949 ; GFX12-WGP:       ; %bb.0: ; %entry
2950 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
2951 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
2952 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
2953 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
2954 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
2955 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
2956 ; GFX12-WGP-NEXT:    s_endpgm
2957 ;
2958 ; GFX12-CU-LABEL: system_one_as_acq_rel_fence:
2959 ; GFX12-CU:       ; %bb.0: ; %entry
2960 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
2961 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
2962 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
2963 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
2964 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
2965 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
2966 ; GFX12-CU-NEXT:    s_endpgm
2967 entry:
2968   fence syncscope("one-as") acq_rel
2969   ret void
2970 }
2971
2972 define amdgpu_kernel void @system_one_as_seq_cst_fence() {
2973 ; GFX6-LABEL: system_one_as_seq_cst_fence:
2974 ; GFX6:       ; %bb.0: ; %entry
2975 ; GFX6-NEXT:    s_waitcnt vmcnt(0)
2976 ; GFX6-NEXT:    buffer_wbinvl1
2977 ; GFX6-NEXT:    s_endpgm
2978 ;
2979 ; GFX7-LABEL: system_one_as_seq_cst_fence:
2980 ; GFX7:       ; %bb.0: ; %entry
2981 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
2982 ; GFX7-NEXT:    buffer_wbinvl1_vol
2983 ; GFX7-NEXT:    s_endpgm
2984 ;
2985 ; GFX10-WGP-LABEL: system_one_as_seq_cst_fence:
2986 ; GFX10-WGP:       ; %bb.0: ; %entry
2987 ; GFX10-WGP-NEXT:    s_waitcnt vmcnt(0)
2988 ; GFX10-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
2989 ; GFX10-WGP-NEXT:    buffer_gl1_inv
2990 ; GFX10-WGP-NEXT:    buffer_gl0_inv
2991 ; GFX10-WGP-NEXT:    s_endpgm
2992 ;
2993 ; GFX10-CU-LABEL: system_one_as_seq_cst_fence:
2994 ; GFX10-CU:       ; %bb.0: ; %entry
2995 ; GFX10-CU-NEXT:    s_waitcnt vmcnt(0)
2996 ; GFX10-CU-NEXT:    s_waitcnt_vscnt null, 0x0
2997 ; GFX10-CU-NEXT:    buffer_gl1_inv
2998 ; GFX10-CU-NEXT:    buffer_gl0_inv
2999 ; GFX10-CU-NEXT:    s_endpgm
3000 ;
3001 ; SKIP-CACHE-INV-LABEL: system_one_as_seq_cst_fence:
3002 ; SKIP-CACHE-INV:       ; %bb.0: ; %entry
3003 ; SKIP-CACHE-INV-NEXT:    s_waitcnt vmcnt(0)
3004 ; SKIP-CACHE-INV-NEXT:    s_endpgm
3005 ;
3006 ; GFX90A-NOTTGSPLIT-LABEL: system_one_as_seq_cst_fence:
3007 ; GFX90A-NOTTGSPLIT:       ; %bb.0: ; %entry
3008 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbl2
3009 ; GFX90A-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
3010 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_invl2
3011 ; GFX90A-NOTTGSPLIT-NEXT:    buffer_wbinvl1_vol
3012 ; GFX90A-NOTTGSPLIT-NEXT:    s_endpgm
3013 ;
3014 ; GFX90A-TGSPLIT-LABEL: system_one_as_seq_cst_fence:
3015 ; GFX90A-TGSPLIT:       ; %bb.0: ; %entry
3016 ; GFX90A-TGSPLIT-NEXT:    buffer_wbl2
3017 ; GFX90A-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
3018 ; GFX90A-TGSPLIT-NEXT:    buffer_invl2
3019 ; GFX90A-TGSPLIT-NEXT:    buffer_wbinvl1_vol
3020 ; GFX90A-TGSPLIT-NEXT:    s_endpgm
3021 ;
3022 ; GFX940-NOTTGSPLIT-LABEL: system_one_as_seq_cst_fence:
3023 ; GFX940-NOTTGSPLIT:       ; %bb.0: ; %entry
3024 ; GFX940-NOTTGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
3025 ; GFX940-NOTTGSPLIT-NEXT:    s_waitcnt vmcnt(0)
3026 ; GFX940-NOTTGSPLIT-NEXT:    buffer_inv sc0 sc1
3027 ; GFX940-NOTTGSPLIT-NEXT:    s_endpgm
3028 ;
3029 ; GFX940-TGSPLIT-LABEL: system_one_as_seq_cst_fence:
3030 ; GFX940-TGSPLIT:       ; %bb.0: ; %entry
3031 ; GFX940-TGSPLIT-NEXT:    buffer_wbl2 sc0 sc1
3032 ; GFX940-TGSPLIT-NEXT:    s_waitcnt vmcnt(0)
3033 ; GFX940-TGSPLIT-NEXT:    buffer_inv sc0 sc1
3034 ; GFX940-TGSPLIT-NEXT:    s_endpgm
3035 ;
3036 ; GFX11-WGP-LABEL: system_one_as_seq_cst_fence:
3037 ; GFX11-WGP:       ; %bb.0: ; %entry
3038 ; GFX11-WGP-NEXT:    s_waitcnt vmcnt(0)
3039 ; GFX11-WGP-NEXT:    s_waitcnt_vscnt null, 0x0
3040 ; GFX11-WGP-NEXT:    buffer_gl1_inv
3041 ; GFX11-WGP-NEXT:    buffer_gl0_inv
3042 ; GFX11-WGP-NEXT:    s_endpgm
3043 ;
3044 ; GFX11-CU-LABEL: system_one_as_seq_cst_fence:
3045 ; GFX11-CU:       ; %bb.0: ; %entry
3046 ; GFX11-CU-NEXT:    s_waitcnt vmcnt(0)
3047 ; GFX11-CU-NEXT:    s_waitcnt_vscnt null, 0x0
3048 ; GFX11-CU-NEXT:    buffer_gl1_inv
3049 ; GFX11-CU-NEXT:    buffer_gl0_inv
3050 ; GFX11-CU-NEXT:    s_endpgm
3051 ;
3052 ; GFX12-WGP-LABEL: system_one_as_seq_cst_fence:
3053 ; GFX12-WGP:       ; %bb.0: ; %entry
3054 ; GFX12-WGP-NEXT:    global_wb scope:SCOPE_SYS
3055 ; GFX12-WGP-NEXT:    s_wait_bvhcnt 0x0
3056 ; GFX12-WGP-NEXT:    s_wait_samplecnt 0x0
3057 ; GFX12-WGP-NEXT:    s_wait_loadcnt 0x0
3058 ; GFX12-WGP-NEXT:    s_wait_storecnt 0x0
3059 ; GFX12-WGP-NEXT:    global_inv scope:SCOPE_SYS
3060 ; GFX12-WGP-NEXT:    s_endpgm
3061 ;
3062 ; GFX12-CU-LABEL: system_one_as_seq_cst_fence:
3063 ; GFX12-CU:       ; %bb.0: ; %entry
3064 ; GFX12-CU-NEXT:    global_wb scope:SCOPE_SYS
3065 ; GFX12-CU-NEXT:    s_wait_bvhcnt 0x0
3066 ; GFX12-CU-NEXT:    s_wait_samplecnt 0x0
3067 ; GFX12-CU-NEXT:    s_wait_loadcnt 0x0
3068 ; GFX12-CU-NEXT:    s_wait_storecnt 0x0
3069 ; GFX12-CU-NEXT:    global_inv scope:SCOPE_SYS
3070 ; GFX12-CU-NEXT:    s_endpgm
3071 entry:
3072   fence syncscope("one-as") seq_cst
3073   ret void
3074 }