llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir

   1 # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -debug-only=regalloc -verify-machineinstrs -run-pass=liveintervals -o - %s 2>&1 | FileCheck %s
   2 # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -debug-only=regalloc --passes='print<live-intervals>' -o - %s 2>&1 | FileCheck %s
   3 # REQUIRES: asserts
   4
   5 # CHECK: Computing live-in reg-units in ABI blocks.
   6 # CHECK: 0B      %bb.0 SGPR16_LO16#0 SGPR16_HI16#0
   7 # CHECK: SGPR16_LO16 [0B,16r:0)[32r,144r:1) 0@0B-phi 1@32r
   8 # CHECK: SGPR16_HI16 [0B,16r:0)[32r,144r:1) 0@0B-phi 1@32r
   9
  10 # CHECK: Computing live-in reg-units in ABI blocks.
  11 # CHECK: 0B      %bb.0 SGPR2_LO16#0 SGPR2_HI16#0 SGPR3_LO16#0 SGPR3_HI16#0 SGPR7_LO16#0 SGPR7_HI16#0
  12 # CHECK: SGPR2_LO16 [0B,64r:0) 0@0B-phi
  13 # CHECK: SGPR2_HI16 [0B,64r:0) 0@0B-phi
  14 # CHECK: SGPR3_LO16 [0B,16r:0)[48r,64r:1) 0@0B-phi 1@48r
  15 # CHECK: SGPR3_HI16 [0B,16r:0)[48r,64r:1) 0@0B-phi 1@48r
  16 # CHECK: SGPR7_LO16 [0B,48r:0) 0@0B-phi
  17 # CHECK: SGPR7_HI16 [0B,48r:0) 0@0B-phi
  18
  19 ---
  20 name: phys_reg_partial_liveness_1
  21 tracksRegLiveness: true
  22 body:             |
  23   bb.0:
  24     successors: %bb.1
  25     liveins: $sgpr16
  26
  27     $sgpr1 = S_AND_B32 3, killed $sgpr16, implicit-def $scc
  28     $sgpr16 = S_AND_B32 2, killed $sgpr1, implicit-def $scc
  29
  30   bb.1:
  31     successors: %bb.2
  32     liveins: $sgpr16_sgpr17_sgpr18_sgpr19:0x0000000000000003
  33
  34     $sgpr18 = S_MOV_B32 -1
  35     $sgpr17 = S_MOV_B32 -2097152000
  36     $sgpr19 = S_MOV_B32 -2122316801
  37     renamable $sgpr42 = COPY renamable $sgpr16
  38
  39   bb.2:
  40     liveins: $sgpr16_sgpr17_sgpr18_sgpr19:0x00000000000000FF, $sgpr42
  41
  42     $sgpr2 = S_BUFFER_LOAD_DWORD_IMM $sgpr16_sgpr17_sgpr18_sgpr19, 3780, 0 :: (dereferenceable invariant load (s32))
  43     $sgpr0 = S_AND_B32 $sgpr42, $sgpr2, implicit-def $scc
  44     S_ENDPGM 0, implicit $sgpr0
  45 ...
  46
  47 ---
  48 name: phys_reg_partial_liveness_2
  49 tracksRegLiveness: true
  50 body:             |
  51   bb.0:
  52     successors: %bb.1
  53     liveins: $sgpr2, $sgpr3, $sgpr7
  54
  55     $sgpr1 = S_AND_B32 1, killed $sgpr3, implicit-def $scc
  56
  57   bb.1:
  58     successors: %bb.2
  59     liveins: $sgpr2_sgpr3:0x0000000000000003, $sgpr7
  60
  61     $sgpr3 = COPY $sgpr7
  62     $sgpr0 = S_LOAD_DWORD_IMM $sgpr2_sgpr3, 0, 0 :: (dereferenceable invariant load (s32))
  63
  64   bb.2:
  65     liveins: $sgpr0
  66
  67     S_ENDPGM 0, implicit $sgpr0
  68 ...
  69