| blob | d430ba758572d67ff0a4cd188669395283ab9b30 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
4 ; The first 64 SGPR spills can go to a VGPR, but there isn't a second
5 ; so some spills must be to memory. The last 16 element spill runs out of lanes at the 15th element.
7 define amdgpu_kernel void @partial_no_vgprs_last_sgpr_spill(ptr addrspace(1) %out, i32 %in) #1 {
8 ; GCN-LABEL: partial_no_vgprs_last_sgpr_spill:
9 ; GCN: ; %bb.0:
10 ; GCN-NEXT: s_add_u32 s0, s0, s13
11 ; GCN-NEXT: s_addc_u32 s1, s1, 0
12 ; GCN-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
13 ; GCN-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
14 ; GCN-NEXT: s_load_dword s4, s[6:7], 0x2
15 ; GCN-NEXT: ;;#ASMSTART
16 ; GCN-NEXT: ;;#ASMEND
17 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
18 ; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 offset:4 ; 4-byte Folded Reload
19 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
20 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
21 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 ; 4-byte Folded Reload
22 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
23 ; GCN-NEXT: ;;#ASMSTART
24 ; GCN-NEXT: ;;#ASMEND
25 ; GCN-NEXT: ;;#ASMSTART
26 ; GCN-NEXT: ;;#ASMEND
27 ; GCN-NEXT: ;;#ASMSTART
28 ; GCN-NEXT: ;;#ASMEND
29 ; GCN-NEXT: ;;#ASMSTART
30 ; GCN-NEXT: ;;#ASMEND
31 ; GCN-NEXT: ;;#ASMSTART
32 ; GCN-NEXT: ; def s[8:23]
33 ; GCN-NEXT: ;;#ASMEND
34 ; GCN-NEXT: s_waitcnt vmcnt(1)
35 ; GCN-NEXT: v_writelane_b32 v1, s8, 0
36 ; GCN-NEXT: v_writelane_b32 v1, s9, 1
37 ; GCN-NEXT: v_writelane_b32 v1, s10, 2
38 ; GCN-NEXT: v_writelane_b32 v1, s11, 3
39 ; GCN-NEXT: v_writelane_b32 v1, s12, 4
40 ; GCN-NEXT: v_writelane_b32 v1, s13, 5
41 ; GCN-NEXT: v_writelane_b32 v1, s14, 6
42 ; GCN-NEXT: v_writelane_b32 v1, s15, 7
43 ; GCN-NEXT: v_writelane_b32 v1, s16, 8
44 ; GCN-NEXT: v_writelane_b32 v1, s17, 9
45 ; GCN-NEXT: v_writelane_b32 v1, s18, 10
46 ; GCN-NEXT: v_writelane_b32 v1, s19, 11
47 ; GCN-NEXT: v_writelane_b32 v1, s20, 12
48 ; GCN-NEXT: v_writelane_b32 v1, s21, 13
49 ; GCN-NEXT: v_writelane_b32 v1, s22, 14
50 ; GCN-NEXT: v_writelane_b32 v1, s23, 15
51 ; GCN-NEXT: ;;#ASMSTART
52 ; GCN-NEXT: ; def s[8:23]
53 ; GCN-NEXT: ;;#ASMEND
54 ; GCN-NEXT: v_writelane_b32 v1, s8, 16
55 ; GCN-NEXT: v_writelane_b32 v1, s9, 17
56 ; GCN-NEXT: v_writelane_b32 v1, s10, 18
57 ; GCN-NEXT: v_writelane_b32 v1, s11, 19
58 ; GCN-NEXT: v_writelane_b32 v1, s12, 20
59 ; GCN-NEXT: v_writelane_b32 v1, s13, 21
60 ; GCN-NEXT: v_writelane_b32 v1, s14, 22
61 ; GCN-NEXT: v_writelane_b32 v1, s15, 23
62 ; GCN-NEXT: v_writelane_b32 v1, s16, 24
63 ; GCN-NEXT: v_writelane_b32 v1, s17, 25
64 ; GCN-NEXT: v_writelane_b32 v1, s18, 26
65 ; GCN-NEXT: v_writelane_b32 v1, s19, 27
66 ; GCN-NEXT: v_writelane_b32 v1, s20, 28
67 ; GCN-NEXT: v_writelane_b32 v1, s21, 29
68 ; GCN-NEXT: v_writelane_b32 v1, s22, 30
69 ; GCN-NEXT: v_writelane_b32 v1, s23, 31
70 ; GCN-NEXT: ;;#ASMSTART
71 ; GCN-NEXT: ; def s[8:23]
72 ; GCN-NEXT: ;;#ASMEND
73 ; GCN-NEXT: v_writelane_b32 v1, s8, 32
74 ; GCN-NEXT: v_writelane_b32 v1, s9, 33
75 ; GCN-NEXT: v_writelane_b32 v1, s10, 34
76 ; GCN-NEXT: v_writelane_b32 v1, s11, 35
77 ; GCN-NEXT: v_writelane_b32 v1, s12, 36
78 ; GCN-NEXT: v_writelane_b32 v1, s13, 37
79 ; GCN-NEXT: v_writelane_b32 v1, s14, 38
80 ; GCN-NEXT: v_writelane_b32 v1, s15, 39
81 ; GCN-NEXT: v_writelane_b32 v1, s16, 40
82 ; GCN-NEXT: v_writelane_b32 v1, s17, 41
83 ; GCN-NEXT: v_writelane_b32 v1, s18, 42
84 ; GCN-NEXT: v_writelane_b32 v1, s19, 43
85 ; GCN-NEXT: v_writelane_b32 v1, s20, 44
86 ; GCN-NEXT: v_writelane_b32 v1, s21, 45
87 ; GCN-NEXT: v_writelane_b32 v1, s22, 46
88 ; GCN-NEXT: v_writelane_b32 v1, s23, 47
89 ; GCN-NEXT: ;;#ASMSTART
90 ; GCN-NEXT: ; def s[8:23]
91 ; GCN-NEXT: ;;#ASMEND
92 ; GCN-NEXT: v_writelane_b32 v1, s8, 48
93 ; GCN-NEXT: v_writelane_b32 v1, s9, 49
94 ; GCN-NEXT: v_writelane_b32 v1, s10, 50
95 ; GCN-NEXT: v_writelane_b32 v1, s11, 51
96 ; GCN-NEXT: v_writelane_b32 v1, s12, 52
97 ; GCN-NEXT: v_writelane_b32 v1, s13, 53
98 ; GCN-NEXT: v_writelane_b32 v1, s14, 54
99 ; GCN-NEXT: v_writelane_b32 v1, s15, 55
100 ; GCN-NEXT: v_writelane_b32 v1, s16, 56
101 ; GCN-NEXT: v_writelane_b32 v1, s17, 57
102 ; GCN-NEXT: v_writelane_b32 v1, s18, 58
103 ; GCN-NEXT: v_writelane_b32 v1, s19, 59
104 ; GCN-NEXT: v_writelane_b32 v1, s20, 60
105 ; GCN-NEXT: v_writelane_b32 v1, s21, 61
106 ; GCN-NEXT: v_writelane_b32 v1, s22, 62
107 ; GCN-NEXT: v_writelane_b32 v1, s23, 63
108 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
109 ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0 offset:4 ; 4-byte Folded Spill
110 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
111 ; GCN-NEXT: ;;#ASMSTART
112 ; GCN-NEXT: ; def s[6:7]
113 ; GCN-NEXT: ;;#ASMEND
114 ; GCN-NEXT: s_waitcnt vmcnt(1)
115 ; GCN-NEXT: v_writelane_b32 v0, s6, 0
116 ; GCN-NEXT: v_writelane_b32 v0, s7, 1
117 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
118 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; 4-byte Folded Spill
119 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
120 ; GCN-NEXT: s_mov_b32 s5, 0
121 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
122 ; GCN-NEXT: s_cmp_lg_u32 s4, s5
123 ; GCN-NEXT: s_cbranch_scc1 .LBB0_2
124 ; GCN-NEXT: ; %bb.1: ; %bb0
125 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
126 ; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 offset:4 ; 4-byte Folded Reload
127 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
128 ; GCN-NEXT: s_waitcnt vmcnt(0)
129 ; GCN-NEXT: v_readlane_b32 s4, v1, 0
130 ; GCN-NEXT: v_readlane_b32 s5, v1, 1
131 ; GCN-NEXT: v_readlane_b32 s6, v1, 2
132 ; GCN-NEXT: v_readlane_b32 s7, v1, 3
133 ; GCN-NEXT: v_readlane_b32 s8, v1, 4
134 ; GCN-NEXT: v_readlane_b32 s9, v1, 5
135 ; GCN-NEXT: v_readlane_b32 s10, v1, 6
136 ; GCN-NEXT: v_readlane_b32 s11, v1, 7
137 ; GCN-NEXT: v_readlane_b32 s12, v1, 8
138 ; GCN-NEXT: v_readlane_b32 s13, v1, 9
139 ; GCN-NEXT: v_readlane_b32 s14, v1, 10
140 ; GCN-NEXT: v_readlane_b32 s15, v1, 11
141 ; GCN-NEXT: v_readlane_b32 s16, v1, 12
142 ; GCN-NEXT: v_readlane_b32 s17, v1, 13
143 ; GCN-NEXT: v_readlane_b32 s18, v1, 14
144 ; GCN-NEXT: v_readlane_b32 s19, v1, 15
145 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
146 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 ; 4-byte Folded Reload
147 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
148 ; GCN-NEXT: ;;#ASMSTART
149 ; GCN-NEXT: ; use s[4:19]
150 ; GCN-NEXT: ;;#ASMEND
151 ; GCN-NEXT: v_readlane_b32 s4, v1, 16
152 ; GCN-NEXT: v_readlane_b32 s5, v1, 17
153 ; GCN-NEXT: v_readlane_b32 s6, v1, 18
154 ; GCN-NEXT: v_readlane_b32 s7, v1, 19
155 ; GCN-NEXT: v_readlane_b32 s8, v1, 20
156 ; GCN-NEXT: v_readlane_b32 s9, v1, 21
157 ; GCN-NEXT: v_readlane_b32 s10, v1, 22
158 ; GCN-NEXT: v_readlane_b32 s11, v1, 23
159 ; GCN-NEXT: v_readlane_b32 s12, v1, 24
160 ; GCN-NEXT: v_readlane_b32 s13, v1, 25
161 ; GCN-NEXT: v_readlane_b32 s14, v1, 26
162 ; GCN-NEXT: v_readlane_b32 s15, v1, 27
163 ; GCN-NEXT: v_readlane_b32 s16, v1, 28
164 ; GCN-NEXT: v_readlane_b32 s17, v1, 29
165 ; GCN-NEXT: v_readlane_b32 s18, v1, 30
166 ; GCN-NEXT: v_readlane_b32 s19, v1, 31
167 ; GCN-NEXT: ;;#ASMSTART
168 ; GCN-NEXT: ; use s[4:19]
169 ; GCN-NEXT: ;;#ASMEND
170 ; GCN-NEXT: v_readlane_b32 s4, v1, 32
171 ; GCN-NEXT: v_readlane_b32 s5, v1, 33
172 ; GCN-NEXT: v_readlane_b32 s6, v1, 34
173 ; GCN-NEXT: v_readlane_b32 s7, v1, 35
174 ; GCN-NEXT: v_readlane_b32 s8, v1, 36
175 ; GCN-NEXT: v_readlane_b32 s9, v1, 37
176 ; GCN-NEXT: v_readlane_b32 s10, v1, 38
177 ; GCN-NEXT: v_readlane_b32 s11, v1, 39
178 ; GCN-NEXT: v_readlane_b32 s12, v1, 40
179 ; GCN-NEXT: v_readlane_b32 s13, v1, 41
180 ; GCN-NEXT: v_readlane_b32 s14, v1, 42
181 ; GCN-NEXT: v_readlane_b32 s15, v1, 43
182 ; GCN-NEXT: v_readlane_b32 s16, v1, 44
183 ; GCN-NEXT: v_readlane_b32 s17, v1, 45
184 ; GCN-NEXT: v_readlane_b32 s18, v1, 46
185 ; GCN-NEXT: v_readlane_b32 s19, v1, 47
186 ; GCN-NEXT: ;;#ASMSTART
187 ; GCN-NEXT: ; use s[4:19]
188 ; GCN-NEXT: ;;#ASMEND
189 ; GCN-NEXT: v_readlane_b32 s8, v1, 48
190 ; GCN-NEXT: v_readlane_b32 s9, v1, 49
191 ; GCN-NEXT: v_readlane_b32 s10, v1, 50
192 ; GCN-NEXT: v_readlane_b32 s11, v1, 51
193 ; GCN-NEXT: v_readlane_b32 s12, v1, 52
194 ; GCN-NEXT: v_readlane_b32 s13, v1, 53
195 ; GCN-NEXT: v_readlane_b32 s14, v1, 54
196 ; GCN-NEXT: v_readlane_b32 s15, v1, 55
197 ; GCN-NEXT: v_readlane_b32 s16, v1, 56
198 ; GCN-NEXT: v_readlane_b32 s17, v1, 57
199 ; GCN-NEXT: v_readlane_b32 s18, v1, 58
200 ; GCN-NEXT: v_readlane_b32 s19, v1, 59
201 ; GCN-NEXT: v_readlane_b32 s20, v1, 60
202 ; GCN-NEXT: v_readlane_b32 s21, v1, 61
203 ; GCN-NEXT: v_readlane_b32 s22, v1, 62
204 ; GCN-NEXT: v_readlane_b32 s23, v1, 63
205 ; GCN-NEXT: s_waitcnt vmcnt(0)
206 ; GCN-NEXT: v_readlane_b32 s4, v0, 0
207 ; GCN-NEXT: v_readlane_b32 s5, v0, 1
208 ; GCN-NEXT: ;;#ASMSTART
209 ; GCN-NEXT: ; use s[8:23]
210 ; GCN-NEXT: ;;#ASMEND
211 ; GCN-NEXT: ;;#ASMSTART
212 ; GCN-NEXT: ; use s[4:5]
213 ; GCN-NEXT: ;;#ASMEND
214 ; GCN-NEXT: .LBB0_2: ; %ret
215 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
216 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 ; 4-byte Folded Reload
217 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
218 ; GCN-NEXT: s_or_saveexec_b64 s[24:25], -1
219 ; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 offset:4 ; 4-byte Folded Reload
220 ; GCN-NEXT: s_mov_b64 exec, s[24:25]
221 ; GCN-NEXT: ; kill: killed $vgpr1
222 ; GCN-NEXT: ; kill: killed $vgpr0
223 ; GCN-NEXT: s_endpgm
224 call void asm sideeffect "", "~{v[0:7]}" () #0
225 call void asm sideeffect "", "~{v[8:15]}" () #0
226 call void asm sideeffect "", "~{v[16:19]}"() #0
227 call void asm sideeffect "", "~{v[20:21]}"() #0
228 call void asm sideeffect "", "~{v22}"() #0
230 %wide.sgpr0 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
231 %wide.sgpr1 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
232 %wide.sgpr2 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
233 %wide.sgpr3 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
234 %wide.sgpr4 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
235 %cmp = icmp eq i32 %in, 0
236 br i1 %cmp, label %bb0, label %ret
238 bb0:
239 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr0) #0
240 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr1) #0
241 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr2) #0
242 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr3) #0
243 call void asm sideeffect "; use $0", "s"(<2 x i32> %wide.sgpr4) #0
244 br label %ret
246 ret:
247 ret void
248 }
250 attributes #0 = { nounwind }
251 attributes #1 = { nounwind "amdgpu-waves-per-eu"="10,10" }
253 !llvm.module.flags = !{!0}
254 !0 = !{i32 1, !"amdhsa_code_object_version", i32 500}