Bump version to 19.1.0-rc3
[llvm-project.git] / llvm / test / CodeGen / ARM / llrint-conv.ll
blob017955bb43afba8bd2896a79f90780293bb14f42
1 ; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
2 ; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
4 ; SOFTFP-LABEL: testmsxs_builtin:
5 ; SOFTFP:       bl      llrintf
6 ; HARDFP-LABEL: testmsxs_builtin:
7 ; HARDFP:       bl      llrintf
8 define i64 @testmsxs_builtin(float %x) {
9 entry:
10   %0 = tail call i64 @llvm.llrint.f32(float %x)
11   ret i64 %0
14 ; SOFTFP-LABEL: testmsxd_builtin:
15 ; SOFTFP:       bl      llrint
16 ; HARDFP-LABEL: testmsxd_builtin:
17 ; HARDFP:       bl      llrint
18 define i64 @testmsxd_builtin(double %x) {
19 entry:
20   %0 = tail call i64 @llvm.llrint.f64(double %x)
21   ret i64 %0
24 declare i64 @llvm.llrint.f32(float) nounwind readnone
25 declare i64 @llvm.llrint.f64(double) nounwind readnone