2 %struct.rtunion = type { i64 }
3 %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
4 @ix86_cpu = external global i32 ; <ptr> [#uses=1]
5 @which_alternative = external global i32 ; <ptr> [#uses=3]
7 declare fastcc i32 @recog()
9 define void @athlon_fp_unit_ready_cost() {
11 %tmp = icmp slt i32 0, 0 ; <i1> [#uses=1]
12 br i1 %tmp, label %cond_true.i, label %cond_true
14 cond_true: ; preds = %entry
17 cond_true.i: ; preds = %entry
18 %tmp8.i = tail call fastcc i32 @recog( ) ; <i32> [#uses=1]
19 switch i32 %tmp8.i, label %UnifiedReturnBlock [
34 i32 101, label %bb1648
35 i32 102, label %bb1648
36 i32 103, label %bb1648
37 i32 104, label %bb1648
38 i32 133, label %bb1419
39 i32 135, label %bb1238
40 i32 136, label %bb1238
41 i32 137, label %bb1238
42 i32 138, label %bb1238
43 i32 139, label %bb1201
44 i32 140, label %bb1201
45 i32 141, label %bb1154
46 i32 142, label %bb1126
47 i32 144, label %bb1201
48 i32 145, label %bb1126
49 i32 146, label %bb1201
50 i32 147, label %bb1126
51 i32 148, label %bb1201
52 i32 149, label %bb1126
53 i32 150, label %bb1201
54 i32 151, label %bb1126
55 i32 152, label %bb1096
56 i32 153, label %bb1096
57 i32 154, label %bb1096
58 i32 157, label %bb1096
59 i32 158, label %bb1096
60 i32 159, label %bb1096
61 i32 162, label %bb1096
62 i32 163, label %bb1096
63 i32 164, label %bb1096
64 i32 167, label %bb1201
65 i32 168, label %bb1201
66 i32 170, label %bb1201
67 i32 171, label %bb1201
68 i32 173, label %bb1201
69 i32 174, label %bb1201
70 i32 176, label %bb1201
71 i32 177, label %bb1201
78 i32 365, label %bb1126
79 i32 366, label %bb1126
80 i32 367, label %bb1126
81 i32 368, label %bb1126
82 i32 369, label %bb1126
83 i32 370, label %bb1126
84 i32 371, label %bb1126
85 i32 372, label %bb1126
86 i32 373, label %bb1126
87 i32 384, label %bb1126
88 i32 385, label %bb1126
89 i32 386, label %bb1126
90 i32 387, label %bb1126
91 i32 388, label %bb1126
92 i32 389, label %bb1126
93 i32 390, label %bb1126
94 i32 391, label %bb1126
95 i32 392, label %bb1126
100 i32 531, label %cond_next6.i119
101 i32 532, label %cond_next6.i97
102 i32 533, label %cond_next6.i81
103 i32 534, label %bb495
104 i32 536, label %cond_next6.i81
105 i32 537, label %cond_next6.i81
106 i32 538, label %bb396
107 i32 539, label %bb288
108 i32 541, label %bb396
109 i32 542, label %bb396
110 i32 543, label %bb396
111 i32 544, label %bb396
112 i32 545, label %bb189
113 i32 546, label %cond_next6.i
114 i32 547, label %bb189
115 i32 548, label %cond_next6.i
116 i32 549, label %bb189
117 i32 550, label %cond_next6.i
118 i32 551, label %bb189
119 i32 552, label %cond_next6.i
120 i32 553, label %bb189
121 i32 554, label %cond_next6.i
122 i32 555, label %bb189
123 i32 556, label %cond_next6.i
124 i32 557, label %bb189
125 i32 558, label %cond_next6.i
133 bb10: ; preds = %cond_true.i, %cond_true.i
136 bb18: ; preds = %cond_true.i
139 bb40: ; preds = %cond_true.i, %cond_true.i
142 cond_next6.i: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
145 bb189: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
148 bb288: ; preds = %cond_true.i
151 bb396: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
154 bb495: ; preds = %cond_true.i
157 cond_next6.i81: ; preds = %cond_true.i, %cond_true.i, %cond_true.i
160 cond_next6.i97: ; preds = %cond_true.i
163 cond_next6.i119: ; preds = %cond_true.i
164 %tmp.i126 = icmp eq i16 0, 78 ; <i1> [#uses=1]
165 br i1 %tmp.i126, label %cond_next778, label %bb802
167 cond_next778: ; preds = %cond_next6.i119
168 %tmp781 = icmp eq i32 0, 1 ; <i1> [#uses=1]
169 br i1 %tmp781, label %cond_next784, label %bb790
171 cond_next784: ; preds = %cond_next778
172 %tmp785 = load i32, ptr @ix86_cpu ; <i32> [#uses=1]
173 %tmp786 = icmp eq i32 %tmp785, 5 ; <i1> [#uses=1]
174 br i1 %tmp786, label %UnifiedReturnBlock, label %bb790
176 bb790: ; preds = %cond_next784, %cond_next778
177 %tmp793 = icmp eq i32 0, 1 ; <i1> [#uses=0]
180 bb802: ; preds = %cond_next6.i119
183 bb839: ; preds = %cond_true.i, %cond_true.i
186 bb919: ; preds = %cond_true.i, %cond_true.i
189 bb993: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
192 bb1096: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
195 bb1126: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
198 bb1154: ; preds = %cond_true.i
201 bb1201: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
204 bb1238: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
207 bb1419: ; preds = %cond_true.i
210 bb1648: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
211 %tmp1650 = load i32, ptr @which_alternative ; <i32> [#uses=1]
212 switch i32 %tmp1650, label %bb1701 [
213 i32 0, label %cond_next1675
214 i32 1, label %cond_next1675
215 i32 2, label %cond_next1675
218 cond_next1675: ; preds = %bb1648, %bb1648, %bb1648
221 bb1701: ; preds = %bb1648
222 %tmp1702 = load i32, ptr @which_alternative ; <i32> [#uses=1]
223 switch i32 %tmp1702, label %bb1808 [
224 i32 0, label %cond_next1727
225 i32 1, label %cond_next1727
226 i32 2, label %cond_next1727
229 cond_next1727: ; preds = %bb1701, %bb1701, %bb1701
232 bb1808: ; preds = %bb1701
233 %bothcond696 = or i1 false, false ; <i1> [#uses=1]
234 br i1 %bothcond696, label %bb1876, label %cond_next1834
236 cond_next1834: ; preds = %bb1808
239 bb1876: ; preds = %bb1808
240 %tmp1877signed = load i32, ptr @which_alternative ; <i32> [#uses=4]
241 %tmp1877 = bitcast i32 %tmp1877signed to i32 ; <i32> [#uses=1]
242 %bothcond699 = icmp ult i32 %tmp1877, 2 ; <i1> [#uses=1]
243 %tmp1888 = icmp eq i32 %tmp1877signed, 2 ; <i1> [#uses=1]
244 %bothcond700 = or i1 %bothcond699, %tmp1888 ; <i1> [#uses=1]
245 %bothcond700.not = xor i1 %bothcond700, true ; <i1> [#uses=1]
246 %tmp1894 = icmp eq i32 %tmp1877signed, 3 ; <i1> [#uses=1]
247 %bothcond701 = or i1 %tmp1894, %bothcond700.not ; <i1> [#uses=1]
248 %bothcond702 = or i1 %bothcond701, false ; <i1> [#uses=1]
249 br i1 %bothcond702, label %UnifiedReturnBlock, label %cond_next1902
251 cond_next1902: ; preds = %bb1876
252 switch i32 %tmp1877signed, label %cond_next1937 [
258 bb1918: ; preds = %cond_next1902, %cond_next1902, %cond_next1902
261 cond_next1937: ; preds = %cond_next1902
264 bb1948: ; preds = %cond_true.i, %cond_true.i, %cond_true.i
267 bb1994: ; preds = %cond_true.i, %cond_true.i
270 bb2035: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
273 bb2063: ; preds = %cond_true.i
276 UnifiedReturnBlock: ; preds = %bb1876, %cond_next784, %cond_true.i
277 %UnifiedRetVal = phi i32 [ 100, %bb1876 ], [ 100, %cond_true.i ], [ 4, %cond_next784 ] ; <i32> [#uses=0]