1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc --mtriple=loongarch32 --mattr=+d --target-abi=ilp32d --verify-machineinstrs < %s \
3 ; RUN: | FileCheck --check-prefix=LA32 %s
4 ; RUN: llc --mtriple=loongarch64 --mattr=+d --target-abi=lp64d --verify-machineinstrs < %s \
5 ; RUN: | FileCheck --check-prefix=LA64 %s
7 ;; Check that callee-saved registers clobbered by inlineasm are correctly saved.
9 ;; $r23: $s0 (callee-saved register under all ABIs)
10 ;; $r24: $s1 (callee-saved register under all ABIs)
11 ;; $f24: $fs0 (callee-saved register under *d/*f ABIs)
12 ;; $f25: $fs1 (callee-saved register under *d/*f ABIs)
14 ;; TODO: test other ABIs.
16 define void @test() nounwind {
19 ; LA32-NEXT: addi.w $sp, $sp, -32
20 ; LA32-NEXT: st.w $s0, $sp, 28 # 4-byte Folded Spill
21 ; LA32-NEXT: st.w $s1, $sp, 24 # 4-byte Folded Spill
22 ; LA32-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
23 ; LA32-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
26 ; LA32-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
27 ; LA32-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
28 ; LA32-NEXT: ld.w $s1, $sp, 24 # 4-byte Folded Reload
29 ; LA32-NEXT: ld.w $s0, $sp, 28 # 4-byte Folded Reload
30 ; LA32-NEXT: addi.w $sp, $sp, 32
35 ; LA64-NEXT: addi.d $sp, $sp, -32
36 ; LA64-NEXT: st.d $s0, $sp, 24 # 8-byte Folded Spill
37 ; LA64-NEXT: st.d $s1, $sp, 16 # 8-byte Folded Spill
38 ; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
39 ; LA64-NEXT: fst.d $fs1, $sp, 0 # 8-byte Folded Spill
42 ; LA64-NEXT: fld.d $fs1, $sp, 0 # 8-byte Folded Reload
43 ; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
44 ; LA64-NEXT: ld.d $s1, $sp, 16 # 8-byte Folded Reload
45 ; LA64-NEXT: ld.d $s0, $sp, 24 # 8-byte Folded Reload
46 ; LA64-NEXT: addi.d $sp, $sp, 32
48 tail call void asm sideeffect "", "~{$f24},~{$f25},~{$r23},~{$r24}"()