| blob | 57f457553a54070ebedd7ff9532363b0246287cc |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs -o - %s | FileCheck %s
5 define i1 @isnan_float(float %x) nounwind {
6 ; CHECK-LABEL: isnan_float:
7 ; CHECK: # %bb.0:
8 ; CHECK-NEXT: xststdcsp 0, 1, 64
9 ; CHECK-NEXT: li 3, 0
10 ; CHECK-NEXT: li 4, 1
11 ; CHECK-NEXT: iseleq 3, 4, 3
12 ; CHECK-NEXT: blr
13 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan
14 ret i1 %1
15 }
17 define i1 @isnan_double(double %x) nounwind {
18 ; CHECK-LABEL: isnan_double:
19 ; CHECK: # %bb.0:
20 ; CHECK-NEXT: xststdcdp 0, 1, 64
21 ; CHECK-NEXT: li 3, 0
22 ; CHECK-NEXT: li 4, 1
23 ; CHECK-NEXT: iseleq 3, 4, 3
24 ; CHECK-NEXT: blr
25 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan
26 ret i1 %1
27 }
29 define i1 @isnan_ppc_fp128(ppc_fp128 %x) nounwind {
30 ; CHECK-LABEL: isnan_ppc_fp128:
31 ; CHECK: # %bb.0:
32 ; CHECK-NEXT: fcmpu 0, 1, 1
33 ; CHECK-NEXT: li 3, 0
34 ; CHECK-NEXT: li 4, 1
35 ; CHECK-NEXT: isel 3, 4, 3, 3
36 ; CHECK-NEXT: blr
37 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) ; nan
38 ret i1 %1
39 }
41 define i1 @isnan_f128(fp128 %x) nounwind {
42 ; CHECK-LABEL: isnan_f128:
43 ; CHECK: # %bb.0:
44 ; CHECK-NEXT: xststdcqp 0, 2, 64
45 ; CHECK-NEXT: li 3, 0
46 ; CHECK-NEXT: li 4, 1
47 ; CHECK-NEXT: iseleq 3, 4, 3
48 ; CHECK-NEXT: blr
49 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) ; nan
50 ret i1 %1
51 }
53 define i1 @isnan_float_strictfp(float %x) strictfp nounwind {
54 ; CHECK-LABEL: isnan_float_strictfp:
55 ; CHECK: # %bb.0:
56 ; CHECK-NEXT: xststdcsp 0, 1, 64
57 ; CHECK-NEXT: li 3, 0
58 ; CHECK-NEXT: li 4, 1
59 ; CHECK-NEXT: iseleq 3, 4, 3
60 ; CHECK-NEXT: blr
61 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; nan
62 ret i1 %1
63 }
65 define i1 @isnan_double_strictfp(double %x) strictfp nounwind {
66 ; CHECK-LABEL: isnan_double_strictfp:
67 ; CHECK: # %bb.0:
68 ; CHECK-NEXT: xststdcdp 0, 1, 64
69 ; CHECK-NEXT: li 3, 0
70 ; CHECK-NEXT: li 4, 1
71 ; CHECK-NEXT: iseleq 3, 4, 3
72 ; CHECK-NEXT: blr
73 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; nan
74 ret i1 %1
75 }
77 define i1 @isnan_ppc_fp128_strictfp(ppc_fp128 %x) strictfp nounwind {
78 ; CHECK-LABEL: isnan_ppc_fp128_strictfp:
79 ; CHECK: # %bb.0:
80 ; CHECK-NEXT: mffprd 3, 1
81 ; CHECK-NEXT: li 4, 2047
82 ; CHECK-NEXT: clrldi 3, 3, 1
83 ; CHECK-NEXT: rldic 4, 4, 52, 1
84 ; CHECK-NEXT: cmpd 3, 4
85 ; CHECK-NEXT: li 3, 0
86 ; CHECK-NEXT: li 4, 1
87 ; CHECK-NEXT: iselgt 3, 4, 3
88 ; CHECK-NEXT: blr
89 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) strictfp ; nan
90 ret i1 %1
91 }
93 define i1 @isnan_f128_strictfp(fp128 %x) strictfp nounwind {
94 ; CHECK-LABEL: isnan_f128_strictfp:
95 ; CHECK: # %bb.0:
96 ; CHECK-NEXT: xststdcqp 0, 2, 64
97 ; CHECK-NEXT: li 3, 0
98 ; CHECK-NEXT: li 4, 1
99 ; CHECK-NEXT: iseleq 3, 4, 3
100 ; CHECK-NEXT: blr
101 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) strictfp ; nan
102 ret i1 %1
103 }
105 define i1 @isinf_float(float %x) nounwind {
106 ; CHECK-LABEL: isinf_float:
107 ; CHECK: # %bb.0:
108 ; CHECK-NEXT: xststdcsp 0, 1, 48
109 ; CHECK-NEXT: li 3, 0
110 ; CHECK-NEXT: li 4, 1
111 ; CHECK-NEXT: iseleq 3, 4, 3
112 ; CHECK-NEXT: blr
113 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"
114 ret i1 %1
115 }
117 define i1 @isinf_ppc_fp128(ppc_fp128 %x) nounwind {
118 ; CHECK-LABEL: isinf_ppc_fp128:
119 ; CHECK: # %bb.0:
120 ; CHECK-NEXT: xststdcdp 0, 1, 48
121 ; CHECK-NEXT: li 3, 0
122 ; CHECK-NEXT: li 4, 1
123 ; CHECK-NEXT: iseleq 3, 4, 3
124 ; CHECK-NEXT: blr
125 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 516) ; 0x204 = "inf"
126 ret i1 %1
127 }
129 define i1 @isinf_f128(fp128 %x) nounwind {
130 ; CHECK-LABEL: isinf_f128:
131 ; CHECK: # %bb.0:
132 ; CHECK-NEXT: xststdcqp 0, 2, 48
133 ; CHECK-NEXT: li 3, 0
134 ; CHECK-NEXT: li 4, 1
135 ; CHECK-NEXT: iseleq 3, 4, 3
136 ; CHECK-NEXT: blr
137 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 516) ; 0x204 = "inf"
138 ret i1 %1
139 }
141 define i1 @isfinite_float(float %x) nounwind {
142 ; CHECK-LABEL: isfinite_float:
143 ; CHECK: # %bb.0:
144 ; CHECK-NEXT: xststdcsp 0, 1, 112
145 ; CHECK-NEXT: li 3, 1
146 ; CHECK-NEXT: iseleq 3, 0, 3
147 ; CHECK-NEXT: blr
148 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
149 ret i1 %1
150 }
152 define i1 @isfinite_f128(fp128 %x) nounwind {
153 ; CHECK-LABEL: isfinite_f128:
154 ; CHECK: # %bb.0:
155 ; CHECK-NEXT: xststdcqp 0, 2, 112
156 ; CHECK-NEXT: li 3, 1
157 ; CHECK-NEXT: iseleq 3, 0, 3
158 ; CHECK-NEXT: blr
159 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 504) ; 0x1f8 = "finite"
160 ret i1 %1
161 }
163 define i1 @isnormal_float(float %x) nounwind {
164 ; CHECK-LABEL: isnormal_float:
165 ; CHECK: # %bb.0:
166 ; CHECK-NEXT: xststdcsp 0, 1, 127
167 ; CHECK-NEXT: li 3, 1
168 ; CHECK-NEXT: iseleq 3, 0, 3
169 ; CHECK-NEXT: blr
170 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 264) ; 0x108 = "normal"
171 ret i1 %1
172 }
174 define i1 @isnormal_f128(fp128 %x) nounwind {
175 ; CHECK-LABEL: isnormal_f128:
176 ; CHECK: # %bb.0:
177 ; CHECK-NEXT: xststdcqp 0, 2, 127
178 ; CHECK-NEXT: li 3, 1
179 ; CHECK-NEXT: iseleq 3, 0, 3
180 ; CHECK-NEXT: blr
181 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 264) ; 0x108 = "normal"
182 ret i1 %1
183 }
185 define i1 @issubnormal_float(float %x) nounwind {
186 ; CHECK-LABEL: issubnormal_float:
187 ; CHECK: # %bb.0:
188 ; CHECK-NEXT: xststdcsp 0, 1, 3
189 ; CHECK-NEXT: li 3, 0
190 ; CHECK-NEXT: li 4, 1
191 ; CHECK-NEXT: iseleq 3, 4, 3
192 ; CHECK-NEXT: blr
193 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 144) ; 0x90 = "subnormal"
194 ret i1 %1
195 }
197 define i1 @issubnormal_f128(fp128 %x) nounwind {
198 ; CHECK-LABEL: issubnormal_f128:
199 ; CHECK: # %bb.0:
200 ; CHECK-NEXT: xststdcqp 0, 2, 3
201 ; CHECK-NEXT: li 3, 0
202 ; CHECK-NEXT: li 4, 1
203 ; CHECK-NEXT: iseleq 3, 4, 3
204 ; CHECK-NEXT: blr
205 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 144) ; 0x90 = "subnormal"
206 ret i1 %1
207 }
209 define i1 @iszero_float(float %x) nounwind {
210 ; CHECK-LABEL: iszero_float:
211 ; CHECK: # %bb.0:
212 ; CHECK-NEXT: xststdcsp 0, 1, 12
213 ; CHECK-NEXT: li 3, 0
214 ; CHECK-NEXT: li 4, 1
215 ; CHECK-NEXT: iseleq 3, 4, 3
216 ; CHECK-NEXT: blr
217 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; 0x60 = "zero"
218 ret i1 %1
219 }
221 define i1 @iszero_f128(fp128 %x) nounwind {
222 ; CHECK-LABEL: iszero_f128:
223 ; CHECK: # %bb.0:
224 ; CHECK-NEXT: xststdcqp 0, 2, 12
225 ; CHECK-NEXT: li 3, 0
226 ; CHECK-NEXT: li 4, 1
227 ; CHECK-NEXT: iseleq 3, 4, 3
228 ; CHECK-NEXT: blr
229 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 96) ; 0x60 = "zero"
230 ret i1 %1
231 }
233 define i1 @issnan_float(float %x) nounwind {
234 ; CHECK-LABEL: issnan_float:
235 ; CHECK: # %bb.0:
236 ; CHECK-NEXT: xscvdpspn 0, 1
237 ; CHECK-NEXT: xststdcsp 1, 1, 64
238 ; CHECK-NEXT: mffprwz 3, 0
239 ; CHECK-NEXT: andis. 3, 3, 64
240 ; CHECK-NEXT: li 3, 1
241 ; CHECK-NEXT: crnand 20, 6, 2
242 ; CHECK-NEXT: isel 3, 0, 3, 20
243 ; CHECK-NEXT: blr
244 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1)
245 ret i1 %1
246 }
248 define i1 @issnan_double(double %x) nounwind {
249 ; CHECK-LABEL: issnan_double:
250 ; CHECK: # %bb.0:
251 ; CHECK-NEXT: mffprd 3, 1
252 ; CHECK-NEXT: xststdcdp 1, 1, 64
253 ; CHECK-NEXT: rldicl 3, 3, 32, 32
254 ; CHECK-NEXT: andis. 3, 3, 8
255 ; CHECK-NEXT: li 3, 1
256 ; CHECK-NEXT: crnand 20, 6, 2
257 ; CHECK-NEXT: isel 3, 0, 3, 20
258 ; CHECK-NEXT: blr
259 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 1)
260 ret i1 %1
261 }
263 define i1 @issnan_fp128(fp128 %x) nounwind {
264 ; CHECK-LABEL: issnan_fp128:
265 ; CHECK: # %bb.0:
266 ; CHECK-NEXT: li 3, 12
267 ; CHECK-NEXT: xststdcqp 1, 2, 64
268 ; CHECK-NEXT: vextuwrx 3, 3, 2
269 ; CHECK-NEXT: andi. 3, 3, 32768
270 ; CHECK-NEXT: li 3, 1
271 ; CHECK-NEXT: crnand 20, 6, 2
272 ; CHECK-NEXT: isel 3, 0, 3, 20
273 ; CHECK-NEXT: blr
274 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 1)
275 ret i1 %1
276 }
278 define i1 @issnan_ppc_fp128(ppc_fp128 %x) nounwind {
279 ; CHECK-LABEL: issnan_ppc_fp128:
280 ; CHECK: # %bb.0:
281 ; CHECK-NEXT: mffprd 3, 1
282 ; CHECK-NEXT: li 4, 4095
283 ; CHECK-NEXT: clrldi 3, 3, 1
284 ; CHECK-NEXT: rldic 4, 4, 51, 1
285 ; CHECK-NEXT: cmpd 3, 4
286 ; CHECK-NEXT: li 4, 2047
287 ; CHECK-NEXT: rldic 4, 4, 52, 1
288 ; CHECK-NEXT: cmpd 1, 3, 4
289 ; CHECK-NEXT: li 3, 1
290 ; CHECK-NEXT: crnand 20, 5, 0
291 ; CHECK-NEXT: isel 3, 0, 3, 20
292 ; CHECK-NEXT: blr
293 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 1)
294 ret i1 %1
295 }
297 define i1 @isqnan_float(float %x) nounwind {
298 ; CHECK-LABEL: isqnan_float:
299 ; CHECK: # %bb.0:
300 ; CHECK-NEXT: xscvdpspn 0, 1
301 ; CHECK-NEXT: xststdcsp 1, 1, 64
302 ; CHECK-NEXT: mffprwz 3, 0
303 ; CHECK-NEXT: srwi 3, 3, 22
304 ; CHECK-NEXT: andi. 3, 3, 1
305 ; CHECK-NEXT: li 3, 1
306 ; CHECK-NEXT: crnand 20, 6, 1
307 ; CHECK-NEXT: isel 3, 0, 3, 20
308 ; CHECK-NEXT: blr
309 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2)
310 ret i1 %1
311 }
313 define i1 @isqnan_double(double %x) nounwind {
314 ; CHECK-LABEL: isqnan_double:
315 ; CHECK: # %bb.0:
316 ; CHECK-NEXT: mffprd 3, 1
317 ; CHECK-NEXT: xststdcdp 1, 1, 64
318 ; CHECK-NEXT: rldicl 3, 3, 13, 51
319 ; CHECK-NEXT: andi. 3, 3, 1
320 ; CHECK-NEXT: li 3, 1
321 ; CHECK-NEXT: crnand 20, 6, 1
322 ; CHECK-NEXT: isel 3, 0, 3, 20
323 ; CHECK-NEXT: blr
324 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 2)
325 ret i1 %1
326 }
328 define i1 @isqnan_fp128(fp128 %x) nounwind {
329 ; CHECK-LABEL: isqnan_fp128:
330 ; CHECK: # %bb.0:
331 ; CHECK-NEXT: li 3, 12
332 ; CHECK-NEXT: xststdcqp 1, 2, 64
333 ; CHECK-NEXT: vextuwrx 3, 3, 2
334 ; CHECK-NEXT: srwi 3, 3, 15
335 ; CHECK-NEXT: andi. 3, 3, 1
336 ; CHECK-NEXT: li 3, 1
337 ; CHECK-NEXT: crnand 20, 6, 1
338 ; CHECK-NEXT: isel 3, 0, 3, 20
339 ; CHECK-NEXT: blr
340 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 2)
341 ret i1 %1
342 }
344 define i1 @isqnan_ppc_fp128(ppc_fp128 %x) nounwind {
345 ; CHECK-LABEL: isqnan_ppc_fp128:
346 ; CHECK: # %bb.0:
347 ; CHECK-NEXT: mffprd 3, 1
348 ; CHECK-NEXT: li 4, -17
349 ; CHECK-NEXT: clrldi 3, 3, 1
350 ; CHECK-NEXT: rldicl 4, 4, 47, 1
351 ; CHECK-NEXT: cmpd 3, 4
352 ; CHECK-NEXT: li 3, 0
353 ; CHECK-NEXT: li 4, 1
354 ; CHECK-NEXT: iselgt 3, 4, 3
355 ; CHECK-NEXT: blr
356 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 2)
357 ret i1 %1
358 }
360 define i1 @isposzero_double(double %x) nounwind {
361 ; CHECK-LABEL: isposzero_double:
362 ; CHECK: # %bb.0:
363 ; CHECK-NEXT: xststdcdp 0, 1, 8
364 ; CHECK-NEXT: li 3, 0
365 ; CHECK-NEXT: li 4, 1
366 ; CHECK-NEXT: iseleq 3, 4, 3
367 ; CHECK-NEXT: blr
368 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 64)
369 ret i1 %1
370 }
372 define i1 @isnegzero_double(double %x) nounwind {
373 ; CHECK-LABEL: isnegzero_double:
374 ; CHECK: # %bb.0:
375 ; CHECK-NEXT: xststdcdp 0, 1, 4
376 ; CHECK-NEXT: li 3, 0
377 ; CHECK-NEXT: li 4, 1
378 ; CHECK-NEXT: iseleq 3, 4, 3
379 ; CHECK-NEXT: blr
380 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 32)
381 ret i1 %1
382 }
384 define i1 @isposnormal_double(double %x) nounwind {
385 ; CHECK-LABEL: isposnormal_double:
386 ; CHECK: # %bb.0:
387 ; CHECK-NEXT: xststdcdp 0, 1, 127
388 ; CHECK-NEXT: li 3, 1
389 ; CHECK-NEXT: cror 20, 0, 2
390 ; CHECK-NEXT: isel 3, 0, 3, 20
391 ; CHECK-NEXT: blr
392 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 256)
393 ret i1 %1
394 }
396 define i1 @isnegnormal_double(double %x) nounwind {
397 ; CHECK-LABEL: isnegnormal_double:
398 ; CHECK: # %bb.0:
399 ; CHECK-NEXT: xststdcdp 0, 1, 127
400 ; CHECK-NEXT: li 3, 1
401 ; CHECK-NEXT: crorc 20, 2, 0
402 ; CHECK-NEXT: isel 3, 0, 3, 20
403 ; CHECK-NEXT: blr
404 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 8)
405 ret i1 %1
406 }
408 define i1 @isnormal_double(double %x) nounwind {
409 ; CHECK-LABEL: isnormal_double:
410 ; CHECK: # %bb.0:
411 ; CHECK-NEXT: xststdcdp 0, 1, 127
412 ; CHECK-NEXT: li 3, 1
413 ; CHECK-NEXT: iseleq 3, 0, 3
414 ; CHECK-NEXT: blr
415 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 264)
416 ret i1 %1
417 }
419 define i1 @isclass_00d_double(double %x) nounwind {
420 ; CHECK-LABEL: isclass_00d_double:
421 ; CHECK: # %bb.0:
422 ; CHECK-NEXT: mffprd 3, 1
423 ; CHECK-NEXT: xststdcdp 0, 1, 127
424 ; CHECK-NEXT: xststdcdp 1, 1, 64
425 ; CHECK-NEXT: rldicl 3, 3, 32, 32
426 ; CHECK-NEXT: crandc 20, 0, 2
427 ; CHECK-NEXT: andis. 3, 3, 8
428 ; CHECK-NEXT: li 3, 1
429 ; CHECK-NEXT: crand 21, 6, 2
430 ; CHECK-NEXT: xststdcdp 0, 1, 16
431 ; CHECK-NEXT: cror 21, 2, 21
432 ; CHECK-NEXT: crnor 20, 21, 20
433 ; CHECK-NEXT: isel 3, 0, 3, 20
434 ; CHECK-NEXT: blr
435 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 13)
436 ret i1 %1
437 }
439 define i1 @isclass_1c0_float(float %x) nounwind {
440 ; CHECK-LABEL: isclass_1c0_float:
441 ; CHECK: # %bb.0:
442 ; CHECK-NEXT: xststdcsp 0, 1, 127
443 ; CHECK-NEXT: li 3, 1
444 ; CHECK-NEXT: crnor 20, 0, 2
445 ; CHECK-NEXT: xststdcsp 0, 1, 10
446 ; CHECK-NEXT: crnor 20, 2, 20
447 ; CHECK-NEXT: isel 3, 0, 3, 20
448 ; CHECK-NEXT: blr
449 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448)
450 ret i1 %1
451 }
453 declare i1 @llvm.is.fpclass.f32(float, i32)
454 declare i1 @llvm.is.fpclass.f64(double, i32)
455 declare i1 @llvm.is.fpclass.ppcf128(ppc_fp128, i32)
456 declare i1 @llvm.is.fpclass.f128(fp128, i32)