| blob | d5e77a5cda067f53aa1c9a95c8de4121dd5d65c3 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -ppc-reduce-cr-logicals -verify-machineinstrs -tail-dup-placement=false < %s | FileCheck %s
3 ; RUN: llc -ppc-reduce-cr-logicals -verify-machineinstrs \
4 ; RUN: -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
5 target datalayout = "E-m:e-i64:64-n32:64"
6 target triple = "powerpc64-unknown-linux-gnu"
8 ; FIXME: We should check the operands to the cr* logical operation itself, but
9 ; unfortunately, FileCheck does not yet understand how to do arithmetic, so we
10 ; can't do so without introducing a register-allocation dependency.
12 define signext i32 @testi32slt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
13 ; CHECK-LABEL: testi32slt:
14 ; CHECK: # %bb.0: # %entry
15 ; CHECK-NEXT: cmpw 5, 6
16 ; CHECK-NEXT: cmpw 1, 3, 4
17 ; CHECK-NEXT: crandc 20, 6, 2
18 ; CHECK-NEXT: isel 3, 7, 8, 20
19 ; CHECK-NEXT: blr
20 ;
21 ; CHECK-NO-ISEL-LABEL: testi32slt:
22 ; CHECK-NO-ISEL: # %bb.0: # %entry
23 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
24 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
25 ; CHECK-NO-ISEL-NEXT: crandc 20, 6, 2
26 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB0_2
27 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
28 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
29 ; CHECK-NO-ISEL-NEXT: blr
30 ; CHECK-NO-ISEL-NEXT: .LBB0_2: # %entry
31 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
32 ; CHECK-NO-ISEL-NEXT: blr
33 entry:
34 %cmp1 = icmp eq i32 %c3, %c4
35 %cmp3tmp = icmp eq i32 %c1, %c2
36 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
37 %cond = select i1 %cmp3, i32 %a1, i32 %a2
38 ret i32 %cond
40 }
42 define signext i32 @testi32ult(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
43 ; CHECK-LABEL: testi32ult:
44 ; CHECK: # %bb.0: # %entry
45 ; CHECK-NEXT: cmpw 5, 6
46 ; CHECK-NEXT: cmpw 1, 3, 4
47 ; CHECK-NEXT: crandc 20, 2, 6
48 ; CHECK-NEXT: isel 3, 7, 8, 20
49 ; CHECK-NEXT: blr
50 ;
51 ; CHECK-NO-ISEL-LABEL: testi32ult:
52 ; CHECK-NO-ISEL: # %bb.0: # %entry
53 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
54 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
55 ; CHECK-NO-ISEL-NEXT: crandc 20, 2, 6
56 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB1_2
57 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
58 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
59 ; CHECK-NO-ISEL-NEXT: blr
60 ; CHECK-NO-ISEL-NEXT: .LBB1_2: # %entry
61 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
62 ; CHECK-NO-ISEL-NEXT: blr
63 entry:
64 %cmp1 = icmp eq i32 %c3, %c4
65 %cmp3tmp = icmp eq i32 %c1, %c2
66 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
67 %cond = select i1 %cmp3, i32 %a1, i32 %a2
68 ret i32 %cond
70 }
72 define signext i32 @testi32sle(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
73 ; CHECK-LABEL: testi32sle:
74 ; CHECK: # %bb.0: # %entry
75 ; CHECK-NEXT: cmpw 5, 6
76 ; CHECK-NEXT: cmpw 1, 3, 4
77 ; CHECK-NEXT: crorc 20, 6, 2
78 ; CHECK-NEXT: isel 3, 7, 8, 20
79 ; CHECK-NEXT: blr
80 ;
81 ; CHECK-NO-ISEL-LABEL: testi32sle:
82 ; CHECK-NO-ISEL: # %bb.0: # %entry
83 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
84 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
85 ; CHECK-NO-ISEL-NEXT: crorc 20, 6, 2
86 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB2_2
87 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
88 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
89 ; CHECK-NO-ISEL-NEXT: blr
90 ; CHECK-NO-ISEL-NEXT: .LBB2_2: # %entry
91 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
92 ; CHECK-NO-ISEL-NEXT: blr
93 entry:
94 %cmp1 = icmp eq i32 %c3, %c4
95 %cmp3tmp = icmp eq i32 %c1, %c2
96 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
97 %cond = select i1 %cmp3, i32 %a1, i32 %a2
98 ret i32 %cond
100 }
102 define signext i32 @testi32ule(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
103 ; CHECK-LABEL: testi32ule:
104 ; CHECK: # %bb.0: # %entry
105 ; CHECK-NEXT: cmpw 5, 6
106 ; CHECK-NEXT: cmpw 1, 3, 4
107 ; CHECK-NEXT: crorc 20, 2, 6
108 ; CHECK-NEXT: isel 3, 7, 8, 20
109 ; CHECK-NEXT: blr
110 ;
111 ; CHECK-NO-ISEL-LABEL: testi32ule:
112 ; CHECK-NO-ISEL: # %bb.0: # %entry
113 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
114 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
115 ; CHECK-NO-ISEL-NEXT: crorc 20, 2, 6
116 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB3_2
117 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
118 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
119 ; CHECK-NO-ISEL-NEXT: blr
120 ; CHECK-NO-ISEL-NEXT: .LBB3_2: # %entry
121 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
122 ; CHECK-NO-ISEL-NEXT: blr
123 entry:
124 %cmp1 = icmp eq i32 %c3, %c4
125 %cmp3tmp = icmp eq i32 %c1, %c2
126 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
127 %cond = select i1 %cmp3, i32 %a1, i32 %a2
128 ret i32 %cond
130 }
132 define signext i32 @testi32eq(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
133 ; CHECK-LABEL: testi32eq:
134 ; CHECK: # %bb.0: # %entry
135 ; CHECK-NEXT: cmpw 5, 6
136 ; CHECK-NEXT: cmpw 1, 3, 4
137 ; CHECK-NEXT: creqv 20, 6, 2
138 ; CHECK-NEXT: isel 3, 7, 8, 20
139 ; CHECK-NEXT: blr
140 ;
141 ; CHECK-NO-ISEL-LABEL: testi32eq:
142 ; CHECK-NO-ISEL: # %bb.0: # %entry
143 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
144 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
145 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
146 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB4_2
147 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
148 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
149 ; CHECK-NO-ISEL-NEXT: blr
150 ; CHECK-NO-ISEL-NEXT: .LBB4_2: # %entry
151 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
152 ; CHECK-NO-ISEL-NEXT: blr
153 entry:
154 %cmp1 = icmp eq i32 %c3, %c4
155 %cmp3tmp = icmp eq i32 %c1, %c2
156 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
157 %cond = select i1 %cmp3, i32 %a1, i32 %a2
158 ret i32 %cond
160 }
162 define signext i32 @testi32sge(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
163 ; CHECK-LABEL: testi32sge:
164 ; CHECK: # %bb.0: # %entry
165 ; CHECK-NEXT: cmpw 5, 6
166 ; CHECK-NEXT: cmpw 1, 3, 4
167 ; CHECK-NEXT: crorc 20, 2, 6
168 ; CHECK-NEXT: isel 3, 7, 8, 20
169 ; CHECK-NEXT: blr
170 ;
171 ; CHECK-NO-ISEL-LABEL: testi32sge:
172 ; CHECK-NO-ISEL: # %bb.0: # %entry
173 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
174 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
175 ; CHECK-NO-ISEL-NEXT: crorc 20, 2, 6
176 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB5_2
177 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
178 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
179 ; CHECK-NO-ISEL-NEXT: blr
180 ; CHECK-NO-ISEL-NEXT: .LBB5_2: # %entry
181 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
182 ; CHECK-NO-ISEL-NEXT: blr
183 entry:
184 %cmp1 = icmp eq i32 %c3, %c4
185 %cmp3tmp = icmp eq i32 %c1, %c2
186 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
187 %cond = select i1 %cmp3, i32 %a1, i32 %a2
188 ret i32 %cond
190 }
192 define signext i32 @testi32uge(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
193 ; CHECK-LABEL: testi32uge:
194 ; CHECK: # %bb.0: # %entry
195 ; CHECK-NEXT: cmpw 5, 6
196 ; CHECK-NEXT: cmpw 1, 3, 4
197 ; CHECK-NEXT: crorc 20, 6, 2
198 ; CHECK-NEXT: isel 3, 7, 8, 20
199 ; CHECK-NEXT: blr
200 ;
201 ; CHECK-NO-ISEL-LABEL: testi32uge:
202 ; CHECK-NO-ISEL: # %bb.0: # %entry
203 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
204 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
205 ; CHECK-NO-ISEL-NEXT: crorc 20, 6, 2
206 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB6_2
207 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
208 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
209 ; CHECK-NO-ISEL-NEXT: blr
210 ; CHECK-NO-ISEL-NEXT: .LBB6_2: # %entry
211 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
212 ; CHECK-NO-ISEL-NEXT: blr
213 entry:
214 %cmp1 = icmp eq i32 %c3, %c4
215 %cmp3tmp = icmp eq i32 %c1, %c2
216 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
217 %cond = select i1 %cmp3, i32 %a1, i32 %a2
218 ret i32 %cond
220 }
222 define signext i32 @testi32sgt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
223 ; CHECK-LABEL: testi32sgt:
224 ; CHECK: # %bb.0: # %entry
225 ; CHECK-NEXT: cmpw 5, 6
226 ; CHECK-NEXT: cmpw 1, 3, 4
227 ; CHECK-NEXT: crandc 20, 2, 6
228 ; CHECK-NEXT: isel 3, 7, 8, 20
229 ; CHECK-NEXT: blr
230 ;
231 ; CHECK-NO-ISEL-LABEL: testi32sgt:
232 ; CHECK-NO-ISEL: # %bb.0: # %entry
233 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
234 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
235 ; CHECK-NO-ISEL-NEXT: crandc 20, 2, 6
236 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB7_2
237 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
238 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
239 ; CHECK-NO-ISEL-NEXT: blr
240 ; CHECK-NO-ISEL-NEXT: .LBB7_2: # %entry
241 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
242 ; CHECK-NO-ISEL-NEXT: blr
243 entry:
244 %cmp1 = icmp eq i32 %c3, %c4
245 %cmp3tmp = icmp eq i32 %c1, %c2
246 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
247 %cond = select i1 %cmp3, i32 %a1, i32 %a2
248 ret i32 %cond
250 }
252 define signext i32 @testi32ugt(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
253 ; CHECK-LABEL: testi32ugt:
254 ; CHECK: # %bb.0: # %entry
255 ; CHECK-NEXT: cmpw 5, 6
256 ; CHECK-NEXT: cmpw 1, 3, 4
257 ; CHECK-NEXT: crandc 20, 6, 2
258 ; CHECK-NEXT: isel 3, 7, 8, 20
259 ; CHECK-NEXT: blr
260 ;
261 ; CHECK-NO-ISEL-LABEL: testi32ugt:
262 ; CHECK-NO-ISEL: # %bb.0: # %entry
263 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
264 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
265 ; CHECK-NO-ISEL-NEXT: crandc 20, 6, 2
266 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB8_2
267 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
268 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
269 ; CHECK-NO-ISEL-NEXT: blr
270 ; CHECK-NO-ISEL-NEXT: .LBB8_2: # %entry
271 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
272 ; CHECK-NO-ISEL-NEXT: blr
273 entry:
274 %cmp1 = icmp eq i32 %c3, %c4
275 %cmp3tmp = icmp eq i32 %c1, %c2
276 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
277 %cond = select i1 %cmp3, i32 %a1, i32 %a2
278 ret i32 %cond
280 }
282 define signext i32 @testi32ne(i32 signext %c1, i32 signext %c2, i32 signext %c3, i32 signext %c4, i32 signext %a1, i32 signext %a2) #0 {
283 ; CHECK-LABEL: testi32ne:
284 ; CHECK: # %bb.0: # %entry
285 ; CHECK-NEXT: cmpw 5, 6
286 ; CHECK-NEXT: cmpw 1, 3, 4
287 ; CHECK-NEXT: crxor 20, 6, 2
288 ; CHECK-NEXT: isel 3, 7, 8, 20
289 ; CHECK-NEXT: blr
290 ;
291 ; CHECK-NO-ISEL-LABEL: testi32ne:
292 ; CHECK-NO-ISEL: # %bb.0: # %entry
293 ; CHECK-NO-ISEL-NEXT: cmpw 5, 6
294 ; CHECK-NO-ISEL-NEXT: cmpw 1, 3, 4
295 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
296 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB9_2
297 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
298 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
299 ; CHECK-NO-ISEL-NEXT: blr
300 ; CHECK-NO-ISEL-NEXT: .LBB9_2: # %entry
301 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
302 ; CHECK-NO-ISEL-NEXT: blr
303 entry:
304 %cmp1 = icmp eq i32 %c3, %c4
305 %cmp3tmp = icmp eq i32 %c1, %c2
306 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
307 %cond = select i1 %cmp3, i32 %a1, i32 %a2
308 ret i32 %cond
310 }
312 define i64 @testi64slt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
313 ; CHECK-LABEL: testi64slt:
314 ; CHECK: # %bb.0: # %entry
315 ; CHECK-NEXT: cmpd 5, 6
316 ; CHECK-NEXT: cmpd 1, 3, 4
317 ; CHECK-NEXT: crandc 20, 6, 2
318 ; CHECK-NEXT: isel 3, 7, 8, 20
319 ; CHECK-NEXT: blr
320 ;
321 ; CHECK-NO-ISEL-LABEL: testi64slt:
322 ; CHECK-NO-ISEL: # %bb.0: # %entry
323 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
324 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
325 ; CHECK-NO-ISEL-NEXT: crandc 20, 6, 2
326 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB10_2
327 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
328 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
329 ; CHECK-NO-ISEL-NEXT: blr
330 ; CHECK-NO-ISEL-NEXT: .LBB10_2: # %entry
331 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
332 ; CHECK-NO-ISEL-NEXT: blr
333 entry:
334 %cmp1 = icmp eq i64 %c3, %c4
335 %cmp3tmp = icmp eq i64 %c1, %c2
336 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
337 %cond = select i1 %cmp3, i64 %a1, i64 %a2
338 ret i64 %cond
340 }
342 define i64 @testi64ult(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
343 ; CHECK-LABEL: testi64ult:
344 ; CHECK: # %bb.0: # %entry
345 ; CHECK-NEXT: cmpd 5, 6
346 ; CHECK-NEXT: cmpd 1, 3, 4
347 ; CHECK-NEXT: crandc 20, 2, 6
348 ; CHECK-NEXT: isel 3, 7, 8, 20
349 ; CHECK-NEXT: blr
350 ;
351 ; CHECK-NO-ISEL-LABEL: testi64ult:
352 ; CHECK-NO-ISEL: # %bb.0: # %entry
353 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
354 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
355 ; CHECK-NO-ISEL-NEXT: crandc 20, 2, 6
356 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB11_2
357 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
358 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
359 ; CHECK-NO-ISEL-NEXT: blr
360 ; CHECK-NO-ISEL-NEXT: .LBB11_2: # %entry
361 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
362 ; CHECK-NO-ISEL-NEXT: blr
363 entry:
364 %cmp1 = icmp eq i64 %c3, %c4
365 %cmp3tmp = icmp eq i64 %c1, %c2
366 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
367 %cond = select i1 %cmp3, i64 %a1, i64 %a2
368 ret i64 %cond
370 }
372 define i64 @testi64sle(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
373 ; CHECK-LABEL: testi64sle:
374 ; CHECK: # %bb.0: # %entry
375 ; CHECK-NEXT: cmpd 5, 6
376 ; CHECK-NEXT: cmpd 1, 3, 4
377 ; CHECK-NEXT: crorc 20, 6, 2
378 ; CHECK-NEXT: isel 3, 7, 8, 20
379 ; CHECK-NEXT: blr
380 ;
381 ; CHECK-NO-ISEL-LABEL: testi64sle:
382 ; CHECK-NO-ISEL: # %bb.0: # %entry
383 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
384 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
385 ; CHECK-NO-ISEL-NEXT: crorc 20, 6, 2
386 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB12_2
387 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
388 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
389 ; CHECK-NO-ISEL-NEXT: blr
390 ; CHECK-NO-ISEL-NEXT: .LBB12_2: # %entry
391 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
392 ; CHECK-NO-ISEL-NEXT: blr
393 entry:
394 %cmp1 = icmp eq i64 %c3, %c4
395 %cmp3tmp = icmp eq i64 %c1, %c2
396 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
397 %cond = select i1 %cmp3, i64 %a1, i64 %a2
398 ret i64 %cond
400 }
402 define i64 @testi64ule(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
403 ; CHECK-LABEL: testi64ule:
404 ; CHECK: # %bb.0: # %entry
405 ; CHECK-NEXT: cmpd 5, 6
406 ; CHECK-NEXT: cmpd 1, 3, 4
407 ; CHECK-NEXT: crorc 20, 2, 6
408 ; CHECK-NEXT: isel 3, 7, 8, 20
409 ; CHECK-NEXT: blr
410 ;
411 ; CHECK-NO-ISEL-LABEL: testi64ule:
412 ; CHECK-NO-ISEL: # %bb.0: # %entry
413 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
414 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
415 ; CHECK-NO-ISEL-NEXT: crorc 20, 2, 6
416 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB13_2
417 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
418 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
419 ; CHECK-NO-ISEL-NEXT: blr
420 ; CHECK-NO-ISEL-NEXT: .LBB13_2: # %entry
421 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
422 ; CHECK-NO-ISEL-NEXT: blr
423 entry:
424 %cmp1 = icmp eq i64 %c3, %c4
425 %cmp3tmp = icmp eq i64 %c1, %c2
426 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
427 %cond = select i1 %cmp3, i64 %a1, i64 %a2
428 ret i64 %cond
430 }
432 define i64 @testi64eq(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
433 ; CHECK-LABEL: testi64eq:
434 ; CHECK: # %bb.0: # %entry
435 ; CHECK-NEXT: cmpd 5, 6
436 ; CHECK-NEXT: cmpd 1, 3, 4
437 ; CHECK-NEXT: creqv 20, 6, 2
438 ; CHECK-NEXT: isel 3, 7, 8, 20
439 ; CHECK-NEXT: blr
440 ;
441 ; CHECK-NO-ISEL-LABEL: testi64eq:
442 ; CHECK-NO-ISEL: # %bb.0: # %entry
443 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
444 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
445 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
446 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB14_2
447 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
448 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
449 ; CHECK-NO-ISEL-NEXT: blr
450 ; CHECK-NO-ISEL-NEXT: .LBB14_2: # %entry
451 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
452 ; CHECK-NO-ISEL-NEXT: blr
453 entry:
454 %cmp1 = icmp eq i64 %c3, %c4
455 %cmp3tmp = icmp eq i64 %c1, %c2
456 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
457 %cond = select i1 %cmp3, i64 %a1, i64 %a2
458 ret i64 %cond
460 }
462 define i64 @testi64sge(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
463 ; CHECK-LABEL: testi64sge:
464 ; CHECK: # %bb.0: # %entry
465 ; CHECK-NEXT: cmpd 5, 6
466 ; CHECK-NEXT: cmpd 1, 3, 4
467 ; CHECK-NEXT: crorc 20, 2, 6
468 ; CHECK-NEXT: isel 3, 7, 8, 20
469 ; CHECK-NEXT: blr
470 ;
471 ; CHECK-NO-ISEL-LABEL: testi64sge:
472 ; CHECK-NO-ISEL: # %bb.0: # %entry
473 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
474 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
475 ; CHECK-NO-ISEL-NEXT: crorc 20, 2, 6
476 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB15_2
477 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
478 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
479 ; CHECK-NO-ISEL-NEXT: blr
480 ; CHECK-NO-ISEL-NEXT: .LBB15_2: # %entry
481 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
482 ; CHECK-NO-ISEL-NEXT: blr
483 entry:
484 %cmp1 = icmp eq i64 %c3, %c4
485 %cmp3tmp = icmp eq i64 %c1, %c2
486 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
487 %cond = select i1 %cmp3, i64 %a1, i64 %a2
488 ret i64 %cond
490 }
492 define i64 @testi64uge(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
493 ; CHECK-LABEL: testi64uge:
494 ; CHECK: # %bb.0: # %entry
495 ; CHECK-NEXT: cmpd 5, 6
496 ; CHECK-NEXT: cmpd 1, 3, 4
497 ; CHECK-NEXT: crorc 20, 6, 2
498 ; CHECK-NEXT: isel 3, 7, 8, 20
499 ; CHECK-NEXT: blr
500 ;
501 ; CHECK-NO-ISEL-LABEL: testi64uge:
502 ; CHECK-NO-ISEL: # %bb.0: # %entry
503 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
504 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
505 ; CHECK-NO-ISEL-NEXT: crorc 20, 6, 2
506 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB16_2
507 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
508 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
509 ; CHECK-NO-ISEL-NEXT: blr
510 ; CHECK-NO-ISEL-NEXT: .LBB16_2: # %entry
511 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
512 ; CHECK-NO-ISEL-NEXT: blr
513 entry:
514 %cmp1 = icmp eq i64 %c3, %c4
515 %cmp3tmp = icmp eq i64 %c1, %c2
516 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
517 %cond = select i1 %cmp3, i64 %a1, i64 %a2
518 ret i64 %cond
520 }
522 define i64 @testi64sgt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
523 ; CHECK-LABEL: testi64sgt:
524 ; CHECK: # %bb.0: # %entry
525 ; CHECK-NEXT: cmpd 5, 6
526 ; CHECK-NEXT: cmpd 1, 3, 4
527 ; CHECK-NEXT: crandc 20, 2, 6
528 ; CHECK-NEXT: isel 3, 7, 8, 20
529 ; CHECK-NEXT: blr
530 ;
531 ; CHECK-NO-ISEL-LABEL: testi64sgt:
532 ; CHECK-NO-ISEL: # %bb.0: # %entry
533 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
534 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
535 ; CHECK-NO-ISEL-NEXT: crandc 20, 2, 6
536 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB17_2
537 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
538 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
539 ; CHECK-NO-ISEL-NEXT: blr
540 ; CHECK-NO-ISEL-NEXT: .LBB17_2: # %entry
541 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
542 ; CHECK-NO-ISEL-NEXT: blr
543 entry:
544 %cmp1 = icmp eq i64 %c3, %c4
545 %cmp3tmp = icmp eq i64 %c1, %c2
546 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
547 %cond = select i1 %cmp3, i64 %a1, i64 %a2
548 ret i64 %cond
550 }
552 define i64 @testi64ugt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
553 ; CHECK-LABEL: testi64ugt:
554 ; CHECK: # %bb.0: # %entry
555 ; CHECK-NEXT: cmpd 5, 6
556 ; CHECK-NEXT: cmpd 1, 3, 4
557 ; CHECK-NEXT: crandc 20, 6, 2
558 ; CHECK-NEXT: isel 3, 7, 8, 20
559 ; CHECK-NEXT: blr
560 ;
561 ; CHECK-NO-ISEL-LABEL: testi64ugt:
562 ; CHECK-NO-ISEL: # %bb.0: # %entry
563 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
564 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
565 ; CHECK-NO-ISEL-NEXT: crandc 20, 6, 2
566 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB18_2
567 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
568 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
569 ; CHECK-NO-ISEL-NEXT: blr
570 ; CHECK-NO-ISEL-NEXT: .LBB18_2: # %entry
571 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
572 ; CHECK-NO-ISEL-NEXT: blr
573 entry:
574 %cmp1 = icmp eq i64 %c3, %c4
575 %cmp3tmp = icmp eq i64 %c1, %c2
576 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
577 %cond = select i1 %cmp3, i64 %a1, i64 %a2
578 ret i64 %cond
580 }
582 define i64 @testi64ne(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
583 ; CHECK-LABEL: testi64ne:
584 ; CHECK: # %bb.0: # %entry
585 ; CHECK-NEXT: cmpd 5, 6
586 ; CHECK-NEXT: cmpd 1, 3, 4
587 ; CHECK-NEXT: crxor 20, 6, 2
588 ; CHECK-NEXT: isel 3, 7, 8, 20
589 ; CHECK-NEXT: blr
590 ;
591 ; CHECK-NO-ISEL-LABEL: testi64ne:
592 ; CHECK-NO-ISEL: # %bb.0: # %entry
593 ; CHECK-NO-ISEL-NEXT: cmpd 5, 6
594 ; CHECK-NO-ISEL-NEXT: cmpd 1, 3, 4
595 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
596 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB19_2
597 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
598 ; CHECK-NO-ISEL-NEXT: ori 3, 8, 0
599 ; CHECK-NO-ISEL-NEXT: blr
600 ; CHECK-NO-ISEL-NEXT: .LBB19_2: # %entry
601 ; CHECK-NO-ISEL-NEXT: addi 3, 7, 0
602 ; CHECK-NO-ISEL-NEXT: blr
603 entry:
604 %cmp1 = icmp eq i64 %c3, %c4
605 %cmp3tmp = icmp eq i64 %c1, %c2
606 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
607 %cond = select i1 %cmp3, i64 %a1, i64 %a2
608 ret i64 %cond
610 }
612 define float @testfloatslt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
613 ; CHECK-LABEL: testfloatslt:
614 ; CHECK: # %bb.0: # %entry
615 ; CHECK-NEXT: fcmpu 0, 3, 4
616 ; CHECK-NEXT: bc 12, 2, .LBB20_2
617 ; CHECK-NEXT: # %bb.1: # %entry
618 ; CHECK-NEXT: fcmpu 0, 1, 2
619 ; CHECK-NEXT: bc 12, 2, .LBB20_3
620 ; CHECK-NEXT: .LBB20_2: # %entry
621 ; CHECK-NEXT: fmr 5, 6
622 ; CHECK-NEXT: .LBB20_3: # %entry
623 ; CHECK-NEXT: fmr 1, 5
624 ; CHECK-NEXT: blr
625 ;
626 ; CHECK-NO-ISEL-LABEL: testfloatslt:
627 ; CHECK-NO-ISEL: # %bb.0: # %entry
628 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
629 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB20_3
630 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
631 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
632 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB20_3
633 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
634 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
635 ; CHECK-NO-ISEL-NEXT: blr
636 ; CHECK-NO-ISEL-NEXT: .LBB20_3: # %entry
637 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
638 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
639 ; CHECK-NO-ISEL-NEXT: blr
640 entry:
641 %cmp1 = fcmp oeq float %c3, %c4
642 %cmp3tmp = fcmp oeq float %c1, %c2
643 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
644 %cond = select i1 %cmp3, float %a1, float %a2
645 ret float %cond
647 }
649 define float @testfloatult(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
650 ; CHECK-LABEL: testfloatult:
651 ; CHECK: # %bb.0: # %entry
652 ; CHECK-NEXT: fcmpu 0, 3, 4
653 ; CHECK-NEXT: bc 4, 2, .LBB21_2
654 ; CHECK-NEXT: # %bb.1: # %entry
655 ; CHECK-NEXT: fcmpu 0, 1, 2
656 ; CHECK-NEXT: bc 4, 2, .LBB21_3
657 ; CHECK-NEXT: .LBB21_2: # %entry
658 ; CHECK-NEXT: fmr 5, 6
659 ; CHECK-NEXT: .LBB21_3: # %entry
660 ; CHECK-NEXT: fmr 1, 5
661 ; CHECK-NEXT: blr
662 ;
663 ; CHECK-NO-ISEL-LABEL: testfloatult:
664 ; CHECK-NO-ISEL: # %bb.0: # %entry
665 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
666 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB21_3
667 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
668 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
669 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB21_3
670 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
671 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
672 ; CHECK-NO-ISEL-NEXT: blr
673 ; CHECK-NO-ISEL-NEXT: .LBB21_3: # %entry
674 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
675 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
676 ; CHECK-NO-ISEL-NEXT: blr
677 entry:
678 %cmp1 = fcmp oeq float %c3, %c4
679 %cmp3tmp = fcmp oeq float %c1, %c2
680 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
681 %cond = select i1 %cmp3, float %a1, float %a2
682 ret float %cond
684 }
686 define float @testfloatsle(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
687 ; CHECK-LABEL: testfloatsle:
688 ; CHECK: # %bb.0: # %entry
689 ; CHECK-NEXT: fcmpu 0, 3, 4
690 ; CHECK-NEXT: bc 4, 2, .LBB22_3
691 ; CHECK-NEXT: # %bb.1: # %entry
692 ; CHECK-NEXT: fcmpu 0, 1, 2
693 ; CHECK-NEXT: bc 12, 2, .LBB22_3
694 ; CHECK-NEXT: # %bb.2: # %entry
695 ; CHECK-NEXT: fmr 5, 6
696 ; CHECK-NEXT: .LBB22_3: # %entry
697 ; CHECK-NEXT: fmr 1, 5
698 ; CHECK-NEXT: blr
699 ;
700 ; CHECK-NO-ISEL-LABEL: testfloatsle:
701 ; CHECK-NO-ISEL: # %bb.0: # %entry
702 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
703 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB22_3
704 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
705 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
706 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB22_3
707 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
708 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
709 ; CHECK-NO-ISEL-NEXT: .LBB22_3: # %entry
710 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
711 ; CHECK-NO-ISEL-NEXT: blr
712 entry:
713 %cmp1 = fcmp oeq float %c3, %c4
714 %cmp3tmp = fcmp oeq float %c1, %c2
715 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
716 %cond = select i1 %cmp3, float %a1, float %a2
717 ret float %cond
719 }
721 define float @testfloatule(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
722 ; CHECK-LABEL: testfloatule:
723 ; CHECK: # %bb.0: # %entry
724 ; CHECK-NEXT: fcmpu 0, 3, 4
725 ; CHECK-NEXT: bc 12, 2, .LBB23_3
726 ; CHECK-NEXT: # %bb.1: # %entry
727 ; CHECK-NEXT: fcmpu 0, 1, 2
728 ; CHECK-NEXT: bc 4, 2, .LBB23_3
729 ; CHECK-NEXT: # %bb.2: # %entry
730 ; CHECK-NEXT: fmr 5, 6
731 ; CHECK-NEXT: .LBB23_3: # %entry
732 ; CHECK-NEXT: fmr 1, 5
733 ; CHECK-NEXT: blr
734 ;
735 ; CHECK-NO-ISEL-LABEL: testfloatule:
736 ; CHECK-NO-ISEL: # %bb.0: # %entry
737 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
738 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB23_3
739 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
740 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
741 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB23_3
742 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
743 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
744 ; CHECK-NO-ISEL-NEXT: .LBB23_3: # %entry
745 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
746 ; CHECK-NO-ISEL-NEXT: blr
747 entry:
748 %cmp1 = fcmp oeq float %c3, %c4
749 %cmp3tmp = fcmp oeq float %c1, %c2
750 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
751 %cond = select i1 %cmp3, float %a1, float %a2
752 ret float %cond
754 }
756 define float @testfloateq(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
757 ; CHECK-LABEL: testfloateq:
758 ; CHECK: # %bb.0: # %entry
759 ; CHECK-NEXT: fcmpu 0, 3, 4
760 ; CHECK-NEXT: fcmpu 1, 1, 2
761 ; CHECK-NEXT: creqv 20, 6, 2
762 ; CHECK-NEXT: bc 12, 20, .LBB24_2
763 ; CHECK-NEXT: # %bb.1: # %entry
764 ; CHECK-NEXT: fmr 5, 6
765 ; CHECK-NEXT: .LBB24_2: # %entry
766 ; CHECK-NEXT: fmr 1, 5
767 ; CHECK-NEXT: blr
768 ;
769 ; CHECK-NO-ISEL-LABEL: testfloateq:
770 ; CHECK-NO-ISEL: # %bb.0: # %entry
771 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
772 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
773 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
774 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB24_2
775 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
776 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
777 ; CHECK-NO-ISEL-NEXT: .LBB24_2: # %entry
778 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
779 ; CHECK-NO-ISEL-NEXT: blr
780 entry:
781 %cmp1 = fcmp oeq float %c3, %c4
782 %cmp3tmp = fcmp oeq float %c1, %c2
783 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
784 %cond = select i1 %cmp3, float %a1, float %a2
785 ret float %cond
787 }
789 define float @testfloatsge(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
790 ; CHECK-LABEL: testfloatsge:
791 ; CHECK: # %bb.0: # %entry
792 ; CHECK-NEXT: fcmpu 0, 3, 4
793 ; CHECK-NEXT: bc 12, 2, .LBB25_3
794 ; CHECK-NEXT: # %bb.1: # %entry
795 ; CHECK-NEXT: fcmpu 0, 1, 2
796 ; CHECK-NEXT: bc 4, 2, .LBB25_3
797 ; CHECK-NEXT: # %bb.2: # %entry
798 ; CHECK-NEXT: fmr 5, 6
799 ; CHECK-NEXT: .LBB25_3: # %entry
800 ; CHECK-NEXT: fmr 1, 5
801 ; CHECK-NEXT: blr
802 ;
803 ; CHECK-NO-ISEL-LABEL: testfloatsge:
804 ; CHECK-NO-ISEL: # %bb.0: # %entry
805 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
806 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB25_3
807 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
808 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
809 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB25_3
810 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
811 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
812 ; CHECK-NO-ISEL-NEXT: .LBB25_3: # %entry
813 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
814 ; CHECK-NO-ISEL-NEXT: blr
815 entry:
816 %cmp1 = fcmp oeq float %c3, %c4
817 %cmp3tmp = fcmp oeq float %c1, %c2
818 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
819 %cond = select i1 %cmp3, float %a1, float %a2
820 ret float %cond
822 }
824 define float @testfloatuge(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
825 ; CHECK-LABEL: testfloatuge:
826 ; CHECK: # %bb.0: # %entry
827 ; CHECK-NEXT: fcmpu 0, 3, 4
828 ; CHECK-NEXT: bc 4, 2, .LBB26_3
829 ; CHECK-NEXT: # %bb.1: # %entry
830 ; CHECK-NEXT: fcmpu 0, 1, 2
831 ; CHECK-NEXT: bc 12, 2, .LBB26_3
832 ; CHECK-NEXT: # %bb.2: # %entry
833 ; CHECK-NEXT: fmr 5, 6
834 ; CHECK-NEXT: .LBB26_3: # %entry
835 ; CHECK-NEXT: fmr 1, 5
836 ; CHECK-NEXT: blr
837 ;
838 ; CHECK-NO-ISEL-LABEL: testfloatuge:
839 ; CHECK-NO-ISEL: # %bb.0: # %entry
840 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
841 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB26_3
842 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
843 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
844 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB26_3
845 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
846 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
847 ; CHECK-NO-ISEL-NEXT: .LBB26_3: # %entry
848 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
849 ; CHECK-NO-ISEL-NEXT: blr
850 entry:
851 %cmp1 = fcmp oeq float %c3, %c4
852 %cmp3tmp = fcmp oeq float %c1, %c2
853 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
854 %cond = select i1 %cmp3, float %a1, float %a2
855 ret float %cond
857 }
859 define float @testfloatsgt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
860 ; CHECK-LABEL: testfloatsgt:
861 ; CHECK: # %bb.0: # %entry
862 ; CHECK-NEXT: fcmpu 0, 3, 4
863 ; CHECK-NEXT: bc 4, 2, .LBB27_2
864 ; CHECK-NEXT: # %bb.1: # %entry
865 ; CHECK-NEXT: fcmpu 0, 1, 2
866 ; CHECK-NEXT: bc 4, 2, .LBB27_3
867 ; CHECK-NEXT: .LBB27_2: # %entry
868 ; CHECK-NEXT: fmr 5, 6
869 ; CHECK-NEXT: .LBB27_3: # %entry
870 ; CHECK-NEXT: fmr 1, 5
871 ; CHECK-NEXT: blr
872 ;
873 ; CHECK-NO-ISEL-LABEL: testfloatsgt:
874 ; CHECK-NO-ISEL: # %bb.0: # %entry
875 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
876 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB27_3
877 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
878 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
879 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB27_3
880 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
881 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
882 ; CHECK-NO-ISEL-NEXT: blr
883 ; CHECK-NO-ISEL-NEXT: .LBB27_3: # %entry
884 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
885 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
886 ; CHECK-NO-ISEL-NEXT: blr
887 entry:
888 %cmp1 = fcmp oeq float %c3, %c4
889 %cmp3tmp = fcmp oeq float %c1, %c2
890 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
891 %cond = select i1 %cmp3, float %a1, float %a2
892 ret float %cond
894 }
896 define float @testfloatugt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
897 ; CHECK-LABEL: testfloatugt:
898 ; CHECK: # %bb.0: # %entry
899 ; CHECK-NEXT: fcmpu 0, 3, 4
900 ; CHECK-NEXT: bc 12, 2, .LBB28_2
901 ; CHECK-NEXT: # %bb.1: # %entry
902 ; CHECK-NEXT: fcmpu 0, 1, 2
903 ; CHECK-NEXT: bc 12, 2, .LBB28_3
904 ; CHECK-NEXT: .LBB28_2: # %entry
905 ; CHECK-NEXT: fmr 5, 6
906 ; CHECK-NEXT: .LBB28_3: # %entry
907 ; CHECK-NEXT: fmr 1, 5
908 ; CHECK-NEXT: blr
909 ;
910 ; CHECK-NO-ISEL-LABEL: testfloatugt:
911 ; CHECK-NO-ISEL: # %bb.0: # %entry
912 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
913 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB28_3
914 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
915 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
916 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB28_3
917 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
918 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
919 ; CHECK-NO-ISEL-NEXT: blr
920 ; CHECK-NO-ISEL-NEXT: .LBB28_3: # %entry
921 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
922 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
923 ; CHECK-NO-ISEL-NEXT: blr
924 entry:
925 %cmp1 = fcmp oeq float %c3, %c4
926 %cmp3tmp = fcmp oeq float %c1, %c2
927 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
928 %cond = select i1 %cmp3, float %a1, float %a2
929 ret float %cond
931 }
933 define float @testfloatne(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) #0 {
934 ; CHECK-LABEL: testfloatne:
935 ; CHECK: # %bb.0: # %entry
936 ; CHECK-NEXT: fcmpu 0, 3, 4
937 ; CHECK-NEXT: fcmpu 1, 1, 2
938 ; CHECK-NEXT: crxor 20, 6, 2
939 ; CHECK-NEXT: bc 12, 20, .LBB29_2
940 ; CHECK-NEXT: # %bb.1: # %entry
941 ; CHECK-NEXT: fmr 5, 6
942 ; CHECK-NEXT: .LBB29_2: # %entry
943 ; CHECK-NEXT: fmr 1, 5
944 ; CHECK-NEXT: blr
945 ;
946 ; CHECK-NO-ISEL-LABEL: testfloatne:
947 ; CHECK-NO-ISEL: # %bb.0: # %entry
948 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
949 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
950 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
951 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB29_2
952 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
953 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
954 ; CHECK-NO-ISEL-NEXT: .LBB29_2: # %entry
955 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
956 ; CHECK-NO-ISEL-NEXT: blr
957 entry:
958 %cmp1 = fcmp oeq float %c3, %c4
959 %cmp3tmp = fcmp oeq float %c1, %c2
960 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
961 %cond = select i1 %cmp3, float %a1, float %a2
962 ret float %cond
964 }
966 define double @testdoubleslt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
967 ; CHECK-LABEL: testdoubleslt:
968 ; CHECK: # %bb.0: # %entry
969 ; CHECK-NEXT: fcmpu 0, 3, 4
970 ; CHECK-NEXT: bc 12, 2, .LBB30_2
971 ; CHECK-NEXT: # %bb.1: # %entry
972 ; CHECK-NEXT: fcmpu 0, 1, 2
973 ; CHECK-NEXT: bc 12, 2, .LBB30_3
974 ; CHECK-NEXT: .LBB30_2: # %entry
975 ; CHECK-NEXT: fmr 5, 6
976 ; CHECK-NEXT: .LBB30_3: # %entry
977 ; CHECK-NEXT: fmr 1, 5
978 ; CHECK-NEXT: blr
979 ;
980 ; CHECK-NO-ISEL-LABEL: testdoubleslt:
981 ; CHECK-NO-ISEL: # %bb.0: # %entry
982 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
983 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB30_3
984 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
985 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
986 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB30_3
987 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
988 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
989 ; CHECK-NO-ISEL-NEXT: blr
990 ; CHECK-NO-ISEL-NEXT: .LBB30_3: # %entry
991 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
992 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
993 ; CHECK-NO-ISEL-NEXT: blr
994 entry:
995 %cmp1 = fcmp oeq double %c3, %c4
996 %cmp3tmp = fcmp oeq double %c1, %c2
997 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
998 %cond = select i1 %cmp3, double %a1, double %a2
999 ret double %cond
1001 }
1003 define double @testdoubleult(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1004 ; CHECK-LABEL: testdoubleult:
1005 ; CHECK: # %bb.0: # %entry
1006 ; CHECK-NEXT: fcmpu 0, 3, 4
1007 ; CHECK-NEXT: bc 4, 2, .LBB31_2
1008 ; CHECK-NEXT: # %bb.1: # %entry
1009 ; CHECK-NEXT: fcmpu 0, 1, 2
1010 ; CHECK-NEXT: bc 4, 2, .LBB31_3
1011 ; CHECK-NEXT: .LBB31_2: # %entry
1012 ; CHECK-NEXT: fmr 5, 6
1013 ; CHECK-NEXT: .LBB31_3: # %entry
1014 ; CHECK-NEXT: fmr 1, 5
1015 ; CHECK-NEXT: blr
1016 ;
1017 ; CHECK-NO-ISEL-LABEL: testdoubleult:
1018 ; CHECK-NO-ISEL: # %bb.0: # %entry
1019 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1020 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB31_3
1021 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1022 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1023 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB31_3
1024 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1025 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1026 ; CHECK-NO-ISEL-NEXT: blr
1027 ; CHECK-NO-ISEL-NEXT: .LBB31_3: # %entry
1028 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1029 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1030 ; CHECK-NO-ISEL-NEXT: blr
1031 entry:
1032 %cmp1 = fcmp oeq double %c3, %c4
1033 %cmp3tmp = fcmp oeq double %c1, %c2
1034 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1035 %cond = select i1 %cmp3, double %a1, double %a2
1036 ret double %cond
1038 }
1040 define double @testdoublesle(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1041 ; CHECK-LABEL: testdoublesle:
1042 ; CHECK: # %bb.0: # %entry
1043 ; CHECK-NEXT: fcmpu 0, 3, 4
1044 ; CHECK-NEXT: bc 4, 2, .LBB32_3
1045 ; CHECK-NEXT: # %bb.1: # %entry
1046 ; CHECK-NEXT: fcmpu 0, 1, 2
1047 ; CHECK-NEXT: bc 12, 2, .LBB32_3
1048 ; CHECK-NEXT: # %bb.2: # %entry
1049 ; CHECK-NEXT: fmr 5, 6
1050 ; CHECK-NEXT: .LBB32_3: # %entry
1051 ; CHECK-NEXT: fmr 1, 5
1052 ; CHECK-NEXT: blr
1053 ;
1054 ; CHECK-NO-ISEL-LABEL: testdoublesle:
1055 ; CHECK-NO-ISEL: # %bb.0: # %entry
1056 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1057 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB32_3
1058 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1059 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1060 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB32_3
1061 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1062 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1063 ; CHECK-NO-ISEL-NEXT: .LBB32_3: # %entry
1064 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1065 ; CHECK-NO-ISEL-NEXT: blr
1066 entry:
1067 %cmp1 = fcmp oeq double %c3, %c4
1068 %cmp3tmp = fcmp oeq double %c1, %c2
1069 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1070 %cond = select i1 %cmp3, double %a1, double %a2
1071 ret double %cond
1073 }
1075 define double @testdoubleule(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1076 ; CHECK-LABEL: testdoubleule:
1077 ; CHECK: # %bb.0: # %entry
1078 ; CHECK-NEXT: fcmpu 0, 3, 4
1079 ; CHECK-NEXT: bc 12, 2, .LBB33_3
1080 ; CHECK-NEXT: # %bb.1: # %entry
1081 ; CHECK-NEXT: fcmpu 0, 1, 2
1082 ; CHECK-NEXT: bc 4, 2, .LBB33_3
1083 ; CHECK-NEXT: # %bb.2: # %entry
1084 ; CHECK-NEXT: fmr 5, 6
1085 ; CHECK-NEXT: .LBB33_3: # %entry
1086 ; CHECK-NEXT: fmr 1, 5
1087 ; CHECK-NEXT: blr
1088 ;
1089 ; CHECK-NO-ISEL-LABEL: testdoubleule:
1090 ; CHECK-NO-ISEL: # %bb.0: # %entry
1091 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1092 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB33_3
1093 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1094 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1095 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB33_3
1096 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1097 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1098 ; CHECK-NO-ISEL-NEXT: .LBB33_3: # %entry
1099 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1100 ; CHECK-NO-ISEL-NEXT: blr
1101 entry:
1102 %cmp1 = fcmp oeq double %c3, %c4
1103 %cmp3tmp = fcmp oeq double %c1, %c2
1104 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1105 %cond = select i1 %cmp3, double %a1, double %a2
1106 ret double %cond
1108 }
1110 define double @testdoubleeq(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1111 ; CHECK-LABEL: testdoubleeq:
1112 ; CHECK: # %bb.0: # %entry
1113 ; CHECK-NEXT: fcmpu 0, 3, 4
1114 ; CHECK-NEXT: fcmpu 1, 1, 2
1115 ; CHECK-NEXT: creqv 20, 6, 2
1116 ; CHECK-NEXT: bc 12, 20, .LBB34_2
1117 ; CHECK-NEXT: # %bb.1: # %entry
1118 ; CHECK-NEXT: fmr 5, 6
1119 ; CHECK-NEXT: .LBB34_2: # %entry
1120 ; CHECK-NEXT: fmr 1, 5
1121 ; CHECK-NEXT: blr
1122 ;
1123 ; CHECK-NO-ISEL-LABEL: testdoubleeq:
1124 ; CHECK-NO-ISEL: # %bb.0: # %entry
1125 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1126 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1127 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
1128 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB34_2
1129 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1130 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1131 ; CHECK-NO-ISEL-NEXT: .LBB34_2: # %entry
1132 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1133 ; CHECK-NO-ISEL-NEXT: blr
1134 entry:
1135 %cmp1 = fcmp oeq double %c3, %c4
1136 %cmp3tmp = fcmp oeq double %c1, %c2
1137 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1138 %cond = select i1 %cmp3, double %a1, double %a2
1139 ret double %cond
1141 }
1143 define double @testdoublesge(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1144 ; CHECK-LABEL: testdoublesge:
1145 ; CHECK: # %bb.0: # %entry
1146 ; CHECK-NEXT: fcmpu 0, 3, 4
1147 ; CHECK-NEXT: bc 12, 2, .LBB35_3
1148 ; CHECK-NEXT: # %bb.1: # %entry
1149 ; CHECK-NEXT: fcmpu 0, 1, 2
1150 ; CHECK-NEXT: bc 4, 2, .LBB35_3
1151 ; CHECK-NEXT: # %bb.2: # %entry
1152 ; CHECK-NEXT: fmr 5, 6
1153 ; CHECK-NEXT: .LBB35_3: # %entry
1154 ; CHECK-NEXT: fmr 1, 5
1155 ; CHECK-NEXT: blr
1156 ;
1157 ; CHECK-NO-ISEL-LABEL: testdoublesge:
1158 ; CHECK-NO-ISEL: # %bb.0: # %entry
1159 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1160 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB35_3
1161 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1162 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1163 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB35_3
1164 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1165 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1166 ; CHECK-NO-ISEL-NEXT: .LBB35_3: # %entry
1167 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1168 ; CHECK-NO-ISEL-NEXT: blr
1169 entry:
1170 %cmp1 = fcmp oeq double %c3, %c4
1171 %cmp3tmp = fcmp oeq double %c1, %c2
1172 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1173 %cond = select i1 %cmp3, double %a1, double %a2
1174 ret double %cond
1176 }
1178 define double @testdoubleuge(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1179 ; CHECK-LABEL: testdoubleuge:
1180 ; CHECK: # %bb.0: # %entry
1181 ; CHECK-NEXT: fcmpu 0, 3, 4
1182 ; CHECK-NEXT: bc 4, 2, .LBB36_3
1183 ; CHECK-NEXT: # %bb.1: # %entry
1184 ; CHECK-NEXT: fcmpu 0, 1, 2
1185 ; CHECK-NEXT: bc 12, 2, .LBB36_3
1186 ; CHECK-NEXT: # %bb.2: # %entry
1187 ; CHECK-NEXT: fmr 5, 6
1188 ; CHECK-NEXT: .LBB36_3: # %entry
1189 ; CHECK-NEXT: fmr 1, 5
1190 ; CHECK-NEXT: blr
1191 ;
1192 ; CHECK-NO-ISEL-LABEL: testdoubleuge:
1193 ; CHECK-NO-ISEL: # %bb.0: # %entry
1194 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1195 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB36_3
1196 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1197 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1198 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB36_3
1199 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1200 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1201 ; CHECK-NO-ISEL-NEXT: .LBB36_3: # %entry
1202 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1203 ; CHECK-NO-ISEL-NEXT: blr
1204 entry:
1205 %cmp1 = fcmp oeq double %c3, %c4
1206 %cmp3tmp = fcmp oeq double %c1, %c2
1207 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1208 %cond = select i1 %cmp3, double %a1, double %a2
1209 ret double %cond
1211 }
1213 define double @testdoublesgt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1214 ; CHECK-LABEL: testdoublesgt:
1215 ; CHECK: # %bb.0: # %entry
1216 ; CHECK-NEXT: fcmpu 0, 3, 4
1217 ; CHECK-NEXT: bc 4, 2, .LBB37_2
1218 ; CHECK-NEXT: # %bb.1: # %entry
1219 ; CHECK-NEXT: fcmpu 0, 1, 2
1220 ; CHECK-NEXT: bc 4, 2, .LBB37_3
1221 ; CHECK-NEXT: .LBB37_2: # %entry
1222 ; CHECK-NEXT: fmr 5, 6
1223 ; CHECK-NEXT: .LBB37_3: # %entry
1224 ; CHECK-NEXT: fmr 1, 5
1225 ; CHECK-NEXT: blr
1226 ;
1227 ; CHECK-NO-ISEL-LABEL: testdoublesgt:
1228 ; CHECK-NO-ISEL: # %bb.0: # %entry
1229 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1230 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB37_3
1231 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1232 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1233 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB37_3
1234 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1235 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1236 ; CHECK-NO-ISEL-NEXT: blr
1237 ; CHECK-NO-ISEL-NEXT: .LBB37_3: # %entry
1238 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1239 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1240 ; CHECK-NO-ISEL-NEXT: blr
1241 entry:
1242 %cmp1 = fcmp oeq double %c3, %c4
1243 %cmp3tmp = fcmp oeq double %c1, %c2
1244 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1245 %cond = select i1 %cmp3, double %a1, double %a2
1246 ret double %cond
1248 }
1250 define double @testdoubleugt(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1251 ; CHECK-LABEL: testdoubleugt:
1252 ; CHECK: # %bb.0: # %entry
1253 ; CHECK-NEXT: fcmpu 0, 3, 4
1254 ; CHECK-NEXT: bc 12, 2, .LBB38_2
1255 ; CHECK-NEXT: # %bb.1: # %entry
1256 ; CHECK-NEXT: fcmpu 0, 1, 2
1257 ; CHECK-NEXT: bc 12, 2, .LBB38_3
1258 ; CHECK-NEXT: .LBB38_2: # %entry
1259 ; CHECK-NEXT: fmr 5, 6
1260 ; CHECK-NEXT: .LBB38_3: # %entry
1261 ; CHECK-NEXT: fmr 1, 5
1262 ; CHECK-NEXT: blr
1263 ;
1264 ; CHECK-NO-ISEL-LABEL: testdoubleugt:
1265 ; CHECK-NO-ISEL: # %bb.0: # %entry
1266 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1267 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB38_3
1268 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1269 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1270 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB38_3
1271 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry
1272 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1273 ; CHECK-NO-ISEL-NEXT: blr
1274 ; CHECK-NO-ISEL-NEXT: .LBB38_3: # %entry
1275 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1276 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1277 ; CHECK-NO-ISEL-NEXT: blr
1278 entry:
1279 %cmp1 = fcmp oeq double %c3, %c4
1280 %cmp3tmp = fcmp oeq double %c1, %c2
1281 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1282 %cond = select i1 %cmp3, double %a1, double %a2
1283 ret double %cond
1285 }
1287 define double @testdoublene(double %c1, double %c2, double %c3, double %c4, double %a1, double %a2) #0 {
1288 ; CHECK-LABEL: testdoublene:
1289 ; CHECK: # %bb.0: # %entry
1290 ; CHECK-NEXT: fcmpu 0, 3, 4
1291 ; CHECK-NEXT: fcmpu 1, 1, 2
1292 ; CHECK-NEXT: crxor 20, 6, 2
1293 ; CHECK-NEXT: bc 12, 20, .LBB39_2
1294 ; CHECK-NEXT: # %bb.1: # %entry
1295 ; CHECK-NEXT: fmr 5, 6
1296 ; CHECK-NEXT: .LBB39_2: # %entry
1297 ; CHECK-NEXT: fmr 1, 5
1298 ; CHECK-NEXT: blr
1299 ;
1300 ; CHECK-NO-ISEL-LABEL: testdoublene:
1301 ; CHECK-NO-ISEL: # %bb.0: # %entry
1302 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1303 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1304 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
1305 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB39_2
1306 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1307 ; CHECK-NO-ISEL-NEXT: fmr 5, 6
1308 ; CHECK-NO-ISEL-NEXT: .LBB39_2: # %entry
1309 ; CHECK-NO-ISEL-NEXT: fmr 1, 5
1310 ; CHECK-NO-ISEL-NEXT: blr
1311 entry:
1312 %cmp1 = fcmp oeq double %c3, %c4
1313 %cmp3tmp = fcmp oeq double %c1, %c2
1314 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1315 %cond = select i1 %cmp3, double %a1, double %a2
1316 ret double %cond
1318 }
1320 define <4 x float> @testv4floatslt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1321 ; CHECK-LABEL: testv4floatslt:
1322 ; CHECK: # %bb.0: # %entry
1323 ; CHECK-NEXT: fcmpu 0, 3, 4
1324 ; CHECK-NEXT: bc 12, 2, .LBB40_2
1325 ; CHECK-NEXT: # %bb.1: # %entry
1326 ; CHECK-NEXT: fcmpu 0, 1, 2
1327 ; CHECK-NEXT: bclr 12, 2, 0
1328 ; CHECK-NEXT: .LBB40_2: # %select.false
1329 ; CHECK-NEXT: vmr 2, 3
1330 ; CHECK-NEXT: blr
1331 ;
1332 ; CHECK-NO-ISEL-LABEL: testv4floatslt:
1333 ; CHECK-NO-ISEL: # %bb.0: # %entry
1334 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1335 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB40_2
1336 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1337 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1338 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1339 ; CHECK-NO-ISEL-NEXT: .LBB40_2: # %select.false
1340 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1341 ; CHECK-NO-ISEL-NEXT: blr
1342 entry:
1343 %cmp1 = fcmp oeq float %c3, %c4
1344 %cmp3tmp = fcmp oeq float %c1, %c2
1345 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
1346 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1347 ret <4 x float> %cond
1349 }
1351 define <4 x float> @testv4floatult(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1352 ; CHECK-LABEL: testv4floatult:
1353 ; CHECK: # %bb.0: # %entry
1354 ; CHECK-NEXT: fcmpu 0, 3, 4
1355 ; CHECK-NEXT: bc 4, 2, .LBB41_2
1356 ; CHECK-NEXT: # %bb.1: # %entry
1357 ; CHECK-NEXT: fcmpu 0, 1, 2
1358 ; CHECK-NEXT: bclr 4, 2, 0
1359 ; CHECK-NEXT: .LBB41_2: # %select.false
1360 ; CHECK-NEXT: vmr 2, 3
1361 ; CHECK-NEXT: blr
1362 ;
1363 ; CHECK-NO-ISEL-LABEL: testv4floatult:
1364 ; CHECK-NO-ISEL: # %bb.0: # %entry
1365 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1366 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB41_2
1367 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1368 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1369 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1370 ; CHECK-NO-ISEL-NEXT: .LBB41_2: # %select.false
1371 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1372 ; CHECK-NO-ISEL-NEXT: blr
1373 entry:
1374 %cmp1 = fcmp oeq float %c3, %c4
1375 %cmp3tmp = fcmp oeq float %c1, %c2
1376 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1377 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1378 ret <4 x float> %cond
1380 }
1382 define <4 x float> @testv4floatsle(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1383 ; CHECK-LABEL: testv4floatsle:
1384 ; CHECK: # %bb.0: # %entry
1385 ; CHECK-NEXT: fcmpu 0, 3, 4
1386 ; CHECK-NEXT: bclr 4, 2, 0
1387 ; CHECK-NEXT: # %bb.1: # %entry
1388 ; CHECK-NEXT: fcmpu 0, 1, 2
1389 ; CHECK-NEXT: bclr 12, 2, 0
1390 ; CHECK-NEXT: # %bb.2: # %select.false
1391 ; CHECK-NEXT: vmr 2, 3
1392 ; CHECK-NEXT: blr
1393 ;
1394 ; CHECK-NO-ISEL-LABEL: testv4floatsle:
1395 ; CHECK-NO-ISEL: # %bb.0: # %entry
1396 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1397 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1398 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1399 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1400 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1401 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1402 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1403 ; CHECK-NO-ISEL-NEXT: blr
1404 entry:
1405 %cmp1 = fcmp oeq float %c3, %c4
1406 %cmp3tmp = fcmp oeq float %c1, %c2
1407 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1408 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1409 ret <4 x float> %cond
1411 }
1413 define <4 x float> @testv4floatule(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1414 ; CHECK-LABEL: testv4floatule:
1415 ; CHECK: # %bb.0: # %entry
1416 ; CHECK-NEXT: fcmpu 0, 3, 4
1417 ; CHECK-NEXT: bclr 12, 2, 0
1418 ; CHECK-NEXT: # %bb.1: # %entry
1419 ; CHECK-NEXT: fcmpu 0, 1, 2
1420 ; CHECK-NEXT: bclr 4, 2, 0
1421 ; CHECK-NEXT: # %bb.2: # %select.false
1422 ; CHECK-NEXT: vmr 2, 3
1423 ; CHECK-NEXT: blr
1424 ;
1425 ; CHECK-NO-ISEL-LABEL: testv4floatule:
1426 ; CHECK-NO-ISEL: # %bb.0: # %entry
1427 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1428 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1429 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1430 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1431 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1432 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1433 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1434 ; CHECK-NO-ISEL-NEXT: blr
1435 entry:
1436 %cmp1 = fcmp oeq float %c3, %c4
1437 %cmp3tmp = fcmp oeq float %c1, %c2
1438 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1439 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1440 ret <4 x float> %cond
1442 }
1444 define <4 x float> @testv4floateq(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1445 ; CHECK-LABEL: testv4floateq:
1446 ; CHECK: # %bb.0: # %entry
1447 ; CHECK-NEXT: fcmpu 0, 3, 4
1448 ; CHECK-NEXT: fcmpu 1, 1, 2
1449 ; CHECK-NEXT: creqv 20, 6, 2
1450 ; CHECK-NEXT: bclr 12, 20, 0
1451 ; CHECK-NEXT: # %bb.1: # %select.false
1452 ; CHECK-NEXT: vmr 2, 3
1453 ; CHECK-NEXT: blr
1454 ;
1455 ; CHECK-NO-ISEL-LABEL: testv4floateq:
1456 ; CHECK-NO-ISEL: # %bb.0: # %entry
1457 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1458 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1459 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
1460 ; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0
1461 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %select.false
1462 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1463 ; CHECK-NO-ISEL-NEXT: blr
1464 entry:
1465 %cmp1 = fcmp oeq float %c3, %c4
1466 %cmp3tmp = fcmp oeq float %c1, %c2
1467 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1468 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1469 ret <4 x float> %cond
1471 }
1473 define <4 x float> @testv4floatsge(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1474 ; CHECK-LABEL: testv4floatsge:
1475 ; CHECK: # %bb.0: # %entry
1476 ; CHECK-NEXT: fcmpu 0, 3, 4
1477 ; CHECK-NEXT: bclr 12, 2, 0
1478 ; CHECK-NEXT: # %bb.1: # %entry
1479 ; CHECK-NEXT: fcmpu 0, 1, 2
1480 ; CHECK-NEXT: bclr 4, 2, 0
1481 ; CHECK-NEXT: # %bb.2: # %select.false
1482 ; CHECK-NEXT: vmr 2, 3
1483 ; CHECK-NEXT: blr
1484 ;
1485 ; CHECK-NO-ISEL-LABEL: testv4floatsge:
1486 ; CHECK-NO-ISEL: # %bb.0: # %entry
1487 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1488 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1489 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1490 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1491 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1492 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1493 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1494 ; CHECK-NO-ISEL-NEXT: blr
1495 entry:
1496 %cmp1 = fcmp oeq float %c3, %c4
1497 %cmp3tmp = fcmp oeq float %c1, %c2
1498 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1499 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1500 ret <4 x float> %cond
1502 }
1504 define <4 x float> @testv4floatuge(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1505 ; CHECK-LABEL: testv4floatuge:
1506 ; CHECK: # %bb.0: # %entry
1507 ; CHECK-NEXT: fcmpu 0, 3, 4
1508 ; CHECK-NEXT: bclr 4, 2, 0
1509 ; CHECK-NEXT: # %bb.1: # %entry
1510 ; CHECK-NEXT: fcmpu 0, 1, 2
1511 ; CHECK-NEXT: bclr 12, 2, 0
1512 ; CHECK-NEXT: # %bb.2: # %select.false
1513 ; CHECK-NEXT: vmr 2, 3
1514 ; CHECK-NEXT: blr
1515 ;
1516 ; CHECK-NO-ISEL-LABEL: testv4floatuge:
1517 ; CHECK-NO-ISEL: # %bb.0: # %entry
1518 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1519 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1520 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1521 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1522 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1523 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1524 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1525 ; CHECK-NO-ISEL-NEXT: blr
1526 entry:
1527 %cmp1 = fcmp oeq float %c3, %c4
1528 %cmp3tmp = fcmp oeq float %c1, %c2
1529 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1530 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1531 ret <4 x float> %cond
1533 }
1535 define <4 x float> @testv4floatsgt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1536 ; CHECK-LABEL: testv4floatsgt:
1537 ; CHECK: # %bb.0: # %entry
1538 ; CHECK-NEXT: fcmpu 0, 3, 4
1539 ; CHECK-NEXT: bc 4, 2, .LBB47_2
1540 ; CHECK-NEXT: # %bb.1: # %entry
1541 ; CHECK-NEXT: fcmpu 0, 1, 2
1542 ; CHECK-NEXT: bclr 4, 2, 0
1543 ; CHECK-NEXT: .LBB47_2: # %select.false
1544 ; CHECK-NEXT: vmr 2, 3
1545 ; CHECK-NEXT: blr
1546 ;
1547 ; CHECK-NO-ISEL-LABEL: testv4floatsgt:
1548 ; CHECK-NO-ISEL: # %bb.0: # %entry
1549 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1550 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB47_2
1551 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1552 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1553 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1554 ; CHECK-NO-ISEL-NEXT: .LBB47_2: # %select.false
1555 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1556 ; CHECK-NO-ISEL-NEXT: blr
1557 entry:
1558 %cmp1 = fcmp oeq float %c3, %c4
1559 %cmp3tmp = fcmp oeq float %c1, %c2
1560 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1561 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1562 ret <4 x float> %cond
1564 }
1566 define <4 x float> @testv4floatugt(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1567 ; CHECK-LABEL: testv4floatugt:
1568 ; CHECK: # %bb.0: # %entry
1569 ; CHECK-NEXT: fcmpu 0, 3, 4
1570 ; CHECK-NEXT: bc 12, 2, .LBB48_2
1571 ; CHECK-NEXT: # %bb.1: # %entry
1572 ; CHECK-NEXT: fcmpu 0, 1, 2
1573 ; CHECK-NEXT: bclr 12, 2, 0
1574 ; CHECK-NEXT: .LBB48_2: # %select.false
1575 ; CHECK-NEXT: vmr 2, 3
1576 ; CHECK-NEXT: blr
1577 ;
1578 ; CHECK-NO-ISEL-LABEL: testv4floatugt:
1579 ; CHECK-NO-ISEL: # %bb.0: # %entry
1580 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1581 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB48_2
1582 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1583 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1584 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1585 ; CHECK-NO-ISEL-NEXT: .LBB48_2: # %select.false
1586 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1587 ; CHECK-NO-ISEL-NEXT: blr
1588 entry:
1589 %cmp1 = fcmp oeq float %c3, %c4
1590 %cmp3tmp = fcmp oeq float %c1, %c2
1591 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1592 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1593 ret <4 x float> %cond
1595 }
1597 define <4 x float> @testv4floatne(float %c1, float %c2, float %c3, float %c4, <4 x float> %a1, <4 x float> %a2) #0 {
1598 ; CHECK-LABEL: testv4floatne:
1599 ; CHECK: # %bb.0: # %entry
1600 ; CHECK-NEXT: fcmpu 0, 3, 4
1601 ; CHECK-NEXT: fcmpu 1, 1, 2
1602 ; CHECK-NEXT: crxor 20, 6, 2
1603 ; CHECK-NEXT: bclr 12, 20, 0
1604 ; CHECK-NEXT: # %bb.1: # %select.false
1605 ; CHECK-NEXT: vmr 2, 3
1606 ; CHECK-NEXT: blr
1607 ;
1608 ; CHECK-NO-ISEL-LABEL: testv4floatne:
1609 ; CHECK-NO-ISEL: # %bb.0: # %entry
1610 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1611 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1612 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
1613 ; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0
1614 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %select.false
1615 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1616 ; CHECK-NO-ISEL-NEXT: blr
1617 entry:
1618 %cmp1 = fcmp oeq float %c3, %c4
1619 %cmp3tmp = fcmp oeq float %c1, %c2
1620 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1621 %cond = select i1 %cmp3, <4 x float> %a1, <4 x float> %a2
1622 ret <4 x float> %cond
1624 }
1626 define ppc_fp128 @testppc_fp128eq(ppc_fp128 %c1, ppc_fp128 %c2, ppc_fp128 %c3, ppc_fp128 %c4, ppc_fp128 %a1, ppc_fp128 %a2) #0 {
1627 ; CHECK-LABEL: testppc_fp128eq:
1628 ; CHECK: # %bb.0: # %entry
1629 ; CHECK-NEXT: fcmpu 0, 6, 8
1630 ; CHECK-NEXT: fcmpu 1, 5, 7
1631 ; CHECK-NEXT: crand 20, 6, 2
1632 ; CHECK-NEXT: fcmpu 0, 2, 4
1633 ; CHECK-NEXT: fcmpu 1, 1, 3
1634 ; CHECK-NEXT: crand 21, 6, 2
1635 ; CHECK-NEXT: crxor 20, 21, 20
1636 ; CHECK-NEXT: bc 12, 20, .LBB50_2
1637 ; CHECK-NEXT: # %bb.1: # %entry
1638 ; CHECK-NEXT: fmr 11, 9
1639 ; CHECK-NEXT: .LBB50_2: # %entry
1640 ; CHECK-NEXT: bc 12, 20, .LBB50_4
1641 ; CHECK-NEXT: # %bb.3: # %entry
1642 ; CHECK-NEXT: fmr 12, 10
1643 ; CHECK-NEXT: .LBB50_4: # %entry
1644 ; CHECK-NEXT: fmr 1, 11
1645 ; CHECK-NEXT: fmr 2, 12
1646 ; CHECK-NEXT: blr
1647 ;
1648 ; CHECK-NO-ISEL-LABEL: testppc_fp128eq:
1649 ; CHECK-NO-ISEL: # %bb.0: # %entry
1650 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 6, 8
1651 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 5, 7
1652 ; CHECK-NO-ISEL-NEXT: crand 20, 6, 2
1653 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 2, 4
1654 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 3
1655 ; CHECK-NO-ISEL-NEXT: crand 21, 6, 2
1656 ; CHECK-NO-ISEL-NEXT: crxor 20, 21, 20
1657 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB50_2
1658 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1659 ; CHECK-NO-ISEL-NEXT: fmr 11, 9
1660 ; CHECK-NO-ISEL-NEXT: .LBB50_2: # %entry
1661 ; CHECK-NO-ISEL-NEXT: bc 12, 20, .LBB50_4
1662 ; CHECK-NO-ISEL-NEXT: # %bb.3: # %entry
1663 ; CHECK-NO-ISEL-NEXT: fmr 12, 10
1664 ; CHECK-NO-ISEL-NEXT: .LBB50_4: # %entry
1665 ; CHECK-NO-ISEL-NEXT: fmr 1, 11
1666 ; CHECK-NO-ISEL-NEXT: fmr 2, 12
1667 ; CHECK-NO-ISEL-NEXT: blr
1668 entry:
1669 %cmp1 = fcmp oeq ppc_fp128 %c3, %c4
1670 %cmp3tmp = fcmp oeq ppc_fp128 %c1, %c2
1671 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1672 %cond = select i1 %cmp3, ppc_fp128 %a1, ppc_fp128 %a2
1673 ret ppc_fp128 %cond
1675 ; FIXME: Because of the way that the late SELECT_* pseudo-instruction expansion
1676 ; works, we end up with two blocks with the same predicate. These could be
1677 ; combined.
1679 }
1681 define <2 x double> @testv2doubleslt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1682 ; CHECK-LABEL: testv2doubleslt:
1683 ; CHECK: # %bb.0: # %entry
1684 ; CHECK-NEXT: fcmpu 0, 3, 4
1685 ; CHECK-NEXT: bc 12, 2, .LBB51_2
1686 ; CHECK-NEXT: # %bb.1: # %entry
1687 ; CHECK-NEXT: fcmpu 0, 1, 2
1688 ; CHECK-NEXT: bclr 12, 2, 0
1689 ; CHECK-NEXT: .LBB51_2: # %select.false
1690 ; CHECK-NEXT: vmr 2, 3
1691 ; CHECK-NEXT: blr
1692 ;
1693 ; CHECK-NO-ISEL-LABEL: testv2doubleslt:
1694 ; CHECK-NO-ISEL: # %bb.0: # %entry
1695 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1696 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB51_2
1697 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1698 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1699 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1700 ; CHECK-NO-ISEL-NEXT: .LBB51_2: # %select.false
1701 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1702 ; CHECK-NO-ISEL-NEXT: blr
1703 entry:
1704 %cmp1 = fcmp oeq float %c3, %c4
1705 %cmp3tmp = fcmp oeq float %c1, %c2
1706 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
1707 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1708 ret <2 x double> %cond
1710 }
1712 define <2 x double> @testv2doubleult(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1713 ; CHECK-LABEL: testv2doubleult:
1714 ; CHECK: # %bb.0: # %entry
1715 ; CHECK-NEXT: fcmpu 0, 3, 4
1716 ; CHECK-NEXT: bc 4, 2, .LBB52_2
1717 ; CHECK-NEXT: # %bb.1: # %entry
1718 ; CHECK-NEXT: fcmpu 0, 1, 2
1719 ; CHECK-NEXT: bclr 4, 2, 0
1720 ; CHECK-NEXT: .LBB52_2: # %select.false
1721 ; CHECK-NEXT: vmr 2, 3
1722 ; CHECK-NEXT: blr
1723 ;
1724 ; CHECK-NO-ISEL-LABEL: testv2doubleult:
1725 ; CHECK-NO-ISEL: # %bb.0: # %entry
1726 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1727 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB52_2
1728 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1729 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1730 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1731 ; CHECK-NO-ISEL-NEXT: .LBB52_2: # %select.false
1732 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1733 ; CHECK-NO-ISEL-NEXT: blr
1734 entry:
1735 %cmp1 = fcmp oeq float %c3, %c4
1736 %cmp3tmp = fcmp oeq float %c1, %c2
1737 %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
1738 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1739 ret <2 x double> %cond
1741 }
1743 define <2 x double> @testv2doublesle(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1744 ; CHECK-LABEL: testv2doublesle:
1745 ; CHECK: # %bb.0: # %entry
1746 ; CHECK-NEXT: fcmpu 0, 3, 4
1747 ; CHECK-NEXT: bclr 4, 2, 0
1748 ; CHECK-NEXT: # %bb.1: # %entry
1749 ; CHECK-NEXT: fcmpu 0, 1, 2
1750 ; CHECK-NEXT: bclr 12, 2, 0
1751 ; CHECK-NEXT: # %bb.2: # %select.false
1752 ; CHECK-NEXT: vmr 2, 3
1753 ; CHECK-NEXT: blr
1754 ;
1755 ; CHECK-NO-ISEL-LABEL: testv2doublesle:
1756 ; CHECK-NO-ISEL: # %bb.0: # %entry
1757 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1758 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1759 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1760 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1761 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1762 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1763 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1764 ; CHECK-NO-ISEL-NEXT: blr
1765 entry:
1766 %cmp1 = fcmp oeq float %c3, %c4
1767 %cmp3tmp = fcmp oeq float %c1, %c2
1768 %cmp3 = icmp sle i1 %cmp3tmp, %cmp1
1769 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1770 ret <2 x double> %cond
1772 }
1774 define <2 x double> @testv2doubleule(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1775 ; CHECK-LABEL: testv2doubleule:
1776 ; CHECK: # %bb.0: # %entry
1777 ; CHECK-NEXT: fcmpu 0, 3, 4
1778 ; CHECK-NEXT: bclr 12, 2, 0
1779 ; CHECK-NEXT: # %bb.1: # %entry
1780 ; CHECK-NEXT: fcmpu 0, 1, 2
1781 ; CHECK-NEXT: bclr 4, 2, 0
1782 ; CHECK-NEXT: # %bb.2: # %select.false
1783 ; CHECK-NEXT: vmr 2, 3
1784 ; CHECK-NEXT: blr
1785 ;
1786 ; CHECK-NO-ISEL-LABEL: testv2doubleule:
1787 ; CHECK-NO-ISEL: # %bb.0: # %entry
1788 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1789 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1790 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1791 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1792 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1793 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1794 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1795 ; CHECK-NO-ISEL-NEXT: blr
1796 entry:
1797 %cmp1 = fcmp oeq float %c3, %c4
1798 %cmp3tmp = fcmp oeq float %c1, %c2
1799 %cmp3 = icmp ule i1 %cmp3tmp, %cmp1
1800 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1801 ret <2 x double> %cond
1803 }
1805 define <2 x double> @testv2doubleeq(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1806 ; CHECK-LABEL: testv2doubleeq:
1807 ; CHECK: # %bb.0: # %entry
1808 ; CHECK-NEXT: fcmpu 0, 3, 4
1809 ; CHECK-NEXT: fcmpu 1, 1, 2
1810 ; CHECK-NEXT: creqv 20, 6, 2
1811 ; CHECK-NEXT: bclr 12, 20, 0
1812 ; CHECK-NEXT: # %bb.1: # %select.false
1813 ; CHECK-NEXT: vmr 2, 3
1814 ; CHECK-NEXT: blr
1815 ;
1816 ; CHECK-NO-ISEL-LABEL: testv2doubleeq:
1817 ; CHECK-NO-ISEL: # %bb.0: # %entry
1818 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1819 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1820 ; CHECK-NO-ISEL-NEXT: creqv 20, 6, 2
1821 ; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0
1822 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %select.false
1823 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1824 ; CHECK-NO-ISEL-NEXT: blr
1825 entry:
1826 %cmp1 = fcmp oeq float %c3, %c4
1827 %cmp3tmp = fcmp oeq float %c1, %c2
1828 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
1829 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1830 ret <2 x double> %cond
1832 }
1834 define <2 x double> @testv2doublesge(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1835 ; CHECK-LABEL: testv2doublesge:
1836 ; CHECK: # %bb.0: # %entry
1837 ; CHECK-NEXT: fcmpu 0, 3, 4
1838 ; CHECK-NEXT: bclr 12, 2, 0
1839 ; CHECK-NEXT: # %bb.1: # %entry
1840 ; CHECK-NEXT: fcmpu 0, 1, 2
1841 ; CHECK-NEXT: bclr 4, 2, 0
1842 ; CHECK-NEXT: # %bb.2: # %select.false
1843 ; CHECK-NEXT: vmr 2, 3
1844 ; CHECK-NEXT: blr
1845 ;
1846 ; CHECK-NO-ISEL-LABEL: testv2doublesge:
1847 ; CHECK-NO-ISEL: # %bb.0: # %entry
1848 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1849 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1850 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1851 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1852 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1853 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1854 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1855 ; CHECK-NO-ISEL-NEXT: blr
1856 entry:
1857 %cmp1 = fcmp oeq float %c3, %c4
1858 %cmp3tmp = fcmp oeq float %c1, %c2
1859 %cmp3 = icmp sge i1 %cmp3tmp, %cmp1
1860 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1861 ret <2 x double> %cond
1863 }
1865 define <2 x double> @testv2doubleuge(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1866 ; CHECK-LABEL: testv2doubleuge:
1867 ; CHECK: # %bb.0: # %entry
1868 ; CHECK-NEXT: fcmpu 0, 3, 4
1869 ; CHECK-NEXT: bclr 4, 2, 0
1870 ; CHECK-NEXT: # %bb.1: # %entry
1871 ; CHECK-NEXT: fcmpu 0, 1, 2
1872 ; CHECK-NEXT: bclr 12, 2, 0
1873 ; CHECK-NEXT: # %bb.2: # %select.false
1874 ; CHECK-NEXT: vmr 2, 3
1875 ; CHECK-NEXT: blr
1876 ;
1877 ; CHECK-NO-ISEL-LABEL: testv2doubleuge:
1878 ; CHECK-NO-ISEL: # %bb.0: # %entry
1879 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1880 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1881 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1882 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1883 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1884 ; CHECK-NO-ISEL-NEXT: # %bb.2: # %select.false
1885 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1886 ; CHECK-NO-ISEL-NEXT: blr
1887 entry:
1888 %cmp1 = fcmp oeq float %c3, %c4
1889 %cmp3tmp = fcmp oeq float %c1, %c2
1890 %cmp3 = icmp uge i1 %cmp3tmp, %cmp1
1891 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1892 ret <2 x double> %cond
1894 }
1896 define <2 x double> @testv2doublesgt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1897 ; CHECK-LABEL: testv2doublesgt:
1898 ; CHECK: # %bb.0: # %entry
1899 ; CHECK-NEXT: fcmpu 0, 3, 4
1900 ; CHECK-NEXT: bc 4, 2, .LBB58_2
1901 ; CHECK-NEXT: # %bb.1: # %entry
1902 ; CHECK-NEXT: fcmpu 0, 1, 2
1903 ; CHECK-NEXT: bclr 4, 2, 0
1904 ; CHECK-NEXT: .LBB58_2: # %select.false
1905 ; CHECK-NEXT: vmr 2, 3
1906 ; CHECK-NEXT: blr
1907 ;
1908 ; CHECK-NO-ISEL-LABEL: testv2doublesgt:
1909 ; CHECK-NO-ISEL: # %bb.0: # %entry
1910 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1911 ; CHECK-NO-ISEL-NEXT: bc 4, 2, .LBB58_2
1912 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1913 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1914 ; CHECK-NO-ISEL-NEXT: bclr 4, 2, 0
1915 ; CHECK-NO-ISEL-NEXT: .LBB58_2: # %select.false
1916 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1917 ; CHECK-NO-ISEL-NEXT: blr
1918 entry:
1919 %cmp1 = fcmp oeq float %c3, %c4
1920 %cmp3tmp = fcmp oeq float %c1, %c2
1921 %cmp3 = icmp sgt i1 %cmp3tmp, %cmp1
1922 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1923 ret <2 x double> %cond
1925 }
1927 define <2 x double> @testv2doubleugt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1928 ; CHECK-LABEL: testv2doubleugt:
1929 ; CHECK: # %bb.0: # %entry
1930 ; CHECK-NEXT: fcmpu 0, 3, 4
1931 ; CHECK-NEXT: bc 12, 2, .LBB59_2
1932 ; CHECK-NEXT: # %bb.1: # %entry
1933 ; CHECK-NEXT: fcmpu 0, 1, 2
1934 ; CHECK-NEXT: bclr 12, 2, 0
1935 ; CHECK-NEXT: .LBB59_2: # %select.false
1936 ; CHECK-NEXT: vmr 2, 3
1937 ; CHECK-NEXT: blr
1938 ;
1939 ; CHECK-NO-ISEL-LABEL: testv2doubleugt:
1940 ; CHECK-NO-ISEL: # %bb.0: # %entry
1941 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1942 ; CHECK-NO-ISEL-NEXT: bc 12, 2, .LBB59_2
1943 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
1944 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2
1945 ; CHECK-NO-ISEL-NEXT: bclr 12, 2, 0
1946 ; CHECK-NO-ISEL-NEXT: .LBB59_2: # %select.false
1947 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1948 ; CHECK-NO-ISEL-NEXT: blr
1949 entry:
1950 %cmp1 = fcmp oeq float %c3, %c4
1951 %cmp3tmp = fcmp oeq float %c1, %c2
1952 %cmp3 = icmp ugt i1 %cmp3tmp, %cmp1
1953 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1954 ret <2 x double> %cond
1956 }
1958 define <2 x double> @testv2doublene(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
1959 ; CHECK-LABEL: testv2doublene:
1960 ; CHECK: # %bb.0: # %entry
1961 ; CHECK-NEXT: fcmpu 0, 3, 4
1962 ; CHECK-NEXT: fcmpu 1, 1, 2
1963 ; CHECK-NEXT: crxor 20, 6, 2
1964 ; CHECK-NEXT: bclr 12, 20, 0
1965 ; CHECK-NEXT: # %bb.1: # %select.false
1966 ; CHECK-NEXT: vmr 2, 3
1967 ; CHECK-NEXT: blr
1968 ;
1969 ; CHECK-NO-ISEL-LABEL: testv2doublene:
1970 ; CHECK-NO-ISEL: # %bb.0: # %entry
1971 ; CHECK-NO-ISEL-NEXT: fcmpu 0, 3, 4
1972 ; CHECK-NO-ISEL-NEXT: fcmpu 1, 1, 2
1973 ; CHECK-NO-ISEL-NEXT: crxor 20, 6, 2
1974 ; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0
1975 ; CHECK-NO-ISEL-NEXT: # %bb.1: # %select.false
1976 ; CHECK-NO-ISEL-NEXT: vmr 2, 3
1977 ; CHECK-NO-ISEL-NEXT: blr
1978 entry:
1979 %cmp1 = fcmp oeq float %c3, %c4
1980 %cmp3tmp = fcmp oeq float %c1, %c2
1981 %cmp3 = icmp ne i1 %cmp3tmp, %cmp1
1982 %cond = select i1 %cmp3, <2 x double> %a1, <2 x double> %a2
1983 ret <2 x double> %cond
1985 }
1987 attributes #0 = { nounwind readnone "target-cpu"="pwr7" }