1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv32 -run-pass=instruction-select -simplify-mir \
3 # RUN: -verify-machineinstrs %s -o - | FileCheck %s
8 tracksRegLiveness: true
13 ; CHECK-LABEL: name: cmp_ult_i32
14 ; CHECK: liveins: $x10, $x11
16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
17 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
18 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
19 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
20 ; CHECK-NEXT: PseudoRET implicit $x10
21 %0:gprb(s32) = COPY $x10
22 %1:gprb(s32) = COPY $x11
23 %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
25 PseudoRET implicit $x10
32 tracksRegLiveness: true
37 ; CHECK-LABEL: name: cmp_slt_i32
38 ; CHECK: liveins: $x10, $x11
40 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
41 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
42 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
43 ; CHECK-NEXT: $x10 = COPY [[SLT]]
44 ; CHECK-NEXT: PseudoRET implicit $x10
45 %0:gprb(s32) = COPY $x10
46 %1:gprb(s32) = COPY $x11
47 %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
49 PseudoRET implicit $x10
56 tracksRegLiveness: true
61 ; CHECK-LABEL: name: cmp_ugt_i32
62 ; CHECK: liveins: $x10, $x11
64 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
65 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
66 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
67 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
68 ; CHECK-NEXT: PseudoRET implicit $x10
69 %0:gprb(s32) = COPY $x10
70 %1:gprb(s32) = COPY $x11
71 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
73 PseudoRET implicit $x10
80 tracksRegLiveness: true
85 ; CHECK-LABEL: name: cmp_sgt_i32
86 ; CHECK: liveins: $x10, $x11
88 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
89 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
90 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
91 ; CHECK-NEXT: $x10 = COPY [[SLT]]
92 ; CHECK-NEXT: PseudoRET implicit $x10
93 %0:gprb(s32) = COPY $x10
94 %1:gprb(s32) = COPY $x11
95 %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
97 PseudoRET implicit $x10
103 regBankSelected: true
104 tracksRegLiveness: true
109 ; CHECK-LABEL: name: cmp_eq_i32
110 ; CHECK: liveins: $x10, $x11
112 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
113 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
114 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
115 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
116 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
117 ; CHECK-NEXT: PseudoRET implicit $x10
118 %0:gprb(s32) = COPY $x10
119 %1:gprb(s32) = COPY $x11
120 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
122 PseudoRET implicit $x10
128 regBankSelected: true
129 tracksRegLiveness: true
134 ; CHECK-LABEL: name: cmp_ne_i32
135 ; CHECK: liveins: $x10, $x11
137 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
138 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
139 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
140 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
141 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
142 ; CHECK-NEXT: PseudoRET implicit $x10
143 %0:gprb(s32) = COPY $x10
144 %1:gprb(s32) = COPY $x11
145 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
147 PseudoRET implicit $x10
153 regBankSelected: true
154 tracksRegLiveness: true
159 ; CHECK-LABEL: name: cmp_ule_i32
160 ; CHECK: liveins: $x10, $x11
162 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
163 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
164 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
165 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
166 ; CHECK-NEXT: $x10 = COPY [[XORI]]
167 ; CHECK-NEXT: PseudoRET implicit $x10
168 %0:gprb(s32) = COPY $x10
169 %1:gprb(s32) = COPY $x11
170 %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
172 PseudoRET implicit $x10
178 regBankSelected: true
179 tracksRegLiveness: true
184 ; CHECK-LABEL: name: cmp_sle_i32
185 ; CHECK: liveins: $x10, $x11
187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
188 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
189 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
190 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
191 ; CHECK-NEXT: $x10 = COPY [[XORI]]
192 ; CHECK-NEXT: PseudoRET implicit $x10
193 %0:gprb(s32) = COPY $x10
194 %1:gprb(s32) = COPY $x11
195 %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
197 PseudoRET implicit $x10
203 regBankSelected: true
204 tracksRegLiveness: true
209 ; CHECK-LABEL: name: cmp_uge_i32
210 ; CHECK: liveins: $x10, $x11
212 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
213 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
214 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
215 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
216 ; CHECK-NEXT: $x10 = COPY [[XORI]]
217 ; CHECK-NEXT: PseudoRET implicit $x10
218 %0:gprb(s32) = COPY $x10
219 %1:gprb(s32) = COPY $x11
220 %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
222 PseudoRET implicit $x10
228 regBankSelected: true
229 tracksRegLiveness: true
234 ; CHECK-LABEL: name: cmp_sge_i32
235 ; CHECK: liveins: $x10, $x11
237 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
238 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
239 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
240 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
241 ; CHECK-NEXT: $x10 = COPY [[XORI]]
242 ; CHECK-NEXT: PseudoRET implicit $x10
243 %0:gprb(s32) = COPY $x10
244 %1:gprb(s32) = COPY $x11
245 %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
247 PseudoRET implicit $x10
253 regBankSelected: true
254 tracksRegLiveness: true
259 ; CHECK-LABEL: name: cmp_ult_p0
260 ; CHECK: liveins: $x10, $x11
262 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
263 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
264 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
265 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
266 ; CHECK-NEXT: PseudoRET implicit $x10
267 %0:gprb(p0) = COPY $x10
268 %1:gprb(p0) = COPY $x11
269 %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
271 PseudoRET implicit $x10
277 regBankSelected: true
278 tracksRegLiveness: true
283 ; CHECK-LABEL: name: cmp_slt_p0
284 ; CHECK: liveins: $x10, $x11
286 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
287 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
288 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
289 ; CHECK-NEXT: $x10 = COPY [[SLT]]
290 ; CHECK-NEXT: PseudoRET implicit $x10
291 %0:gprb(p0) = COPY $x10
292 %1:gprb(p0) = COPY $x11
293 %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
295 PseudoRET implicit $x10
301 regBankSelected: true
302 tracksRegLiveness: true
307 ; CHECK-LABEL: name: cmp_ugt_p0
308 ; CHECK: liveins: $x10, $x11
310 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
311 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
312 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
313 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
314 ; CHECK-NEXT: PseudoRET implicit $x10
315 %0:gprb(p0) = COPY $x10
316 %1:gprb(p0) = COPY $x11
317 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
319 PseudoRET implicit $x10
325 regBankSelected: true
326 tracksRegLiveness: true
331 ; CHECK-LABEL: name: cmp_sgt_p0
332 ; CHECK: liveins: $x10, $x11
334 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
335 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
336 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
337 ; CHECK-NEXT: $x10 = COPY [[SLT]]
338 ; CHECK-NEXT: PseudoRET implicit $x10
339 %0:gprb(p0) = COPY $x10
340 %1:gprb(p0) = COPY $x11
341 %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
343 PseudoRET implicit $x10
349 regBankSelected: true
350 tracksRegLiveness: true
355 ; CHECK-LABEL: name: cmp_eq_p0
356 ; CHECK: liveins: $x10, $x11
358 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
359 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
360 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
361 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
362 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
363 ; CHECK-NEXT: PseudoRET implicit $x10
364 %0:gprb(p0) = COPY $x10
365 %1:gprb(p0) = COPY $x11
366 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
368 PseudoRET implicit $x10
374 regBankSelected: true
375 tracksRegLiveness: true
380 ; CHECK-LABEL: name: cmp_ne_p0
381 ; CHECK: liveins: $x10, $x11
383 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
384 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
385 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
386 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
387 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
388 ; CHECK-NEXT: PseudoRET implicit $x10
389 %0:gprb(p0) = COPY $x10
390 %1:gprb(p0) = COPY $x11
391 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
393 PseudoRET implicit $x10
399 regBankSelected: true
400 tracksRegLiveness: true
405 ; CHECK-LABEL: name: cmp_ule_p0
406 ; CHECK: liveins: $x10, $x11
408 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
409 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
410 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
411 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
412 ; CHECK-NEXT: $x10 = COPY [[XORI]]
413 ; CHECK-NEXT: PseudoRET implicit $x10
414 %0:gprb(p0) = COPY $x10
415 %1:gprb(p0) = COPY $x11
416 %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
418 PseudoRET implicit $x10
424 regBankSelected: true
425 tracksRegLiveness: true
430 ; CHECK-LABEL: name: cmp_sle_p0
431 ; CHECK: liveins: $x10, $x11
433 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
434 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
435 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
436 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
437 ; CHECK-NEXT: $x10 = COPY [[XORI]]
438 ; CHECK-NEXT: PseudoRET implicit $x10
439 %0:gprb(p0) = COPY $x10
440 %1:gprb(p0) = COPY $x11
441 %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
443 PseudoRET implicit $x10
449 regBankSelected: true
450 tracksRegLiveness: true
455 ; CHECK-LABEL: name: cmp_uge_p0
456 ; CHECK: liveins: $x10, $x11
458 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
459 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
460 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
461 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
462 ; CHECK-NEXT: $x10 = COPY [[XORI]]
463 ; CHECK-NEXT: PseudoRET implicit $x10
464 %0:gprb(p0) = COPY $x10
465 %1:gprb(p0) = COPY $x11
466 %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
468 PseudoRET implicit $x10
474 regBankSelected: true
475 tracksRegLiveness: true
480 ; CHECK-LABEL: name: cmp_sge_p0
481 ; CHECK: liveins: $x10, $x11
483 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
484 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
485 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
486 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
487 ; CHECK-NEXT: $x10 = COPY [[XORI]]
488 ; CHECK-NEXT: PseudoRET implicit $x10
489 %0:gprb(p0) = COPY $x10
490 %1:gprb(p0) = COPY $x11
491 %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
493 PseudoRET implicit $x10
499 regBankSelected: true
500 tracksRegLiveness: true
505 ; CHECK-LABEL: name: cmp_ulti_i32
506 ; CHECK: liveins: $x10
508 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
509 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 10
510 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
511 ; CHECK-NEXT: PseudoRET implicit $x10
512 %0:gprb(s32) = COPY $x10
513 %1:gprb(s32) = G_CONSTANT i32 10
514 %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
516 PseudoRET implicit $x10
522 regBankSelected: true
523 tracksRegLiveness: true
528 ; CHECK-LABEL: name: cmp_slti_i32
529 ; CHECK: liveins: $x10
531 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
532 ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -10
533 ; CHECK-NEXT: $x10 = COPY [[SLTI]]
534 ; CHECK-NEXT: PseudoRET implicit $x10
535 %0:gprb(s32) = COPY $x10
536 %1:gprb(s32) = G_CONSTANT i32 -10
537 %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
539 PseudoRET implicit $x10
545 regBankSelected: true
546 tracksRegLiveness: true
551 ; CHECK-LABEL: name: cmp_ugti_i32
552 ; CHECK: liveins: $x10
554 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
555 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 11
556 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTIU]], 1
557 ; CHECK-NEXT: $x10 = COPY [[XORI]]
558 ; CHECK-NEXT: PseudoRET implicit $x10
559 %0:gprb(s32) = COPY $x10
560 %1:gprb(s32) = G_CONSTANT i32 10
561 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
563 PseudoRET implicit $x10
569 regBankSelected: true
570 tracksRegLiveness: true
575 ; CHECK-LABEL: name: cmp_sgti_i32
576 ; CHECK: liveins: $x10
578 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
579 ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -9
580 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTI]], 1
581 ; CHECK-NEXT: $x10 = COPY [[XORI]]
582 ; CHECK-NEXT: PseudoRET implicit $x10
583 %0:gprb(s32) = COPY $x10
584 %1:gprb(s32) = G_CONSTANT i32 -10
585 %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
587 PseudoRET implicit $x10
593 regBankSelected: true
594 tracksRegLiveness: true
599 ; CHECK-LABEL: name: cmp_eqi_i32
600 ; CHECK: liveins: $x10
602 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
603 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[COPY]], -10
604 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[ADDI]], 1
605 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
606 ; CHECK-NEXT: PseudoRET implicit $x10
607 %0:gprb(s32) = COPY $x10
608 %1:gprb(s32) = G_CONSTANT i32 10
609 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
611 PseudoRET implicit $x10
617 regBankSelected: true
618 tracksRegLiveness: true
623 ; CHECK-LABEL: name: cmp_nei_i32
624 ; CHECK: liveins: $x10
626 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
627 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[COPY]], 10
628 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ADDI]]
629 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
630 ; CHECK-NEXT: PseudoRET implicit $x10
631 %0:gprb(s32) = COPY $x10
632 %1:gprb(s32) = G_CONSTANT i32 -10
633 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
635 PseudoRET implicit $x10
641 regBankSelected: true
642 tracksRegLiveness: true
647 ; CHECK-LABEL: name: cmp_ulei_i32
648 ; CHECK: liveins: $x10
650 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
651 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 11
652 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
653 ; CHECK-NEXT: PseudoRET implicit $x10
654 %0:gprb(s32) = COPY $x10
655 %1:gprb(s32) = G_CONSTANT i32 10
656 %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
658 PseudoRET implicit $x10
664 regBankSelected: true
665 tracksRegLiveness: true
670 ; CHECK-LABEL: name: cmp_slei_i32
671 ; CHECK: liveins: $x10
673 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
674 ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -9
675 ; CHECK-NEXT: $x10 = COPY [[SLTI]]
676 ; CHECK-NEXT: PseudoRET implicit $x10
677 %0:gprb(s32) = COPY $x10
678 %1:gprb(s32) = G_CONSTANT i32 -10
679 %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
681 PseudoRET implicit $x10
687 regBankSelected: true
688 tracksRegLiveness: true
693 ; CHECK-LABEL: name: cmp_ugei_i32
694 ; CHECK: liveins: $x10
696 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
697 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 10
698 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTIU]], 1
699 ; CHECK-NEXT: $x10 = COPY [[XORI]]
700 ; CHECK-NEXT: PseudoRET implicit $x10
701 %0:gprb(s32) = COPY $x10
702 %1:gprb(s32) = G_CONSTANT i32 10
703 %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
705 PseudoRET implicit $x10
711 regBankSelected: true
712 tracksRegLiveness: true
717 ; CHECK-LABEL: name: cmp_sgei_i32
718 ; CHECK: liveins: $x10
720 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
721 ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -10
722 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTI]], 1
723 ; CHECK-NEXT: $x10 = COPY [[XORI]]
724 ; CHECK-NEXT: PseudoRET implicit $x10
725 %0:gprb(s32) = COPY $x10
726 %1:gprb(s32) = G_CONSTANT i32 -10
727 %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
729 PseudoRET implicit $x10
735 regBankSelected: true
736 tracksRegLiveness: true
741 ; CHECK-LABEL: name: cmp_ulti_p0
742 ; CHECK: liveins: $x10
744 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
745 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
746 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[ADDI]]
747 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
748 ; CHECK-NEXT: PseudoRET implicit $x10
749 %0:gprb(p0) = COPY $x10
750 %1:gprb(p0) = G_CONSTANT i32 10
751 %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
753 PseudoRET implicit $x10
759 regBankSelected: true
760 tracksRegLiveness: true
765 ; CHECK-LABEL: name: cmp_slti_p0
766 ; CHECK: liveins: $x10
768 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
769 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
770 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[ADDI]]
771 ; CHECK-NEXT: $x10 = COPY [[SLT]]
772 ; CHECK-NEXT: PseudoRET implicit $x10
773 %0:gprb(p0) = COPY $x10
774 %1:gprb(p0) = G_CONSTANT i32 -10
775 %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
777 PseudoRET implicit $x10
783 regBankSelected: true
784 tracksRegLiveness: true
789 ; CHECK-LABEL: name: cmp_ugti_p0
790 ; CHECK: liveins: $x10
792 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
793 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
794 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
795 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
796 ; CHECK-NEXT: PseudoRET implicit $x10
797 %0:gprb(p0) = COPY $x10
798 %1:gprb(p0) = G_CONSTANT i32 10
799 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
801 PseudoRET implicit $x10
807 regBankSelected: true
808 tracksRegLiveness: true
813 ; CHECK-LABEL: name: cmp_sgti_p0
814 ; CHECK: liveins: $x10
816 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
817 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
818 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[ADDI]], [[COPY]]
819 ; CHECK-NEXT: $x10 = COPY [[SLT]]
820 ; CHECK-NEXT: PseudoRET implicit $x10
821 %0:gprb(p0) = COPY $x10
822 %1:gprb(p0) = G_CONSTANT i32 -10
823 %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
825 PseudoRET implicit $x10
831 regBankSelected: true
832 tracksRegLiveness: true
837 ; CHECK-LABEL: name: cmp_eqi_p0
838 ; CHECK: liveins: $x10
840 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
841 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
842 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[ADDI]]
843 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
844 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
845 ; CHECK-NEXT: PseudoRET implicit $x10
846 %0:gprb(p0) = COPY $x10
847 %1:gprb(p0) = G_CONSTANT i32 10
848 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
850 PseudoRET implicit $x10
856 regBankSelected: true
857 tracksRegLiveness: true
862 ; CHECK-LABEL: name: cmp_nei_p0
863 ; CHECK: liveins: $x10
865 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
866 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
867 ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[ADDI]]
868 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
869 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
870 ; CHECK-NEXT: PseudoRET implicit $x10
871 %0:gprb(p0) = COPY $x10
872 %1:gprb(p0) = G_CONSTANT i32 -10
873 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
875 PseudoRET implicit $x10
881 regBankSelected: true
882 tracksRegLiveness: true
887 ; CHECK-LABEL: name: cmp_ulei_p0
888 ; CHECK: liveins: $x10
890 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
891 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
892 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
893 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
894 ; CHECK-NEXT: $x10 = COPY [[XORI]]
895 ; CHECK-NEXT: PseudoRET implicit $x10
896 %0:gprb(p0) = COPY $x10
897 %1:gprb(p0) = G_CONSTANT i32 10
898 %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
900 PseudoRET implicit $x10
906 regBankSelected: true
907 tracksRegLiveness: true
912 ; CHECK-LABEL: name: cmp_slei_p0
913 ; CHECK: liveins: $x10
915 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
916 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
917 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[ADDI]], [[COPY]]
918 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
919 ; CHECK-NEXT: $x10 = COPY [[XORI]]
920 ; CHECK-NEXT: PseudoRET implicit $x10
921 %0:gprb(p0) = COPY $x10
922 %1:gprb(p0) = G_CONSTANT i32 -10
923 %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
925 PseudoRET implicit $x10
931 regBankSelected: true
932 tracksRegLiveness: true
937 ; CHECK-LABEL: name: cmp_ugei_p0
938 ; CHECK: liveins: $x10
940 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
941 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
942 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[ADDI]]
943 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
944 ; CHECK-NEXT: $x10 = COPY [[XORI]]
945 ; CHECK-NEXT: PseudoRET implicit $x10
946 %0:gprb(p0) = COPY $x10
947 %1:gprb(p0) = G_CONSTANT i32 10
948 %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
950 PseudoRET implicit $x10
956 regBankSelected: true
957 tracksRegLiveness: true
962 ; CHECK-LABEL: name: cmp_sgei_p0
963 ; CHECK: liveins: $x10
965 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
966 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
967 ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[ADDI]]
968 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
969 ; CHECK-NEXT: $x10 = COPY [[XORI]]
970 ; CHECK-NEXT: PseudoRET implicit $x10
971 %0:gprb(p0) = COPY $x10
972 %1:gprb(p0) = G_CONSTANT i32 -10
973 %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
975 PseudoRET implicit $x10
981 regBankSelected: true
982 tracksRegLiveness: true
987 ; CHECK-LABEL: name: cmp_eq0_i32
988 ; CHECK: liveins: $x10
990 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
991 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 1
992 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
993 ; CHECK-NEXT: PseudoRET implicit $x10
994 %0:gprb(s32) = COPY $x10
995 %1:gprb(s32) = G_CONSTANT i32 0
996 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
998 PseudoRET implicit $x10
1004 regBankSelected: true
1005 tracksRegLiveness: true
1010 ; CHECK-LABEL: name: cmp_eq0_p0
1011 ; CHECK: liveins: $x10
1012 ; CHECK-NEXT: {{ $}}
1013 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1014 ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 1
1015 ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
1016 ; CHECK-NEXT: PseudoRET implicit $x10
1017 %0:gprb(p0) = COPY $x10
1018 %1:gprb(p0) = G_CONSTANT i32 0
1019 %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
1021 PseudoRET implicit $x10
1027 regBankSelected: true
1028 tracksRegLiveness: true
1033 ; CHECK-LABEL: name: cmp_ne0_i32
1034 ; CHECK: liveins: $x10
1035 ; CHECK-NEXT: {{ $}}
1036 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1037 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[COPY]]
1038 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1039 ; CHECK-NEXT: PseudoRET implicit $x10
1040 %0:gprb(s32) = COPY $x10
1041 %1:gprb(s32) = G_CONSTANT i32 0
1042 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
1044 PseudoRET implicit $x10
1050 regBankSelected: true
1051 tracksRegLiveness: true
1056 ; CHECK-LABEL: name: cmp_ne0_p0
1057 ; CHECK: liveins: $x10
1058 ; CHECK-NEXT: {{ $}}
1059 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1060 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[COPY]]
1061 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1062 ; CHECK-NEXT: PseudoRET implicit $x10
1063 %0:gprb(p0) = COPY $x10
1064 %1:gprb(p0) = G_CONSTANT i32 0
1065 %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
1067 PseudoRET implicit $x10
1071 name: cmp_ugt_neg1_i32
1073 regBankSelected: true
1074 tracksRegLiveness: true
1079 ; CHECK-LABEL: name: cmp_ugt_neg1_i32
1080 ; CHECK: liveins: $x10
1081 ; CHECK-NEXT: {{ $}}
1082 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1083 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
1084 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
1085 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1086 ; CHECK-NEXT: PseudoRET implicit $x10
1087 %0:gprb(s32) = COPY $x10
1088 %1:gprb(s32) = G_CONSTANT i32 -1
1089 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
1091 PseudoRET implicit $x10
1095 name: cmp_ugt_neg1_p0
1097 regBankSelected: true
1098 tracksRegLiveness: true
1103 ; CHECK-LABEL: name: cmp_ugt_neg1_p0
1104 ; CHECK: liveins: $x10
1105 ; CHECK-NEXT: {{ $}}
1106 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1107 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
1108 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
1109 ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1110 ; CHECK-NEXT: PseudoRET implicit $x10
1111 %0:gprb(p0) = COPY $x10
1112 %1:gprb(p0) = G_CONSTANT i32 -1
1113 %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
1115 PseudoRET implicit $x10