llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/trap.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=riscv32 -run-pass=instruction-select -simplify-mir \
   3 # RUN:   -verify-machineinstrs %s -o - | FileCheck %s
   4 # RUN: llc -mtriple=riscv64 -run-pass=instruction-select -simplify-mir \
   5 # RUN:   -verify-machineinstrs %s -o - | FileCheck %s
   6
   7 ---
   8 name:            test_trap
   9 legalized:       true
  10 regBankSelected: true
  11 tracksRegLiveness: true
  12 body:             |
  13   bb.1:
  14     ; CHECK-LABEL: name: test_trap
  15     ; CHECK: UNIMP
  16     ; CHECK-NEXT: PseudoRET
  17     G_TRAP
  18     PseudoRET
  19
  20 ...
  21 ---
  22 name:            test_debugtrap
  23 legalized:       true
  24 regBankSelected: true
  25 tracksRegLiveness: true
  26 body:             |
  27   bb.1:
  28     ; CHECK-LABEL: name: test_debugtrap
  29     ; CHECK: EBREAK
  30     ; CHECK-NEXT: PseudoRET
  31     G_DEBUGTRAP
  32     PseudoRET
  33
  34 ...