[llvm-project.git] / llvm / test / CodeGen / RISCV / GlobalISel / irtranslator / calling-conv-ilp32-ilp32f-ilp32d-common.ll
| blob | 5ca1bf7467858ea63a07a9118991197dd9880100 |
1 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc -mtriple=riscv32 \
3 ; RUN: -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
4 ; RUN: | FileCheck -check-prefixes=RV32I,ILP32 %s
5 ; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32f \
6 ; RUN: -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
7 ; RUN: | FileCheck -check-prefixes=RV32I,ILP32F %s
8 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
9 ; RUN: -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
10 ; RUN: | FileCheck -check-prefixes=RV32I,ILP32D %s
12 ; This file contains tests that should have identical output for the ilp32,
13 ; ilp32f, and ilp32d ABIs. i.e. where no arguments are passed according to
14 ; the floating point ABI.
16 ; Check that on RV32, i64 is passed in a pair of registers. Unlike
17 ; the convention for varargs, this need not be an aligned pair.
19 define i32 @callee_i64_in_regs(i32 %a, i64 %b) nounwind {
20 ; RV32I-LABEL: name: callee_i64_in_regs
21 ; RV32I: bb.1 (%ir-block.0):
22 ; RV32I-NEXT: liveins: $x10, $x11, $x12
23 ; RV32I-NEXT: {{ $}}
24 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
25 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
26 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
27 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
28 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
29 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[TRUNC]]
30 ; RV32I-NEXT: $x10 = COPY [[ADD]](s32)
31 ; RV32I-NEXT: PseudoRET implicit $x10
32 %b_trunc = trunc i64 %b to i32
33 %1 = add i32 %a, %b_trunc
34 ret i32 %1
35 }
37 define i32 @caller_i64_in_regs() nounwind {
38 ; ILP32-LABEL: name: caller_i64_in_regs
39 ; ILP32: bb.1 (%ir-block.0):
40 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
41 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
42 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
43 ; ILP32-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
44 ; ILP32-NEXT: $x10 = COPY [[C]](s32)
45 ; ILP32-NEXT: $x11 = COPY [[UV]](s32)
46 ; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
47 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
48 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
49 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
50 ; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
51 ; ILP32-NEXT: PseudoRET implicit $x10
52 ;
53 ; ILP32F-LABEL: name: caller_i64_in_regs
54 ; ILP32F: bb.1 (%ir-block.0):
55 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
56 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
57 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
58 ; ILP32F-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
59 ; ILP32F-NEXT: $x10 = COPY [[C]](s32)
60 ; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
61 ; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
62 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
63 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
64 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
65 ; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
66 ; ILP32F-NEXT: PseudoRET implicit $x10
67 ;
68 ; ILP32D-LABEL: name: caller_i64_in_regs
69 ; ILP32D: bb.1 (%ir-block.0):
70 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
71 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
72 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
73 ; ILP32D-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
74 ; ILP32D-NEXT: $x10 = COPY [[C]](s32)
75 ; ILP32D-NEXT: $x11 = COPY [[UV]](s32)
76 ; ILP32D-NEXT: $x12 = COPY [[UV1]](s32)
77 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
78 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
79 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
80 ; ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
81 ; ILP32D-NEXT: PseudoRET implicit $x10
82 %1 = call i32 @callee_i64_in_regs(i32 1, i64 2)
83 ret i32 %1
84 }
86 ; Check the correct handling of passing of values that are larger that 2*XLen.
88 define i64 @callee_128i_indirect_reference_in_stack(i64 %x1, i64 %x2, i64 %x3, i64 %x4, i128 %y, i128 %y2) {
89 ; RV32I-LABEL: name: callee_128i_indirect_reference_in_stack
90 ; RV32I: bb.1 (%ir-block.0):
91 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
92 ; RV32I-NEXT: {{ $}}
93 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
94 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
95 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
96 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
97 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
98 ; RV32I-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
99 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
100 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15
101 ; RV32I-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
102 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16
103 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17
104 ; RV32I-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
105 ; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
106 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.1, align 16)
107 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[LOAD]](p0) :: (load (s128), align 8)
108 ; RV32I-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
109 ; RV32I-NEXT: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.0)
110 ; RV32I-NEXT: [[LOAD3:%[0-9]+]]:_(s128) = G_LOAD [[LOAD2]](p0) :: (load (s128), align 8)
111 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s128) = G_ADD [[LOAD1]], [[LOAD3]]
112 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[ADD]](s128)
113 ; RV32I-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)
114 ; RV32I-NEXT: $x10 = COPY [[UV]](s32)
115 ; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
116 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
117 %1 = add i128 %y, %y2
118 %2 = trunc i128 %1 to i64
119 ret i64 %2
120 }
122 define i32 @callee_128i_indirect_refernce_in_stack( ) {
123 ; ILP32-LABEL: name: callee_128i_indirect_refernce_in_stack
124 ; ILP32: bb.1 (%ir-block.0):
125 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
126 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
127 ; ILP32-NEXT: [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
128 ; ILP32-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
129 ; ILP32-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
130 ; ILP32-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
131 ; ILP32-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
132 ; ILP32-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
133 ; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
134 ; ILP32-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
135 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
136 ; ILP32-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
137 ; ILP32-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)
138 ; ILP32-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)
139 ; ILP32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
140 ; ILP32-NEXT: G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
141 ; ILP32-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
142 ; ILP32-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)
143 ; ILP32-NEXT: G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)
144 ; ILP32-NEXT: $x10 = COPY [[UV]](s32)
145 ; ILP32-NEXT: $x11 = COPY [[UV1]](s32)
146 ; ILP32-NEXT: $x12 = COPY [[UV2]](s32)
147 ; ILP32-NEXT: $x13 = COPY [[UV3]](s32)
148 ; ILP32-NEXT: $x14 = COPY [[UV4]](s32)
149 ; ILP32-NEXT: $x15 = COPY [[UV5]](s32)
150 ; ILP32-NEXT: $x16 = COPY [[UV6]](s32)
151 ; ILP32-NEXT: $x17 = COPY [[UV7]](s32)
152 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
153 ; ILP32-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
154 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
155 ; ILP32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
156 ; ILP32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
157 ; ILP32-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
158 ; ILP32-NEXT: $x10 = COPY [[TRUNC]](s32)
159 ; ILP32-NEXT: PseudoRET implicit $x10
160 ;
161 ; ILP32F-LABEL: name: callee_128i_indirect_refernce_in_stack
162 ; ILP32F: bb.1 (%ir-block.0):
163 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
164 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
165 ; ILP32F-NEXT: [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
166 ; ILP32F-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
167 ; ILP32F-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
168 ; ILP32F-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
169 ; ILP32F-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
170 ; ILP32F-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
171 ; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
172 ; ILP32F-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
173 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
174 ; ILP32F-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
175 ; ILP32F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)
176 ; ILP32F-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)
177 ; ILP32F-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
178 ; ILP32F-NEXT: G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
179 ; ILP32F-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
180 ; ILP32F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)
181 ; ILP32F-NEXT: G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)
182 ; ILP32F-NEXT: $x10 = COPY [[UV]](s32)
183 ; ILP32F-NEXT: $x11 = COPY [[UV1]](s32)
184 ; ILP32F-NEXT: $x12 = COPY [[UV2]](s32)
185 ; ILP32F-NEXT: $x13 = COPY [[UV3]](s32)
186 ; ILP32F-NEXT: $x14 = COPY [[UV4]](s32)
187 ; ILP32F-NEXT: $x15 = COPY [[UV5]](s32)
188 ; ILP32F-NEXT: $x16 = COPY [[UV6]](s32)
189 ; ILP32F-NEXT: $x17 = COPY [[UV7]](s32)
190 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
191 ; ILP32F-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
192 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
193 ; ILP32F-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
194 ; ILP32F-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
195 ; ILP32F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
196 ; ILP32F-NEXT: $x10 = COPY [[TRUNC]](s32)
197 ; ILP32F-NEXT: PseudoRET implicit $x10
198 ;
199 ; ILP32D-LABEL: name: callee_128i_indirect_refernce_in_stack
200 ; ILP32D: bb.1 (%ir-block.0):
201 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
202 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
203 ; ILP32D-NEXT: [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
204 ; ILP32D-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
205 ; ILP32D-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
206 ; ILP32D-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
207 ; ILP32D-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
208 ; ILP32D-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
209 ; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
210 ; ILP32D-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
211 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
212 ; ILP32D-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
213 ; ILP32D-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)
214 ; ILP32D-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)
215 ; ILP32D-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
216 ; ILP32D-NEXT: G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
217 ; ILP32D-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
218 ; ILP32D-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)
219 ; ILP32D-NEXT: G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)
220 ; ILP32D-NEXT: $x10 = COPY [[UV]](s32)
221 ; ILP32D-NEXT: $x11 = COPY [[UV1]](s32)
222 ; ILP32D-NEXT: $x12 = COPY [[UV2]](s32)
223 ; ILP32D-NEXT: $x13 = COPY [[UV3]](s32)
224 ; ILP32D-NEXT: $x14 = COPY [[UV4]](s32)
225 ; ILP32D-NEXT: $x15 = COPY [[UV5]](s32)
226 ; ILP32D-NEXT: $x16 = COPY [[UV6]](s32)
227 ; ILP32D-NEXT: $x17 = COPY [[UV7]](s32)
228 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
229 ; ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
230 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
231 ; ILP32D-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
232 ; ILP32D-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
233 ; ILP32D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
234 ; ILP32D-NEXT: $x10 = COPY [[TRUNC]](s32)
235 ; ILP32D-NEXT: PseudoRET implicit $x10
236 %1 = call i64 @callee_128i_indirect_reference_in_stack(i64 1,i64 1, i64 1, i64 1, i128 2, i128 42)
237 %2 = trunc i64 %1 to i32
238 ret i32 %2
239 }
241 define i64 @callee_128i_indirect_reference_in_stack_not_first(i64 %x0, i64 %x1, i64 %x2, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i64 %x8, i128 %y ) {
242 ; RV32I-LABEL: name: callee_128i_indirect_reference_in_stack_not_first
243 ; RV32I: bb.1 (%ir-block.0):
244 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
245 ; RV32I-NEXT: {{ $}}
246 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
247 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
248 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
249 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
250 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
251 ; RV32I-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
252 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
253 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15
254 ; RV32I-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
255 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16
256 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17
257 ; RV32I-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)
258 ; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.8
259 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.8, align 16)
260 ; RV32I-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.7
261 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.7)
262 ; RV32I-NEXT: [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32)
263 ; RV32I-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.6
264 ; RV32I-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.6, align 8)
265 ; RV32I-NEXT: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.5
266 ; RV32I-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (s32) from %fixed-stack.5)
267 ; RV32I-NEXT: [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32)
268 ; RV32I-NEXT: [[FRAME_INDEX4:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.4
269 ; RV32I-NEXT: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p0) :: (load (s32) from %fixed-stack.4, align 16)
270 ; RV32I-NEXT: [[FRAME_INDEX5:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3
271 ; RV32I-NEXT: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p0) :: (load (s32) from %fixed-stack.3)
272 ; RV32I-NEXT: [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32)
273 ; RV32I-NEXT: [[FRAME_INDEX6:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
274 ; RV32I-NEXT: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p0) :: (load (s32) from %fixed-stack.2, align 8)
275 ; RV32I-NEXT: [[FRAME_INDEX7:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
276 ; RV32I-NEXT: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p0) :: (load (s32) from %fixed-stack.1)
277 ; RV32I-NEXT: [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32)
278 ; RV32I-NEXT: [[FRAME_INDEX8:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
279 ; RV32I-NEXT: [[LOAD8:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX8]](p0) :: (load (p0) from %fixed-stack.0, align 16)
280 ; RV32I-NEXT: [[LOAD9:%[0-9]+]]:_(s128) = G_LOAD [[LOAD8]](p0) :: (load (s128), align 8)
281 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD9]](s128)
282 ; RV32I-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)
283 ; RV32I-NEXT: $x10 = COPY [[UV]](s32)
284 ; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
285 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
286 %2 = trunc i128 %y to i64
287 ret i64 %2
288 }
290 define i32 @caller_128i_indirect_reference_in_stack_not_first() {
291 ; ILP32-LABEL: name: caller_128i_indirect_reference_in_stack_not_first
292 ; ILP32: bb.1 (%ir-block.0):
293 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
294 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
295 ; ILP32-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
296 ; ILP32-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
297 ; ILP32-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
298 ; ILP32-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
299 ; ILP32-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
300 ; ILP32-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
301 ; ILP32-NEXT: [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
302 ; ILP32-NEXT: ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2
303 ; ILP32-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
304 ; ILP32-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
305 ; ILP32-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)
306 ; ILP32-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
307 ; ILP32-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)
308 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
309 ; ILP32-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
310 ; ILP32-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
311 ; ILP32-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
312 ; ILP32-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
313 ; ILP32-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)
314 ; ILP32-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
315 ; ILP32-NEXT: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)
316 ; ILP32-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
317 ; ILP32-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)
318 ; ILP32-NEXT: G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)
319 ; ILP32-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
320 ; ILP32-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)
321 ; ILP32-NEXT: G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)
322 ; ILP32-NEXT: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
323 ; ILP32-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
324 ; ILP32-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)
325 ; ILP32-NEXT: G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)
326 ; ILP32-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
327 ; ILP32-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)
328 ; ILP32-NEXT: G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)
329 ; ILP32-NEXT: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)
330 ; ILP32-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
331 ; ILP32-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)
332 ; ILP32-NEXT: G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)
333 ; ILP32-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
334 ; ILP32-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)
335 ; ILP32-NEXT: G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)
336 ; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
337 ; ILP32-NEXT: G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
338 ; ILP32-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
339 ; ILP32-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)
340 ; ILP32-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)
341 ; ILP32-NEXT: $x10 = COPY [[UV]](s32)
342 ; ILP32-NEXT: $x11 = COPY [[UV1]](s32)
343 ; ILP32-NEXT: $x12 = COPY [[UV2]](s32)
344 ; ILP32-NEXT: $x13 = COPY [[UV3]](s32)
345 ; ILP32-NEXT: $x14 = COPY [[UV4]](s32)
346 ; ILP32-NEXT: $x15 = COPY [[UV5]](s32)
347 ; ILP32-NEXT: $x16 = COPY [[UV6]](s32)
348 ; ILP32-NEXT: $x17 = COPY [[UV7]](s32)
349 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
350 ; ILP32-NEXT: ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2
351 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
352 ; ILP32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
353 ; ILP32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
354 ; ILP32-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
355 ; ILP32-NEXT: $x10 = COPY [[TRUNC]](s32)
356 ; ILP32-NEXT: PseudoRET implicit $x10
357 ;
358 ; ILP32F-LABEL: name: caller_128i_indirect_reference_in_stack_not_first
359 ; ILP32F: bb.1 (%ir-block.0):
360 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
361 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
362 ; ILP32F-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
363 ; ILP32F-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
364 ; ILP32F-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
365 ; ILP32F-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
366 ; ILP32F-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
367 ; ILP32F-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
368 ; ILP32F-NEXT: [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
369 ; ILP32F-NEXT: ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2
370 ; ILP32F-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
371 ; ILP32F-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
372 ; ILP32F-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)
373 ; ILP32F-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
374 ; ILP32F-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)
375 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
376 ; ILP32F-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
377 ; ILP32F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
378 ; ILP32F-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
379 ; ILP32F-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
380 ; ILP32F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)
381 ; ILP32F-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
382 ; ILP32F-NEXT: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)
383 ; ILP32F-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
384 ; ILP32F-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)
385 ; ILP32F-NEXT: G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)
386 ; ILP32F-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
387 ; ILP32F-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)
388 ; ILP32F-NEXT: G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)
389 ; ILP32F-NEXT: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
390 ; ILP32F-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
391 ; ILP32F-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)
392 ; ILP32F-NEXT: G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)
393 ; ILP32F-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
394 ; ILP32F-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)
395 ; ILP32F-NEXT: G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)
396 ; ILP32F-NEXT: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)
397 ; ILP32F-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
398 ; ILP32F-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)
399 ; ILP32F-NEXT: G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)
400 ; ILP32F-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
401 ; ILP32F-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)
402 ; ILP32F-NEXT: G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)
403 ; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
404 ; ILP32F-NEXT: G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
405 ; ILP32F-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
406 ; ILP32F-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)
407 ; ILP32F-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)
408 ; ILP32F-NEXT: $x10 = COPY [[UV]](s32)
409 ; ILP32F-NEXT: $x11 = COPY [[UV1]](s32)
410 ; ILP32F-NEXT: $x12 = COPY [[UV2]](s32)
411 ; ILP32F-NEXT: $x13 = COPY [[UV3]](s32)
412 ; ILP32F-NEXT: $x14 = COPY [[UV4]](s32)
413 ; ILP32F-NEXT: $x15 = COPY [[UV5]](s32)
414 ; ILP32F-NEXT: $x16 = COPY [[UV6]](s32)
415 ; ILP32F-NEXT: $x17 = COPY [[UV7]](s32)
416 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
417 ; ILP32F-NEXT: ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2
418 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
419 ; ILP32F-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
420 ; ILP32F-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
421 ; ILP32F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
422 ; ILP32F-NEXT: $x10 = COPY [[TRUNC]](s32)
423 ; ILP32F-NEXT: PseudoRET implicit $x10
424 ;
425 ; ILP32D-LABEL: name: caller_128i_indirect_reference_in_stack_not_first
426 ; ILP32D: bb.1 (%ir-block.0):
427 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
428 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
429 ; ILP32D-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
430 ; ILP32D-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
431 ; ILP32D-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
432 ; ILP32D-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
433 ; ILP32D-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
434 ; ILP32D-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
435 ; ILP32D-NEXT: [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42
436 ; ILP32D-NEXT: ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2
437 ; ILP32D-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
438 ; ILP32D-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)
439 ; ILP32D-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)
440 ; ILP32D-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
441 ; ILP32D-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)
442 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
443 ; ILP32D-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
444 ; ILP32D-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
445 ; ILP32D-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
446 ; ILP32D-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
447 ; ILP32D-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)
448 ; ILP32D-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
449 ; ILP32D-NEXT: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)
450 ; ILP32D-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
451 ; ILP32D-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)
452 ; ILP32D-NEXT: G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)
453 ; ILP32D-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
454 ; ILP32D-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)
455 ; ILP32D-NEXT: G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)
456 ; ILP32D-NEXT: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
457 ; ILP32D-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
458 ; ILP32D-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)
459 ; ILP32D-NEXT: G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)
460 ; ILP32D-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
461 ; ILP32D-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)
462 ; ILP32D-NEXT: G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)
463 ; ILP32D-NEXT: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)
464 ; ILP32D-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
465 ; ILP32D-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)
466 ; ILP32D-NEXT: G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)
467 ; ILP32D-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
468 ; ILP32D-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)
469 ; ILP32D-NEXT: G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)
470 ; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
471 ; ILP32D-NEXT: G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
472 ; ILP32D-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
473 ; ILP32D-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)
474 ; ILP32D-NEXT: G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)
475 ; ILP32D-NEXT: $x10 = COPY [[UV]](s32)
476 ; ILP32D-NEXT: $x11 = COPY [[UV1]](s32)
477 ; ILP32D-NEXT: $x12 = COPY [[UV2]](s32)
478 ; ILP32D-NEXT: $x13 = COPY [[UV3]](s32)
479 ; ILP32D-NEXT: $x14 = COPY [[UV4]](s32)
480 ; ILP32D-NEXT: $x15 = COPY [[UV5]](s32)
481 ; ILP32D-NEXT: $x16 = COPY [[UV6]](s32)
482 ; ILP32D-NEXT: $x17 = COPY [[UV7]](s32)
483 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11
484 ; ILP32D-NEXT: ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2
485 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
486 ; ILP32D-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
487 ; ILP32D-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
488 ; ILP32D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
489 ; ILP32D-NEXT: $x10 = COPY [[TRUNC]](s32)
490 ; ILP32D-NEXT: PseudoRET implicit $x10
491 %1 = call i64 @callee_128i_indirect_reference_in_stack_not_first(i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i128 42)
492 %2 = trunc i64 %1 to i32
493 ret i32 %2
494 }
497 define i64 @callee_128i_indirect_reference_in_regs(i128 %x, i128 %y ) {
498 ; RV32I-LABEL: name: callee_128i_indirect_reference_in_regs
499 ; RV32I: bb.1 (%ir-block.0):
500 ; RV32I-NEXT: liveins: $x10, $x11
501 ; RV32I-NEXT: {{ $}}
502 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
503 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (s128), align 8)
504 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
505 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 8)
506 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s128) = G_ADD [[LOAD]], [[LOAD1]]
507 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD]](s128)
508 ; RV32I-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)
509 ; RV32I-NEXT: $x10 = COPY [[UV]](s32)
510 ; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
511 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
512 %1 = add i128 %x, %y
513 %2 = trunc i128 %x to i64
514 ret i64 %2
515 }
517 define i32 @caller_128i_indirect_reference_in_regs( ) {
518 ; ILP32-LABEL: name: caller_128i_indirect_reference_in_regs
519 ; ILP32: bb.1 (%ir-block.0):
520 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1
521 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
522 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
523 ; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
524 ; ILP32-NEXT: G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
525 ; ILP32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
526 ; ILP32-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
527 ; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
528 ; ILP32-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
529 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
530 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
531 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
532 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
533 ; ILP32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
534 ; ILP32-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
535 ; ILP32-NEXT: $x10 = COPY [[TRUNC]](s32)
536 ; ILP32-NEXT: PseudoRET implicit $x10
537 ;
538 ; ILP32F-LABEL: name: caller_128i_indirect_reference_in_regs
539 ; ILP32F: bb.1 (%ir-block.0):
540 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1
541 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
542 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
543 ; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
544 ; ILP32F-NEXT: G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
545 ; ILP32F-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
546 ; ILP32F-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
547 ; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
548 ; ILP32F-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
549 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
550 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
551 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
552 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
553 ; ILP32F-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
554 ; ILP32F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
555 ; ILP32F-NEXT: $x10 = COPY [[TRUNC]](s32)
556 ; ILP32F-NEXT: PseudoRET implicit $x10
557 ;
558 ; ILP32D-LABEL: name: caller_128i_indirect_reference_in_regs
559 ; ILP32D: bb.1 (%ir-block.0):
560 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1
561 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2
562 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
563 ; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
564 ; ILP32D-NEXT: G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)
565 ; ILP32D-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
566 ; ILP32D-NEXT: G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)
567 ; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
568 ; ILP32D-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
569 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
570 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
571 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
572 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
573 ; ILP32D-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
574 ; ILP32D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
575 ; ILP32D-NEXT: $x10 = COPY [[TRUNC]](s32)
576 ; ILP32D-NEXT: PseudoRET implicit $x10
577 %1 = call i64 @callee_128i_indirect_reference_in_regs(i128 1, i128 2)
578 %2 = trunc i64 %1 to i32
579 ret i32 %2
580 }
582 define i64 @callee_256i_indirect_reference_in_regs(i256 %x, i256 %y ) {
584 ; RV32I-LABEL: name: callee_256i_indirect_reference_in_regs
585 ; RV32I: bb.1 (%ir-block.0):
586 ; RV32I-NEXT: liveins: $x10, $x11
587 ; RV32I-NEXT: {{ $}}
588 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
589 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p0) :: (load (s256), align 8)
590 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
591 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s256) = G_LOAD [[COPY1]](p0) :: (load (s256), align 8)
592 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s256) = G_ADD [[LOAD]], [[LOAD1]]
593 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD]](s256)
594 ; RV32I-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)
595 ; RV32I-NEXT: $x10 = COPY [[UV]](s32)
596 ; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
597 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
598 %1 = add i256 %x, %y
599 %2 = trunc i256 %x to i64
600 ret i64 %2
601 }
603 define i32 @caller_256i_indirect_reference_in_regs( ) {
604 ; ILP32-LABEL: name: caller_256i_indirect_reference_in_regs
605 ; ILP32: bb.1 (%ir-block.0):
606 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1
607 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2
608 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
609 ; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
610 ; ILP32-NEXT: G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)
611 ; ILP32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
612 ; ILP32-NEXT: G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)
613 ; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
614 ; ILP32-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
615 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
616 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
617 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
618 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
619 ; ILP32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
620 ; ILP32-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
621 ; ILP32-NEXT: $x10 = COPY [[TRUNC]](s32)
622 ; ILP32-NEXT: PseudoRET implicit $x10
623 ;
624 ; ILP32F-LABEL: name: caller_256i_indirect_reference_in_regs
625 ; ILP32F: bb.1 (%ir-block.0):
626 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1
627 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2
628 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
629 ; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
630 ; ILP32F-NEXT: G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)
631 ; ILP32F-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
632 ; ILP32F-NEXT: G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)
633 ; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
634 ; ILP32F-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
635 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
636 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
637 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
638 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
639 ; ILP32F-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
640 ; ILP32F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
641 ; ILP32F-NEXT: $x10 = COPY [[TRUNC]](s32)
642 ; ILP32F-NEXT: PseudoRET implicit $x10
643 ;
644 ; ILP32D-LABEL: name: caller_256i_indirect_reference_in_regs
645 ; ILP32D: bb.1 (%ir-block.0):
646 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1
647 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2
648 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
649 ; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
650 ; ILP32D-NEXT: G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)
651 ; ILP32D-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
652 ; ILP32D-NEXT: G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)
653 ; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
654 ; ILP32D-NEXT: $x11 = COPY [[FRAME_INDEX1]](p0)
655 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11
656 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
657 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
658 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
659 ; ILP32D-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
660 ; ILP32D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)
661 ; ILP32D-NEXT: $x10 = COPY [[TRUNC]](s32)
662 ; ILP32D-NEXT: PseudoRET implicit $x10
663 %1 = call i64 @callee_256i_indirect_reference_in_regs(i256 1, i256 2)
664 %2 = trunc i64 %1 to i32
665 ret i32 %2
666 }
668 ; Check that the stack is used once the GPRs are exhausted
670 define i32 @callee_many_scalars(i8 %a, i16 %b, i32 %c, i64 %d, i32 %e, i32 %f, i64 %g, i32 %h) nounwind {
671 ; RV32I-LABEL: name: callee_many_scalars
672 ; RV32I: bb.1 (%ir-block.0):
673 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
674 ; RV32I-NEXT: {{ $}}
675 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
676 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
677 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
678 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
679 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
680 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
681 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
682 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY3]](s32), [[COPY4]](s32)
683 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15
684 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16
685 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17
686 ; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
687 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.1, align 16)
688 ; RV32I-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY7]](s32), [[LOAD]](s32)
689 ; RV32I-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
690 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.0)
691 ; RV32I-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)
692 ; RV32I-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
693 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[ZEXT1]]
694 ; RV32I-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[COPY2]]
695 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[MV]](s64), [[MV1]]
696 ; RV32I-NEXT: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
697 ; RV32I-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ZEXT2]], [[ADD1]]
698 ; RV32I-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[COPY5]]
699 ; RV32I-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[ADD3]], [[COPY6]]
700 ; RV32I-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[ADD4]], [[LOAD1]]
701 ; RV32I-NEXT: $x10 = COPY [[ADD5]](s32)
702 ; RV32I-NEXT: PseudoRET implicit $x10
703 %a_ext = zext i8 %a to i32
704 %b_ext = zext i16 %b to i32
705 %1 = add i32 %a_ext, %b_ext
706 %2 = add i32 %1, %c
707 %3 = icmp eq i64 %d, %g
708 %4 = zext i1 %3 to i32
709 %5 = add i32 %4, %2
710 %6 = add i32 %5, %e
711 %7 = add i32 %6, %f
712 %8 = add i32 %7, %h
713 ret i32 %8
714 }
716 define i32 @caller_many_scalars() nounwind {
717 ; ILP32-LABEL: name: caller_many_scalars
718 ; ILP32: bb.1 (%ir-block.0):
719 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
720 ; ILP32-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
721 ; ILP32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
722 ; ILP32-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
723 ; ILP32-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
724 ; ILP32-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
725 ; ILP32-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
726 ; ILP32-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
727 ; ILP32-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
728 ; ILP32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)
729 ; ILP32-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)
730 ; ILP32-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
731 ; ILP32-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
732 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
733 ; ILP32-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
734 ; ILP32-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)
735 ; ILP32-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
736 ; ILP32-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
737 ; ILP32-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
738 ; ILP32-NEXT: G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
739 ; ILP32-NEXT: $x10 = COPY [[ANYEXT]](s32)
740 ; ILP32-NEXT: $x11 = COPY [[ANYEXT1]](s32)
741 ; ILP32-NEXT: $x12 = COPY [[C2]](s32)
742 ; ILP32-NEXT: $x13 = COPY [[UV]](s32)
743 ; ILP32-NEXT: $x14 = COPY [[UV1]](s32)
744 ; ILP32-NEXT: $x15 = COPY [[C4]](s32)
745 ; ILP32-NEXT: $x16 = COPY [[C5]](s32)
746 ; ILP32-NEXT: $x17 = COPY [[UV2]](s32)
747 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
748 ; ILP32-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
749 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
750 ; ILP32-NEXT: $x10 = COPY [[COPY1]](s32)
751 ; ILP32-NEXT: PseudoRET implicit $x10
752 ;
753 ; ILP32F-LABEL: name: caller_many_scalars
754 ; ILP32F: bb.1 (%ir-block.0):
755 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
756 ; ILP32F-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
757 ; ILP32F-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
758 ; ILP32F-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
759 ; ILP32F-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
760 ; ILP32F-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
761 ; ILP32F-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
762 ; ILP32F-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
763 ; ILP32F-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
764 ; ILP32F-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)
765 ; ILP32F-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)
766 ; ILP32F-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
767 ; ILP32F-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
768 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
769 ; ILP32F-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
770 ; ILP32F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)
771 ; ILP32F-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
772 ; ILP32F-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
773 ; ILP32F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
774 ; ILP32F-NEXT: G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
775 ; ILP32F-NEXT: $x10 = COPY [[ANYEXT]](s32)
776 ; ILP32F-NEXT: $x11 = COPY [[ANYEXT1]](s32)
777 ; ILP32F-NEXT: $x12 = COPY [[C2]](s32)
778 ; ILP32F-NEXT: $x13 = COPY [[UV]](s32)
779 ; ILP32F-NEXT: $x14 = COPY [[UV1]](s32)
780 ; ILP32F-NEXT: $x15 = COPY [[C4]](s32)
781 ; ILP32F-NEXT: $x16 = COPY [[C5]](s32)
782 ; ILP32F-NEXT: $x17 = COPY [[UV2]](s32)
783 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
784 ; ILP32F-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
785 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
786 ; ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
787 ; ILP32F-NEXT: PseudoRET implicit $x10
788 ;
789 ; ILP32D-LABEL: name: caller_many_scalars
790 ; ILP32D: bb.1 (%ir-block.0):
791 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
792 ; ILP32D-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
793 ; ILP32D-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
794 ; ILP32D-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
795 ; ILP32D-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
796 ; ILP32D-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
797 ; ILP32D-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
798 ; ILP32D-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
799 ; ILP32D-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2
800 ; ILP32D-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)
801 ; ILP32D-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)
802 ; ILP32D-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)
803 ; ILP32D-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)
804 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
805 ; ILP32D-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
806 ; ILP32D-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)
807 ; ILP32D-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)
808 ; ILP32D-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
809 ; ILP32D-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)
810 ; ILP32D-NEXT: G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)
811 ; ILP32D-NEXT: $x10 = COPY [[ANYEXT]](s32)
812 ; ILP32D-NEXT: $x11 = COPY [[ANYEXT1]](s32)
813 ; ILP32D-NEXT: $x12 = COPY [[C2]](s32)
814 ; ILP32D-NEXT: $x13 = COPY [[UV]](s32)
815 ; ILP32D-NEXT: $x14 = COPY [[UV1]](s32)
816 ; ILP32D-NEXT: $x15 = COPY [[C4]](s32)
817 ; ILP32D-NEXT: $x16 = COPY [[C5]](s32)
818 ; ILP32D-NEXT: $x17 = COPY [[UV2]](s32)
819 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
820 ; ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
821 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
822 ; ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
823 ; ILP32D-NEXT: PseudoRET implicit $x10
824 %1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i64 4, i32 5, i32 6, i64 7, i32 8)
825 ret i32 %1
826 }
828 ; Check return of 2x xlen scalars
830 define i64 @callee_small_scalar_ret() nounwind {
831 ; RV32I-LABEL: name: callee_small_scalar_ret
832 ; RV32I: bb.1 (%ir-block.0):
833 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234567898765
834 ; RV32I-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
835 ; RV32I-NEXT: $x10 = COPY [[UV]](s32)
836 ; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
837 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
838 ret i64 1234567898765
839 }
841 define i32 @caller_small_scalar_ret() nounwind {
842 ; ILP32-LABEL: name: caller_small_scalar_ret
843 ; ILP32: bb.1 (%ir-block.0):
844 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
845 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
846 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
847 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
848 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
849 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
850 ; ILP32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
851 ; ILP32-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]
852 ; ILP32-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
853 ; ILP32-NEXT: $x10 = COPY [[ZEXT]](s32)
854 ; ILP32-NEXT: PseudoRET implicit $x10
855 ;
856 ; ILP32F-LABEL: name: caller_small_scalar_ret
857 ; ILP32F: bb.1 (%ir-block.0):
858 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
859 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
860 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
861 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
862 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
863 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
864 ; ILP32F-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
865 ; ILP32F-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]
866 ; ILP32F-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
867 ; ILP32F-NEXT: $x10 = COPY [[ZEXT]](s32)
868 ; ILP32F-NEXT: PseudoRET implicit $x10
869 ;
870 ; ILP32D-LABEL: name: caller_small_scalar_ret
871 ; ILP32D: bb.1 (%ir-block.0):
872 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
873 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
874 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
875 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
876 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
877 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
878 ; ILP32D-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
879 ; ILP32D-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]
880 ; ILP32D-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
881 ; ILP32D-NEXT: $x10 = COPY [[ZEXT]](s32)
882 ; ILP32D-NEXT: PseudoRET implicit $x10
883 %1 = call i64 @callee_small_scalar_ret()
884 %2 = icmp eq i64 987654321234567, %1
885 %3 = zext i1 %2 to i32
886 ret i32 %3
887 }
889 ; Check return of 2x xlen structs
891 %struct.small = type { i32, ptr }
893 define %struct.small @callee_small_struct_ret() nounwind {
894 ; RV32I-LABEL: name: callee_small_struct_ret
895 ; RV32I: bb.1 (%ir-block.0):
896 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
897 ; RV32I-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i32 0
898 ; RV32I-NEXT: $x10 = COPY [[C]](s32)
899 ; RV32I-NEXT: $x11 = COPY [[C1]](p0)
900 ; RV32I-NEXT: PseudoRET implicit $x10, implicit $x11
901 ret %struct.small { i32 1, ptr null }
902 }
904 define i32 @caller_small_struct_ret() nounwind {
905 ; ILP32-LABEL: name: caller_small_struct_ret
906 ; ILP32: bb.1 (%ir-block.0):
907 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
908 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
909 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
910 ; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
911 ; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
912 ; ILP32-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)
913 ; ILP32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]
914 ; ILP32-NEXT: $x10 = COPY [[ADD]](s32)
915 ; ILP32-NEXT: PseudoRET implicit $x10
916 ;
917 ; ILP32F-LABEL: name: caller_small_struct_ret
918 ; ILP32F: bb.1 (%ir-block.0):
919 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
920 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
921 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
922 ; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
923 ; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
924 ; ILP32F-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)
925 ; ILP32F-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]
926 ; ILP32F-NEXT: $x10 = COPY [[ADD]](s32)
927 ; ILP32F-NEXT: PseudoRET implicit $x10
928 ;
929 ; ILP32D-LABEL: name: caller_small_struct_ret
930 ; ILP32D: bb.1 (%ir-block.0):
931 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
932 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
933 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
934 ; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
935 ; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
936 ; ILP32D-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)
937 ; ILP32D-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]
938 ; ILP32D-NEXT: $x10 = COPY [[ADD]](s32)
939 ; ILP32D-NEXT: PseudoRET implicit $x10
940 %1 = call %struct.small @callee_small_struct_ret()
941 %2 = extractvalue %struct.small %1, 0
942 %3 = extractvalue %struct.small %1, 1
943 %4 = ptrtoint ptr %3 to i32
944 %5 = add i32 %2, %4
945 ret i32 %5
946 }
948 ; Check return of >2x xlen structs
950 %struct.large = type { i32, i32, i32, i32 }
952 define void @callee_large_struct_ret(ptr noalias sret(%struct.large) %agg.result) nounwind {
953 ; RV32I-LABEL: name: callee_large_struct_ret
954 ; RV32I: bb.1 (%ir-block.0):
955 ; RV32I-NEXT: liveins: $x10
956 ; RV32I-NEXT: {{ $}}
957 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
958 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
959 ; RV32I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
960 ; RV32I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
961 ; RV32I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
962 ; RV32I-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.agg.result)
963 ; RV32I-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
964 ; RV32I-NEXT: %3:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[C4]](s32)
965 ; RV32I-NEXT: G_STORE [[C1]](s32), %3(p0) :: (store (s32) into %ir.b)
966 ; RV32I-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
967 ; RV32I-NEXT: %6:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[C5]](s32)
968 ; RV32I-NEXT: G_STORE [[C2]](s32), %6(p0) :: (store (s32) into %ir.c)
969 ; RV32I-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
970 ; RV32I-NEXT: %9:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[C6]](s32)
971 ; RV32I-NEXT: G_STORE [[C3]](s32), %9(p0) :: (store (s32) into %ir.d)
972 ; RV32I-NEXT: PseudoRET
973 store i32 1, ptr %agg.result, align 4
974 %b = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 1
975 store i32 2, ptr %b, align 4
976 %c = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 2
977 store i32 3, ptr %c, align 4
978 %d = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 3
979 store i32 4, ptr %d, align 4
980 ret void
981 }
983 define i32 @caller_large_struct_ret() nounwind {
984 ; ILP32-LABEL: name: caller_large_struct_ret
985 ; ILP32: bb.1 (%ir-block.0):
986 ; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
987 ; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
988 ; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
989 ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
990 ; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
991 ; ILP32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
992 ; ILP32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
993 ; ILP32-NEXT: %3:_(p0) = nuw nusw G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)
994 ; ILP32-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD %3(p0) :: (dereferenceable load (s32) from %ir.3)
995 ; ILP32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]
996 ; ILP32-NEXT: $x10 = COPY [[ADD]](s32)
997 ; ILP32-NEXT: PseudoRET implicit $x10
998 ;
999 ; ILP32F-LABEL: name: caller_large_struct_ret
1000 ; ILP32F: bb.1 (%ir-block.0):
1001 ; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
1002 ; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
1003 ; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
1004 ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
1005 ; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
1006 ; ILP32F-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
1007 ; ILP32F-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
1008 ; ILP32F-NEXT: %3:_(p0) = nuw nusw G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)
1009 ; ILP32F-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD %3(p0) :: (dereferenceable load (s32) from %ir.3)
1010 ; ILP32F-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]
1011 ; ILP32F-NEXT: $x10 = COPY [[ADD]](s32)
1012 ; ILP32F-NEXT: PseudoRET implicit $x10
1013 ;
1014 ; ILP32D-LABEL: name: caller_large_struct_ret
1015 ; ILP32D: bb.1 (%ir-block.0):
1016 ; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
1017 ; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
1018 ; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
1019 ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
1020 ; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
1021 ; ILP32D-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
1022 ; ILP32D-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
1023 ; ILP32D-NEXT: %3:_(p0) = nuw nusw G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)
1024 ; ILP32D-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD %3(p0) :: (dereferenceable load (s32) from %ir.3)
1025 ; ILP32D-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]
1026 ; ILP32D-NEXT: $x10 = COPY [[ADD]](s32)
1027 ; ILP32D-NEXT: PseudoRET implicit $x10
1028 %1 = alloca %struct.large
1029 call void @callee_large_struct_ret(ptr sret(%struct.large) %1)
1030 %2 = load i32, ptr %1
1031 %3 = getelementptr inbounds %struct.large, ptr %1, i32 0, i32 3
1032 %4 = load i32, ptr %3
1033 %5 = add i32 %2, %4
1034 ret i32 %5
1035 }