1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2 ; RUN: llc -mtriple=riscv32 -global-isel -global-isel-abort=1 -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefixes=RV32
3 ; RUN: llc -mtriple=riscv64 -global-isel -global-isel-abort=1 -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefixes=RV64
5 define i16 @test_lshr_i48(i48 %x) {
6 ; RV32-LABEL: test_lshr_i48:
8 ; RV32-NEXT: srli a0, a0, 16
11 ; RV64-LABEL: test_lshr_i48:
13 ; RV64-NEXT: srliw a0, a0, 16
15 %lshr = lshr i48 %x, 16
16 %trunc = trunc i48 %lshr to i16
20 define i16 @test_ashr_i48(i48 %x) {
21 ; RV32-LABEL: test_ashr_i48:
23 ; RV32-NEXT: srai a0, a0, 16
26 ; RV64-LABEL: test_ashr_i48:
28 ; RV64-NEXT: sraiw a0, a0, 16
30 %ashr = ashr i48 %x, 16
31 %trunc = trunc i48 %ashr to i16
35 define i16 @test_shl_i48(i48 %x) {
36 ; RV32-LABEL: test_shl_i48:
38 ; RV32-NEXT: slli a0, a0, 8
41 ; RV64-LABEL: test_shl_i48:
43 ; RV64-NEXT: slliw a0, a0, 8
46 %trunc = trunc i48 %shl to i16