| blob | c88b2bf596ca2335f0755b2df419909545b603de |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32I
3 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64I
4 ; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32IF
5 ; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IF
6 ; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32-ILP32F
7 ; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64-LP64F
8 ; RUN: llc -mtriple=riscv32 -mattr=+f,+zfhmin -target-abi=ilp32f -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32-ILP32ZFHMIN
9 ; RUN: llc -mtriple=riscv64 -mattr=+f,+zfhmin -target-abi=lp64f -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64-LP64ZFHMIN
11 ; Tests passing half arguments and returns without Zfh.
12 ; Covers with and without F extension and ilp32f/ilp64f
13 ; calling conventions.
15 define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
16 ; RV32I-LABEL: callee_half_in_regs:
17 ; RV32I: # %bb.0:
18 ; RV32I-NEXT: addi sp, sp, -16
19 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
20 ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
21 ; RV32I-NEXT: mv s0, a0
22 ; RV32I-NEXT: slli a0, a1, 16
23 ; RV32I-NEXT: srli a0, a0, 16
24 ; RV32I-NEXT: call __extendhfsf2
25 ; RV32I-NEXT: call __fixsfsi
26 ; RV32I-NEXT: add a0, s0, a0
27 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
28 ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
29 ; RV32I-NEXT: addi sp, sp, 16
30 ; RV32I-NEXT: ret
31 ;
32 ; RV64I-LABEL: callee_half_in_regs:
33 ; RV64I: # %bb.0:
34 ; RV64I-NEXT: addi sp, sp, -16
35 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
36 ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
37 ; RV64I-NEXT: mv s0, a0
38 ; RV64I-NEXT: slli a0, a1, 48
39 ; RV64I-NEXT: srli a0, a0, 48
40 ; RV64I-NEXT: call __extendhfsf2
41 ; RV64I-NEXT: call __fixsfdi
42 ; RV64I-NEXT: addw a0, s0, a0
43 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
44 ; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
45 ; RV64I-NEXT: addi sp, sp, 16
46 ; RV64I-NEXT: ret
47 ;
48 ; RV32IF-LABEL: callee_half_in_regs:
49 ; RV32IF: # %bb.0:
50 ; RV32IF-NEXT: addi sp, sp, -16
51 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
52 ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
53 ; RV32IF-NEXT: mv s0, a0
54 ; RV32IF-NEXT: mv a0, a1
55 ; RV32IF-NEXT: call __extendhfsf2
56 ; RV32IF-NEXT: fmv.w.x fa5, a0
57 ; RV32IF-NEXT: fcvt.w.s a0, fa5, rtz
58 ; RV32IF-NEXT: add a0, s0, a0
59 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
60 ; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
61 ; RV32IF-NEXT: addi sp, sp, 16
62 ; RV32IF-NEXT: ret
63 ;
64 ; RV64IF-LABEL: callee_half_in_regs:
65 ; RV64IF: # %bb.0:
66 ; RV64IF-NEXT: addi sp, sp, -16
67 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
68 ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
69 ; RV64IF-NEXT: mv s0, a0
70 ; RV64IF-NEXT: mv a0, a1
71 ; RV64IF-NEXT: call __extendhfsf2
72 ; RV64IF-NEXT: fmv.w.x fa5, a0
73 ; RV64IF-NEXT: fcvt.l.s a0, fa5, rtz
74 ; RV64IF-NEXT: addw a0, s0, a0
75 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
76 ; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
77 ; RV64IF-NEXT: addi sp, sp, 16
78 ; RV64IF-NEXT: ret
79 ;
80 ; RV32-ILP32F-LABEL: callee_half_in_regs:
81 ; RV32-ILP32F: # %bb.0:
82 ; RV32-ILP32F-NEXT: addi sp, sp, -16
83 ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
84 ; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
85 ; RV32-ILP32F-NEXT: mv s0, a0
86 ; RV32-ILP32F-NEXT: call __extendhfsf2
87 ; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
88 ; RV32-ILP32F-NEXT: add a0, s0, a0
89 ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
90 ; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
91 ; RV32-ILP32F-NEXT: addi sp, sp, 16
92 ; RV32-ILP32F-NEXT: ret
93 ;
94 ; RV64-LP64F-LABEL: callee_half_in_regs:
95 ; RV64-LP64F: # %bb.0:
96 ; RV64-LP64F-NEXT: addi sp, sp, -16
97 ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
98 ; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
99 ; RV64-LP64F-NEXT: mv s0, a0
100 ; RV64-LP64F-NEXT: call __extendhfsf2
101 ; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
102 ; RV64-LP64F-NEXT: addw a0, s0, a0
103 ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
104 ; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
105 ; RV64-LP64F-NEXT: addi sp, sp, 16
106 ; RV64-LP64F-NEXT: ret
107 ;
108 ; RV32-ILP32ZFHMIN-LABEL: callee_half_in_regs:
109 ; RV32-ILP32ZFHMIN: # %bb.0:
110 ; RV32-ILP32ZFHMIN-NEXT: fcvt.s.h fa5, fa0
111 ; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a1, fa5, rtz
112 ; RV32-ILP32ZFHMIN-NEXT: add a0, a0, a1
113 ; RV32-ILP32ZFHMIN-NEXT: ret
114 ;
115 ; RV64-LP64ZFHMIN-LABEL: callee_half_in_regs:
116 ; RV64-LP64ZFHMIN: # %bb.0:
117 ; RV64-LP64ZFHMIN-NEXT: fcvt.s.h fa5, fa0
118 ; RV64-LP64ZFHMIN-NEXT: fcvt.w.s a1, fa5, rtz
119 ; RV64-LP64ZFHMIN-NEXT: addw a0, a0, a1
120 ; RV64-LP64ZFHMIN-NEXT: ret
121 %b_fptosi = fptosi half %b to i32
122 %1 = add i32 %a, %b_fptosi
123 ret i32 %1
124 }
126 define i32 @caller_half_in_regs() nounwind {
127 ; RV32I-LABEL: caller_half_in_regs:
128 ; RV32I: # %bb.0:
129 ; RV32I-NEXT: addi sp, sp, -16
130 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
131 ; RV32I-NEXT: li a0, 1
132 ; RV32I-NEXT: lui a1, 4
133 ; RV32I-NEXT: call callee_half_in_regs
134 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
135 ; RV32I-NEXT: addi sp, sp, 16
136 ; RV32I-NEXT: ret
137 ;
138 ; RV64I-LABEL: caller_half_in_regs:
139 ; RV64I: # %bb.0:
140 ; RV64I-NEXT: addi sp, sp, -16
141 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
142 ; RV64I-NEXT: li a0, 1
143 ; RV64I-NEXT: lui a1, 4
144 ; RV64I-NEXT: call callee_half_in_regs
145 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
146 ; RV64I-NEXT: addi sp, sp, 16
147 ; RV64I-NEXT: ret
148 ;
149 ; RV32IF-LABEL: caller_half_in_regs:
150 ; RV32IF: # %bb.0:
151 ; RV32IF-NEXT: addi sp, sp, -16
152 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
153 ; RV32IF-NEXT: li a0, 1
154 ; RV32IF-NEXT: lui a1, 1048564
155 ; RV32IF-NEXT: call callee_half_in_regs
156 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
157 ; RV32IF-NEXT: addi sp, sp, 16
158 ; RV32IF-NEXT: ret
159 ;
160 ; RV64IF-LABEL: caller_half_in_regs:
161 ; RV64IF: # %bb.0:
162 ; RV64IF-NEXT: addi sp, sp, -16
163 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
164 ; RV64IF-NEXT: lui a0, 1048564
165 ; RV64IF-NEXT: fmv.w.x fa5, a0
166 ; RV64IF-NEXT: fmv.x.w a1, fa5
167 ; RV64IF-NEXT: li a0, 1
168 ; RV64IF-NEXT: call callee_half_in_regs
169 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
170 ; RV64IF-NEXT: addi sp, sp, 16
171 ; RV64IF-NEXT: ret
172 ;
173 ; RV32-ILP32F-LABEL: caller_half_in_regs:
174 ; RV32-ILP32F: # %bb.0:
175 ; RV32-ILP32F-NEXT: addi sp, sp, -16
176 ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
177 ; RV32-ILP32F-NEXT: lui a0, 1048564
178 ; RV32-ILP32F-NEXT: fmv.w.x fa0, a0
179 ; RV32-ILP32F-NEXT: li a0, 1
180 ; RV32-ILP32F-NEXT: call callee_half_in_regs
181 ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
182 ; RV32-ILP32F-NEXT: addi sp, sp, 16
183 ; RV32-ILP32F-NEXT: ret
184 ;
185 ; RV64-LP64F-LABEL: caller_half_in_regs:
186 ; RV64-LP64F: # %bb.0:
187 ; RV64-LP64F-NEXT: addi sp, sp, -16
188 ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
189 ; RV64-LP64F-NEXT: lui a0, 1048564
190 ; RV64-LP64F-NEXT: fmv.w.x fa0, a0
191 ; RV64-LP64F-NEXT: li a0, 1
192 ; RV64-LP64F-NEXT: call callee_half_in_regs
193 ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
194 ; RV64-LP64F-NEXT: addi sp, sp, 16
195 ; RV64-LP64F-NEXT: ret
196 ;
197 ; RV32-ILP32ZFHMIN-LABEL: caller_half_in_regs:
198 ; RV32-ILP32ZFHMIN: # %bb.0:
199 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, -16
200 ; RV32-ILP32ZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
201 ; RV32-ILP32ZFHMIN-NEXT: lui a0, 4
202 ; RV32-ILP32ZFHMIN-NEXT: fmv.h.x fa0, a0
203 ; RV32-ILP32ZFHMIN-NEXT: li a0, 1
204 ; RV32-ILP32ZFHMIN-NEXT: call callee_half_in_regs
205 ; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
206 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, 16
207 ; RV32-ILP32ZFHMIN-NEXT: ret
208 ;
209 ; RV64-LP64ZFHMIN-LABEL: caller_half_in_regs:
210 ; RV64-LP64ZFHMIN: # %bb.0:
211 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, -16
212 ; RV64-LP64ZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
213 ; RV64-LP64ZFHMIN-NEXT: lui a0, 4
214 ; RV64-LP64ZFHMIN-NEXT: fmv.h.x fa0, a0
215 ; RV64-LP64ZFHMIN-NEXT: li a0, 1
216 ; RV64-LP64ZFHMIN-NEXT: call callee_half_in_regs
217 ; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
218 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, 16
219 ; RV64-LP64ZFHMIN-NEXT: ret
220 %1 = call i32 @callee_half_in_regs(i32 1, half 2.0)
221 ret i32 %1
222 }
224 define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, half %i) nounwind {
225 ; RV32I-LABEL: callee_half_on_stack:
226 ; RV32I: # %bb.0:
227 ; RV32I-NEXT: addi sp, sp, -16
228 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
229 ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
230 ; RV32I-NEXT: lhu a0, 16(sp)
231 ; RV32I-NEXT: mv s0, a7
232 ; RV32I-NEXT: call __extendhfsf2
233 ; RV32I-NEXT: call __fixsfsi
234 ; RV32I-NEXT: add a0, s0, a0
235 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
236 ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
237 ; RV32I-NEXT: addi sp, sp, 16
238 ; RV32I-NEXT: ret
239 ;
240 ; RV64I-LABEL: callee_half_on_stack:
241 ; RV64I: # %bb.0:
242 ; RV64I-NEXT: addi sp, sp, -16
243 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
244 ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
245 ; RV64I-NEXT: lhu a0, 16(sp)
246 ; RV64I-NEXT: mv s0, a7
247 ; RV64I-NEXT: call __extendhfsf2
248 ; RV64I-NEXT: call __fixsfdi
249 ; RV64I-NEXT: addw a0, s0, a0
250 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
251 ; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
252 ; RV64I-NEXT: addi sp, sp, 16
253 ; RV64I-NEXT: ret
254 ;
255 ; RV32IF-LABEL: callee_half_on_stack:
256 ; RV32IF: # %bb.0:
257 ; RV32IF-NEXT: addi sp, sp, -16
258 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
259 ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
260 ; RV32IF-NEXT: lhu a0, 16(sp)
261 ; RV32IF-NEXT: mv s0, a7
262 ; RV32IF-NEXT: call __extendhfsf2
263 ; RV32IF-NEXT: fmv.w.x fa5, a0
264 ; RV32IF-NEXT: fcvt.w.s a0, fa5, rtz
265 ; RV32IF-NEXT: add a0, s0, a0
266 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
267 ; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
268 ; RV32IF-NEXT: addi sp, sp, 16
269 ; RV32IF-NEXT: ret
270 ;
271 ; RV64IF-LABEL: callee_half_on_stack:
272 ; RV64IF: # %bb.0:
273 ; RV64IF-NEXT: addi sp, sp, -16
274 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
275 ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
276 ; RV64IF-NEXT: lhu a0, 16(sp)
277 ; RV64IF-NEXT: mv s0, a7
278 ; RV64IF-NEXT: call __extendhfsf2
279 ; RV64IF-NEXT: fmv.w.x fa5, a0
280 ; RV64IF-NEXT: fcvt.l.s a0, fa5, rtz
281 ; RV64IF-NEXT: addw a0, s0, a0
282 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
283 ; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
284 ; RV64IF-NEXT: addi sp, sp, 16
285 ; RV64IF-NEXT: ret
286 ;
287 ; RV32-ILP32F-LABEL: callee_half_on_stack:
288 ; RV32-ILP32F: # %bb.0:
289 ; RV32-ILP32F-NEXT: addi sp, sp, -16
290 ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
291 ; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
292 ; RV32-ILP32F-NEXT: mv s0, a7
293 ; RV32-ILP32F-NEXT: call __extendhfsf2
294 ; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
295 ; RV32-ILP32F-NEXT: add a0, s0, a0
296 ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
297 ; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
298 ; RV32-ILP32F-NEXT: addi sp, sp, 16
299 ; RV32-ILP32F-NEXT: ret
300 ;
301 ; RV64-LP64F-LABEL: callee_half_on_stack:
302 ; RV64-LP64F: # %bb.0:
303 ; RV64-LP64F-NEXT: addi sp, sp, -16
304 ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
305 ; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
306 ; RV64-LP64F-NEXT: mv s0, a7
307 ; RV64-LP64F-NEXT: call __extendhfsf2
308 ; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
309 ; RV64-LP64F-NEXT: addw a0, s0, a0
310 ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
311 ; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
312 ; RV64-LP64F-NEXT: addi sp, sp, 16
313 ; RV64-LP64F-NEXT: ret
314 ;
315 ; RV32-ILP32ZFHMIN-LABEL: callee_half_on_stack:
316 ; RV32-ILP32ZFHMIN: # %bb.0:
317 ; RV32-ILP32ZFHMIN-NEXT: fcvt.s.h fa5, fa0
318 ; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz
319 ; RV32-ILP32ZFHMIN-NEXT: add a0, a7, a0
320 ; RV32-ILP32ZFHMIN-NEXT: ret
321 ;
322 ; RV64-LP64ZFHMIN-LABEL: callee_half_on_stack:
323 ; RV64-LP64ZFHMIN: # %bb.0:
324 ; RV64-LP64ZFHMIN-NEXT: fcvt.s.h fa5, fa0
325 ; RV64-LP64ZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz
326 ; RV64-LP64ZFHMIN-NEXT: addw a0, a7, a0
327 ; RV64-LP64ZFHMIN-NEXT: ret
328 %1 = fptosi half %i to i32
329 %2 = add i32 %h, %1
330 ret i32 %2
331 }
333 define i32 @caller_half_on_stack() nounwind {
334 ; RV32I-LABEL: caller_half_on_stack:
335 ; RV32I: # %bb.0:
336 ; RV32I-NEXT: addi sp, sp, -16
337 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
338 ; RV32I-NEXT: lui a0, 5
339 ; RV32I-NEXT: addi t0, a0, -1792
340 ; RV32I-NEXT: li a0, 1
341 ; RV32I-NEXT: li a1, 2
342 ; RV32I-NEXT: li a2, 3
343 ; RV32I-NEXT: li a3, 4
344 ; RV32I-NEXT: li a4, 5
345 ; RV32I-NEXT: li a5, 6
346 ; RV32I-NEXT: li a6, 7
347 ; RV32I-NEXT: li a7, 8
348 ; RV32I-NEXT: sw t0, 0(sp)
349 ; RV32I-NEXT: call callee_half_on_stack
350 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
351 ; RV32I-NEXT: addi sp, sp, 16
352 ; RV32I-NEXT: ret
353 ;
354 ; RV64I-LABEL: caller_half_on_stack:
355 ; RV64I: # %bb.0:
356 ; RV64I-NEXT: addi sp, sp, -16
357 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
358 ; RV64I-NEXT: lui a0, 5
359 ; RV64I-NEXT: addiw t0, a0, -1792
360 ; RV64I-NEXT: li a0, 1
361 ; RV64I-NEXT: li a1, 2
362 ; RV64I-NEXT: li a2, 3
363 ; RV64I-NEXT: li a3, 4
364 ; RV64I-NEXT: li a4, 5
365 ; RV64I-NEXT: li a5, 6
366 ; RV64I-NEXT: li a6, 7
367 ; RV64I-NEXT: li a7, 8
368 ; RV64I-NEXT: sd t0, 0(sp)
369 ; RV64I-NEXT: call callee_half_on_stack
370 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
371 ; RV64I-NEXT: addi sp, sp, 16
372 ; RV64I-NEXT: ret
373 ;
374 ; RV32IF-LABEL: caller_half_on_stack:
375 ; RV32IF: # %bb.0:
376 ; RV32IF-NEXT: addi sp, sp, -16
377 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
378 ; RV32IF-NEXT: lui a0, 1048565
379 ; RV32IF-NEXT: addi t0, a0, -1792
380 ; RV32IF-NEXT: li a0, 1
381 ; RV32IF-NEXT: li a1, 2
382 ; RV32IF-NEXT: li a2, 3
383 ; RV32IF-NEXT: li a3, 4
384 ; RV32IF-NEXT: li a4, 5
385 ; RV32IF-NEXT: li a5, 6
386 ; RV32IF-NEXT: li a6, 7
387 ; RV32IF-NEXT: li a7, 8
388 ; RV32IF-NEXT: sw t0, 0(sp)
389 ; RV32IF-NEXT: call callee_half_on_stack
390 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
391 ; RV32IF-NEXT: addi sp, sp, 16
392 ; RV32IF-NEXT: ret
393 ;
394 ; RV64IF-LABEL: caller_half_on_stack:
395 ; RV64IF: # %bb.0:
396 ; RV64IF-NEXT: addi sp, sp, -16
397 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
398 ; RV64IF-NEXT: lui a0, 1048565
399 ; RV64IF-NEXT: addi t0, a0, -1792
400 ; RV64IF-NEXT: li a0, 1
401 ; RV64IF-NEXT: li a1, 2
402 ; RV64IF-NEXT: li a2, 3
403 ; RV64IF-NEXT: li a3, 4
404 ; RV64IF-NEXT: li a4, 5
405 ; RV64IF-NEXT: li a5, 6
406 ; RV64IF-NEXT: li a6, 7
407 ; RV64IF-NEXT: li a7, 8
408 ; RV64IF-NEXT: sw t0, 0(sp)
409 ; RV64IF-NEXT: call callee_half_on_stack
410 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
411 ; RV64IF-NEXT: addi sp, sp, 16
412 ; RV64IF-NEXT: ret
413 ;
414 ; RV32-ILP32F-LABEL: caller_half_on_stack:
415 ; RV32-ILP32F: # %bb.0:
416 ; RV32-ILP32F-NEXT: addi sp, sp, -16
417 ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
418 ; RV32-ILP32F-NEXT: lui a0, %hi(.LCPI3_0)
419 ; RV32-ILP32F-NEXT: flw fa0, %lo(.LCPI3_0)(a0)
420 ; RV32-ILP32F-NEXT: li a0, 1
421 ; RV32-ILP32F-NEXT: li a1, 2
422 ; RV32-ILP32F-NEXT: li a2, 3
423 ; RV32-ILP32F-NEXT: li a3, 4
424 ; RV32-ILP32F-NEXT: li a4, 5
425 ; RV32-ILP32F-NEXT: li a5, 6
426 ; RV32-ILP32F-NEXT: li a6, 7
427 ; RV32-ILP32F-NEXT: li a7, 8
428 ; RV32-ILP32F-NEXT: call callee_half_on_stack
429 ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
430 ; RV32-ILP32F-NEXT: addi sp, sp, 16
431 ; RV32-ILP32F-NEXT: ret
432 ;
433 ; RV64-LP64F-LABEL: caller_half_on_stack:
434 ; RV64-LP64F: # %bb.0:
435 ; RV64-LP64F-NEXT: addi sp, sp, -16
436 ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
437 ; RV64-LP64F-NEXT: lui a0, %hi(.LCPI3_0)
438 ; RV64-LP64F-NEXT: flw fa0, %lo(.LCPI3_0)(a0)
439 ; RV64-LP64F-NEXT: li a0, 1
440 ; RV64-LP64F-NEXT: li a1, 2
441 ; RV64-LP64F-NEXT: li a2, 3
442 ; RV64-LP64F-NEXT: li a3, 4
443 ; RV64-LP64F-NEXT: li a4, 5
444 ; RV64-LP64F-NEXT: li a5, 6
445 ; RV64-LP64F-NEXT: li a6, 7
446 ; RV64-LP64F-NEXT: li a7, 8
447 ; RV64-LP64F-NEXT: call callee_half_on_stack
448 ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
449 ; RV64-LP64F-NEXT: addi sp, sp, 16
450 ; RV64-LP64F-NEXT: ret
451 ;
452 ; RV32-ILP32ZFHMIN-LABEL: caller_half_on_stack:
453 ; RV32-ILP32ZFHMIN: # %bb.0:
454 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, -16
455 ; RV32-ILP32ZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
456 ; RV32-ILP32ZFHMIN-NEXT: lui a0, %hi(.LCPI3_0)
457 ; RV32-ILP32ZFHMIN-NEXT: flh fa0, %lo(.LCPI3_0)(a0)
458 ; RV32-ILP32ZFHMIN-NEXT: li a0, 1
459 ; RV32-ILP32ZFHMIN-NEXT: li a1, 2
460 ; RV32-ILP32ZFHMIN-NEXT: li a2, 3
461 ; RV32-ILP32ZFHMIN-NEXT: li a3, 4
462 ; RV32-ILP32ZFHMIN-NEXT: li a4, 5
463 ; RV32-ILP32ZFHMIN-NEXT: li a5, 6
464 ; RV32-ILP32ZFHMIN-NEXT: li a6, 7
465 ; RV32-ILP32ZFHMIN-NEXT: li a7, 8
466 ; RV32-ILP32ZFHMIN-NEXT: call callee_half_on_stack
467 ; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
468 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, 16
469 ; RV32-ILP32ZFHMIN-NEXT: ret
470 ;
471 ; RV64-LP64ZFHMIN-LABEL: caller_half_on_stack:
472 ; RV64-LP64ZFHMIN: # %bb.0:
473 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, -16
474 ; RV64-LP64ZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
475 ; RV64-LP64ZFHMIN-NEXT: lui a0, %hi(.LCPI3_0)
476 ; RV64-LP64ZFHMIN-NEXT: flh fa0, %lo(.LCPI3_0)(a0)
477 ; RV64-LP64ZFHMIN-NEXT: li a0, 1
478 ; RV64-LP64ZFHMIN-NEXT: li a1, 2
479 ; RV64-LP64ZFHMIN-NEXT: li a2, 3
480 ; RV64-LP64ZFHMIN-NEXT: li a3, 4
481 ; RV64-LP64ZFHMIN-NEXT: li a4, 5
482 ; RV64-LP64ZFHMIN-NEXT: li a5, 6
483 ; RV64-LP64ZFHMIN-NEXT: li a6, 7
484 ; RV64-LP64ZFHMIN-NEXT: li a7, 8
485 ; RV64-LP64ZFHMIN-NEXT: call callee_half_on_stack
486 ; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
487 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, 16
488 ; RV64-LP64ZFHMIN-NEXT: ret
489 %1 = call i32 @callee_half_on_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, half 10.0)
490 ret i32 %1
491 }
493 define half @callee_half_ret() nounwind {
494 ; RV32I-LABEL: callee_half_ret:
495 ; RV32I: # %bb.0:
496 ; RV32I-NEXT: li a0, 15
497 ; RV32I-NEXT: slli a0, a0, 10
498 ; RV32I-NEXT: ret
499 ;
500 ; RV64I-LABEL: callee_half_ret:
501 ; RV64I: # %bb.0:
502 ; RV64I-NEXT: li a0, 15
503 ; RV64I-NEXT: slli a0, a0, 10
504 ; RV64I-NEXT: ret
505 ;
506 ; RV32IF-LABEL: callee_half_ret:
507 ; RV32IF: # %bb.0:
508 ; RV32IF-NEXT: lui a0, 1048564
509 ; RV32IF-NEXT: addi a0, a0, -1024
510 ; RV32IF-NEXT: ret
511 ;
512 ; RV64IF-LABEL: callee_half_ret:
513 ; RV64IF: # %bb.0:
514 ; RV64IF-NEXT: lui a0, %hi(.LCPI4_0)
515 ; RV64IF-NEXT: flw fa5, %lo(.LCPI4_0)(a0)
516 ; RV64IF-NEXT: fmv.x.w a0, fa5
517 ; RV64IF-NEXT: ret
518 ;
519 ; RV32-ILP32F-LABEL: callee_half_ret:
520 ; RV32-ILP32F: # %bb.0:
521 ; RV32-ILP32F-NEXT: lui a0, %hi(.LCPI4_0)
522 ; RV32-ILP32F-NEXT: flw fa0, %lo(.LCPI4_0)(a0)
523 ; RV32-ILP32F-NEXT: ret
524 ;
525 ; RV64-LP64F-LABEL: callee_half_ret:
526 ; RV64-LP64F: # %bb.0:
527 ; RV64-LP64F-NEXT: lui a0, %hi(.LCPI4_0)
528 ; RV64-LP64F-NEXT: flw fa0, %lo(.LCPI4_0)(a0)
529 ; RV64-LP64F-NEXT: ret
530 ;
531 ; RV32-ILP32ZFHMIN-LABEL: callee_half_ret:
532 ; RV32-ILP32ZFHMIN: # %bb.0:
533 ; RV32-ILP32ZFHMIN-NEXT: lui a0, %hi(.LCPI4_0)
534 ; RV32-ILP32ZFHMIN-NEXT: flh fa0, %lo(.LCPI4_0)(a0)
535 ; RV32-ILP32ZFHMIN-NEXT: ret
536 ;
537 ; RV64-LP64ZFHMIN-LABEL: callee_half_ret:
538 ; RV64-LP64ZFHMIN: # %bb.0:
539 ; RV64-LP64ZFHMIN-NEXT: lui a0, %hi(.LCPI4_0)
540 ; RV64-LP64ZFHMIN-NEXT: flh fa0, %lo(.LCPI4_0)(a0)
541 ; RV64-LP64ZFHMIN-NEXT: ret
542 ret half 1.0
543 }
545 define i32 @caller_half_ret() nounwind {
546 ; RV32I-LABEL: caller_half_ret:
547 ; RV32I: # %bb.0:
548 ; RV32I-NEXT: addi sp, sp, -16
549 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
550 ; RV32I-NEXT: call callee_half_ret
551 ; RV32I-NEXT: slli a0, a0, 16
552 ; RV32I-NEXT: srli a0, a0, 16
553 ; RV32I-NEXT: call __extendhfsf2
554 ; RV32I-NEXT: call __fixsfsi
555 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
556 ; RV32I-NEXT: addi sp, sp, 16
557 ; RV32I-NEXT: ret
558 ;
559 ; RV64I-LABEL: caller_half_ret:
560 ; RV64I: # %bb.0:
561 ; RV64I-NEXT: addi sp, sp, -16
562 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
563 ; RV64I-NEXT: call callee_half_ret
564 ; RV64I-NEXT: slli a0, a0, 48
565 ; RV64I-NEXT: srli a0, a0, 48
566 ; RV64I-NEXT: call __extendhfsf2
567 ; RV64I-NEXT: call __fixsfdi
568 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
569 ; RV64I-NEXT: addi sp, sp, 16
570 ; RV64I-NEXT: ret
571 ;
572 ; RV32IF-LABEL: caller_half_ret:
573 ; RV32IF: # %bb.0:
574 ; RV32IF-NEXT: addi sp, sp, -16
575 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
576 ; RV32IF-NEXT: call callee_half_ret
577 ; RV32IF-NEXT: call __extendhfsf2
578 ; RV32IF-NEXT: fmv.w.x fa5, a0
579 ; RV32IF-NEXT: fcvt.w.s a0, fa5, rtz
580 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
581 ; RV32IF-NEXT: addi sp, sp, 16
582 ; RV32IF-NEXT: ret
583 ;
584 ; RV64IF-LABEL: caller_half_ret:
585 ; RV64IF: # %bb.0:
586 ; RV64IF-NEXT: addi sp, sp, -16
587 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
588 ; RV64IF-NEXT: call callee_half_ret
589 ; RV64IF-NEXT: call __extendhfsf2
590 ; RV64IF-NEXT: fmv.w.x fa5, a0
591 ; RV64IF-NEXT: fcvt.l.s a0, fa5, rtz
592 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
593 ; RV64IF-NEXT: addi sp, sp, 16
594 ; RV64IF-NEXT: ret
595 ;
596 ; RV32-ILP32F-LABEL: caller_half_ret:
597 ; RV32-ILP32F: # %bb.0:
598 ; RV32-ILP32F-NEXT: addi sp, sp, -16
599 ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
600 ; RV32-ILP32F-NEXT: call callee_half_ret
601 ; RV32-ILP32F-NEXT: call __extendhfsf2
602 ; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
603 ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
604 ; RV32-ILP32F-NEXT: addi sp, sp, 16
605 ; RV32-ILP32F-NEXT: ret
606 ;
607 ; RV64-LP64F-LABEL: caller_half_ret:
608 ; RV64-LP64F: # %bb.0:
609 ; RV64-LP64F-NEXT: addi sp, sp, -16
610 ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
611 ; RV64-LP64F-NEXT: call callee_half_ret
612 ; RV64-LP64F-NEXT: call __extendhfsf2
613 ; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
614 ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
615 ; RV64-LP64F-NEXT: addi sp, sp, 16
616 ; RV64-LP64F-NEXT: ret
617 ;
618 ; RV32-ILP32ZFHMIN-LABEL: caller_half_ret:
619 ; RV32-ILP32ZFHMIN: # %bb.0:
620 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, -16
621 ; RV32-ILP32ZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
622 ; RV32-ILP32ZFHMIN-NEXT: call callee_half_ret
623 ; RV32-ILP32ZFHMIN-NEXT: fcvt.s.h fa5, fa0
624 ; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz
625 ; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
626 ; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, 16
627 ; RV32-ILP32ZFHMIN-NEXT: ret
628 ;
629 ; RV64-LP64ZFHMIN-LABEL: caller_half_ret:
630 ; RV64-LP64ZFHMIN: # %bb.0:
631 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, -16
632 ; RV64-LP64ZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
633 ; RV64-LP64ZFHMIN-NEXT: call callee_half_ret
634 ; RV64-LP64ZFHMIN-NEXT: fcvt.s.h fa5, fa0
635 ; RV64-LP64ZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz
636 ; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
637 ; RV64-LP64ZFHMIN-NEXT: addi sp, sp, 16
638 ; RV64-LP64ZFHMIN-NEXT: ret
639 %1 = call half @callee_half_ret()
640 %2 = fptosi half %1 to i32
641 ret i32 %2
642 }