| blob | 1dac139503ba75638a340b39a9eed69afa208094 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=RV32I-FPELIM %s
4 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
5 ; RUN: | FileCheck -check-prefix=RV32I-WITHFP %s
7 ; As well as calling convention details, we check that ra and fp are
8 ; consistently stored to fp-4 and fp-8.
10 ; Any tests that would have identical output for some combination of the ilp32*
11 ; ABIs belong in calling-conv-*-common.ll. This file contains tests that will
12 ; have different output across those ABIs. i.e. where some arguments would be
13 ; passed according to the floating point ABI.
15 define i32 @callee_float_in_regs(i32 %a, float %b) nounwind {
16 ; RV32I-FPELIM-LABEL: callee_float_in_regs:
17 ; RV32I-FPELIM: # %bb.0:
18 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
19 ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
20 ; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
21 ; RV32I-FPELIM-NEXT: mv s0, a0
22 ; RV32I-FPELIM-NEXT: mv a0, a1
23 ; RV32I-FPELIM-NEXT: call __fixsfsi
24 ; RV32I-FPELIM-NEXT: add a0, s0, a0
25 ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
26 ; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
27 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
28 ; RV32I-FPELIM-NEXT: ret
29 ;
30 ; RV32I-WITHFP-LABEL: callee_float_in_regs:
31 ; RV32I-WITHFP: # %bb.0:
32 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
33 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
34 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
35 ; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
36 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
37 ; RV32I-WITHFP-NEXT: mv s1, a0
38 ; RV32I-WITHFP-NEXT: mv a0, a1
39 ; RV32I-WITHFP-NEXT: call __fixsfsi
40 ; RV32I-WITHFP-NEXT: add a0, s1, a0
41 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
42 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
43 ; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
44 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
45 ; RV32I-WITHFP-NEXT: ret
46 %b_fptosi = fptosi float %b to i32
47 %1 = add i32 %a, %b_fptosi
48 ret i32 %1
49 }
51 define i32 @caller_float_in_regs() nounwind {
52 ; RV32I-FPELIM-LABEL: caller_float_in_regs:
53 ; RV32I-FPELIM: # %bb.0:
54 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
55 ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
56 ; RV32I-FPELIM-NEXT: li a0, 1
57 ; RV32I-FPELIM-NEXT: lui a1, 262144
58 ; RV32I-FPELIM-NEXT: call callee_float_in_regs
59 ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
60 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
61 ; RV32I-FPELIM-NEXT: ret
62 ;
63 ; RV32I-WITHFP-LABEL: caller_float_in_regs:
64 ; RV32I-WITHFP: # %bb.0:
65 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
66 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
67 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
68 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
69 ; RV32I-WITHFP-NEXT: li a0, 1
70 ; RV32I-WITHFP-NEXT: lui a1, 262144
71 ; RV32I-WITHFP-NEXT: call callee_float_in_regs
72 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
73 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
74 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
75 ; RV32I-WITHFP-NEXT: ret
76 %1 = call i32 @callee_float_in_regs(i32 1, float 2.0)
77 ret i32 %1
78 }
80 define i32 @callee_float_on_stack(i64 %a, i64 %b, i64 %c, i64 %d, float %e) nounwind {
81 ; RV32I-FPELIM-LABEL: callee_float_on_stack:
82 ; RV32I-FPELIM: # %bb.0:
83 ; RV32I-FPELIM-NEXT: lw a0, 0(sp)
84 ; RV32I-FPELIM-NEXT: add a0, a6, a0
85 ; RV32I-FPELIM-NEXT: ret
86 ;
87 ; RV32I-WITHFP-LABEL: callee_float_on_stack:
88 ; RV32I-WITHFP: # %bb.0:
89 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
90 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
91 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
92 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
93 ; RV32I-WITHFP-NEXT: lw a0, 0(s0)
94 ; RV32I-WITHFP-NEXT: add a0, a6, a0
95 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
96 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
97 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
98 ; RV32I-WITHFP-NEXT: ret
99 %1 = trunc i64 %d to i32
100 %2 = bitcast float %e to i32
101 %3 = add i32 %1, %2
102 ret i32 %3
103 }
105 define i32 @caller_float_on_stack() nounwind {
106 ; RV32I-FPELIM-LABEL: caller_float_on_stack:
107 ; RV32I-FPELIM: # %bb.0:
108 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
109 ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
110 ; RV32I-FPELIM-NEXT: lui a1, 264704
111 ; RV32I-FPELIM-NEXT: li a0, 1
112 ; RV32I-FPELIM-NEXT: li a2, 2
113 ; RV32I-FPELIM-NEXT: li a4, 3
114 ; RV32I-FPELIM-NEXT: li a6, 4
115 ; RV32I-FPELIM-NEXT: sw a1, 0(sp)
116 ; RV32I-FPELIM-NEXT: li a1, 0
117 ; RV32I-FPELIM-NEXT: li a3, 0
118 ; RV32I-FPELIM-NEXT: li a5, 0
119 ; RV32I-FPELIM-NEXT: li a7, 0
120 ; RV32I-FPELIM-NEXT: call callee_float_on_stack
121 ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
122 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
123 ; RV32I-FPELIM-NEXT: ret
124 ;
125 ; RV32I-WITHFP-LABEL: caller_float_on_stack:
126 ; RV32I-WITHFP: # %bb.0:
127 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
128 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
129 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
130 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
131 ; RV32I-WITHFP-NEXT: lui a1, 264704
132 ; RV32I-WITHFP-NEXT: li a0, 1
133 ; RV32I-WITHFP-NEXT: li a2, 2
134 ; RV32I-WITHFP-NEXT: li a4, 3
135 ; RV32I-WITHFP-NEXT: li a6, 4
136 ; RV32I-WITHFP-NEXT: sw a1, 0(sp)
137 ; RV32I-WITHFP-NEXT: li a1, 0
138 ; RV32I-WITHFP-NEXT: li a3, 0
139 ; RV32I-WITHFP-NEXT: li a5, 0
140 ; RV32I-WITHFP-NEXT: li a7, 0
141 ; RV32I-WITHFP-NEXT: call callee_float_on_stack
142 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
143 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
144 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
145 ; RV32I-WITHFP-NEXT: ret
146 %1 = call i32 @callee_float_on_stack(i64 1, i64 2, i64 3, i64 4, float 5.0)
147 ret i32 %1
148 }
150 define float @callee_tiny_scalar_ret() nounwind {
151 ; RV32I-FPELIM-LABEL: callee_tiny_scalar_ret:
152 ; RV32I-FPELIM: # %bb.0:
153 ; RV32I-FPELIM-NEXT: lui a0, 260096
154 ; RV32I-FPELIM-NEXT: ret
155 ;
156 ; RV32I-WITHFP-LABEL: callee_tiny_scalar_ret:
157 ; RV32I-WITHFP: # %bb.0:
158 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
159 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
160 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
161 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
162 ; RV32I-WITHFP-NEXT: lui a0, 260096
163 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
164 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
165 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
166 ; RV32I-WITHFP-NEXT: ret
167 ret float 1.0
168 }
170 define i32 @caller_tiny_scalar_ret() nounwind {
171 ; RV32I-FPELIM-LABEL: caller_tiny_scalar_ret:
172 ; RV32I-FPELIM: # %bb.0:
173 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
174 ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
175 ; RV32I-FPELIM-NEXT: call callee_tiny_scalar_ret
176 ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
177 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
178 ; RV32I-FPELIM-NEXT: ret
179 ;
180 ; RV32I-WITHFP-LABEL: caller_tiny_scalar_ret:
181 ; RV32I-WITHFP: # %bb.0:
182 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
183 ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
184 ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
185 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
186 ; RV32I-WITHFP-NEXT: call callee_tiny_scalar_ret
187 ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
188 ; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
189 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
190 ; RV32I-WITHFP-NEXT: ret
191 %1 = call float @callee_tiny_scalar_ret()
192 %2 = bitcast float %1 to i32
193 ret i32 %2
194 }