1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zfh,+zvfh,+v -verify-machineinstrs < %s | FileCheck %s
3 ; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zfh,+zvfh,+v -verify-machineinstrs < %s | FileCheck %s
5 define <vscale x 8 x i1> @not_icmp_sle_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
6 ; CHECK-LABEL: not_icmp_sle_nxv8i16:
8 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
9 ; CHECK-NEXT: vmslt.vv v0, v10, v8
11 %icmp = icmp sle <vscale x 8 x i16> %a, %b
12 %not = xor <vscale x 8 x i1> splat (i1 true), %icmp
13 ret <vscale x 8 x i1> %not
16 define <vscale x 4 x i1> @not_icmp_sgt_nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
17 ; CHECK-LABEL: not_icmp_sgt_nxv4i32:
19 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
20 ; CHECK-NEXT: vmsle.vv v0, v8, v10
22 %icmp = icmp sgt <vscale x 4 x i32> %a, %b
23 %not = xor <vscale x 4 x i1> %icmp, splat (i1 true)
24 ret <vscale x 4 x i1> %not
27 define <vscale x 2 x i1> @not_fcmp_une_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
28 ; CHECK-LABEL: not_fcmp_une_nxv2f64:
30 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
31 ; CHECK-NEXT: vmfeq.vv v0, v8, v10
33 %icmp = fcmp une <vscale x 2 x double> %a, %b
34 %not = xor <vscale x 2 x i1> %icmp, splat (i1 true)
35 ret <vscale x 2 x i1> %not
38 define <vscale x 4 x i1> @not_fcmp_uge_nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
39 ; CHECK-LABEL: not_fcmp_uge_nxv4f32:
41 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
42 ; CHECK-NEXT: vmflt.vv v0, v8, v10
44 %icmp = fcmp uge <vscale x 4 x float> %a, %b
45 %not = xor <vscale x 4 x i1> %icmp, splat (i1 true)
46 ret <vscale x 4 x i1> %not