| blob | c11867d55ba0cd9cd1fcd1a9bcdb7edee1b3c74d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \
9 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
11 declare <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x i1>, i32)
12 declare <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
13 declare <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
15 define <vscale x 1 x float> @vfnmacc_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
16 ; ZVFH-LABEL: vfnmacc_vv_nxv1f32:
17 ; ZVFH: # %bb.0:
18 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
19 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9, v0.t
20 ; ZVFH-NEXT: vmv1r.v v8, v10
21 ; ZVFH-NEXT: ret
22 ;
23 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv1f32:
24 ; ZVFHMIN: # %bb.0:
25 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
26 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
27 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t
28 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
29 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v11, v10, v0.t
30 ; ZVFHMIN-NEXT: ret
31 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
32 %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
33 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
34 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
35 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
36 ret <vscale x 1 x float> %v
37 }
39 define <vscale x 1 x float> @vfnmacc_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
40 ; ZVFH-LABEL: vfnmacc_vv_nxv1f32_unmasked:
41 ; ZVFH: # %bb.0:
42 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
43 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9
44 ; ZVFH-NEXT: vmv1r.v v8, v10
45 ; ZVFH-NEXT: ret
46 ;
47 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv1f32_unmasked:
48 ; ZVFHMIN: # %bb.0:
49 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
50 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
51 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9
52 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
53 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v11, v10
54 ; ZVFHMIN-NEXT: ret
55 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
56 %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
57 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
58 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
59 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
60 ret <vscale x 1 x float> %v
61 }
63 define <vscale x 1 x float> @vfnmacc_vf_nxv1f32(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
64 ; ZVFH-LABEL: vfnmacc_vf_nxv1f32:
65 ; ZVFH: # %bb.0:
66 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
67 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
68 ; ZVFH-NEXT: vmv1r.v v8, v9
69 ; ZVFH-NEXT: ret
70 ;
71 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32:
72 ; ZVFHMIN: # %bb.0:
73 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
74 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
75 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
76 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
77 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
78 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
79 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
80 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
81 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
82 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v10, v9, v0.t
83 ; ZVFHMIN-NEXT: ret
84 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
85 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
86 %splat = insertelement <vscale x 1 x i1> poison, i1 -1, i32 0
87 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
88 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
89 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
90 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
91 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
92 ret <vscale x 1 x float> %v
93 }
95 define <vscale x 1 x float> @vfnmacc_vf_nxv1f32_commute(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
96 ; ZVFH-LABEL: vfnmacc_vf_nxv1f32_commute:
97 ; ZVFH: # %bb.0:
98 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
99 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
100 ; ZVFH-NEXT: vmv1r.v v8, v9
101 ; ZVFH-NEXT: ret
102 ;
103 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32_commute:
104 ; ZVFHMIN: # %bb.0:
105 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
106 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
107 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
108 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
109 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
110 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
111 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
112 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
113 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
114 ; ZVFHMIN-NEXT: vfnmadd.vv v10, v8, v9, v0.t
115 ; ZVFHMIN-NEXT: vmv1r.v v8, v10
116 ; ZVFHMIN-NEXT: ret
117 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
118 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
119 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
120 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
121 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
122 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
123 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %nega, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
124 ret <vscale x 1 x float> %v
125 }
127 define <vscale x 1 x float> @vfnmacc_vf_nxv1f32_unmasked(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
128 ; ZVFH-LABEL: vfnmacc_vf_nxv1f32_unmasked:
129 ; ZVFH: # %bb.0:
130 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
131 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8
132 ; ZVFH-NEXT: vmv1r.v v8, v9
133 ; ZVFH-NEXT: ret
134 ;
135 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv1f32_unmasked:
136 ; ZVFHMIN: # %bb.0:
137 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
138 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
139 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
140 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
141 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
142 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
143 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
144 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11
145 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
146 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v10, v9
147 ; ZVFHMIN-NEXT: ret
148 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
149 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
150 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
151 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
152 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
153 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
154 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
155 ret <vscale x 1 x float> %v
156 }
158 declare <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x i1>, i32)
159 declare <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
160 declare <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
162 define <vscale x 2 x float> @vfnmacc_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
163 ; ZVFH-LABEL: vfnmacc_vv_nxv2f32:
164 ; ZVFH: # %bb.0:
165 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
166 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9, v0.t
167 ; ZVFH-NEXT: vmv1r.v v8, v10
168 ; ZVFH-NEXT: ret
169 ;
170 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv2f32:
171 ; ZVFHMIN: # %bb.0:
172 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
173 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
174 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t
175 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
176 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v11, v10, v0.t
177 ; ZVFHMIN-NEXT: ret
178 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
179 %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
180 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
181 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
182 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
183 ret <vscale x 2 x float> %v
184 }
186 define <vscale x 2 x float> @vfnmacc_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
187 ; ZVFH-LABEL: vfnmacc_vv_nxv2f32_unmasked:
188 ; ZVFH: # %bb.0:
189 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
190 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9
191 ; ZVFH-NEXT: vmv1r.v v8, v10
192 ; ZVFH-NEXT: ret
193 ;
194 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv2f32_unmasked:
195 ; ZVFHMIN: # %bb.0:
196 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
197 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
198 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9
199 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
200 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v11, v10
201 ; ZVFHMIN-NEXT: ret
202 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
203 %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
204 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
205 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
206 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
207 ret <vscale x 2 x float> %v
208 }
210 define <vscale x 2 x float> @vfnmacc_vf_nxv2f32(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
211 ; ZVFH-LABEL: vfnmacc_vf_nxv2f32:
212 ; ZVFH: # %bb.0:
213 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
214 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
215 ; ZVFH-NEXT: vmv1r.v v8, v9
216 ; ZVFH-NEXT: ret
217 ;
218 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32:
219 ; ZVFHMIN: # %bb.0:
220 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
221 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma
222 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
223 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
224 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
225 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
226 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
227 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
228 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
229 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v10, v9, v0.t
230 ; ZVFHMIN-NEXT: ret
231 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
232 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
233 %splat = insertelement <vscale x 2 x i1> poison, i1 -1, i32 0
234 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
235 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
236 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
237 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
238 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
239 ret <vscale x 2 x float> %v
240 }
242 define <vscale x 2 x float> @vfnmacc_vf_nxv2f32_commute(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
243 ; ZVFH-LABEL: vfnmacc_vf_nxv2f32_commute:
244 ; ZVFH: # %bb.0:
245 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
246 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
247 ; ZVFH-NEXT: vmv1r.v v8, v9
248 ; ZVFH-NEXT: ret
249 ;
250 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32_commute:
251 ; ZVFHMIN: # %bb.0:
252 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
253 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma
254 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
255 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
256 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
257 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
258 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
259 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
260 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
261 ; ZVFHMIN-NEXT: vfnmadd.vv v10, v8, v9, v0.t
262 ; ZVFHMIN-NEXT: vmv.v.v v8, v10
263 ; ZVFHMIN-NEXT: ret
264 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
265 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
266 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
267 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
268 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
269 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
270 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vbext, <vscale x 2 x float> %nega, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
271 ret <vscale x 2 x float> %v
272 }
274 define <vscale x 2 x float> @vfnmacc_vf_nxv2f32_unmasked(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
275 ; ZVFH-LABEL: vfnmacc_vf_nxv2f32_unmasked:
276 ; ZVFH: # %bb.0:
277 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
278 ; ZVFH-NEXT: vfwnmacc.vf v9, fa0, v8
279 ; ZVFH-NEXT: vmv1r.v v8, v9
280 ; ZVFH-NEXT: ret
281 ;
282 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv2f32_unmasked:
283 ; ZVFHMIN: # %bb.0:
284 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
285 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma
286 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
287 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
288 ; ZVFHMIN-NEXT: vfncvt.f.f.w v11, v10
289 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
290 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
291 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11
292 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
293 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v10, v9
294 ; ZVFHMIN-NEXT: ret
295 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
296 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
297 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
298 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
299 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
300 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
301 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
302 ret <vscale x 2 x float> %v
303 }
305 declare <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, i32)
306 declare <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
307 declare <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
309 define <vscale x 4 x float> @vfnmacc_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
310 ; ZVFH-LABEL: vfnmacc_vv_nxv4f32:
311 ; ZVFH: # %bb.0:
312 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
313 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9, v0.t
314 ; ZVFH-NEXT: vmv2r.v v8, v10
315 ; ZVFH-NEXT: ret
316 ;
317 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv4f32:
318 ; ZVFHMIN: # %bb.0:
319 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
320 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t
321 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t
322 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
323 ; ZVFHMIN-NEXT: vfnmadd.vv v12, v14, v10, v0.t
324 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
325 ; ZVFHMIN-NEXT: ret
326 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
327 %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
328 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
329 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
330 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
331 ret <vscale x 4 x float> %v
332 }
334 define <vscale x 4 x float> @vfnmacc_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
335 ; ZVFH-LABEL: vfnmacc_vv_nxv4f32_unmasked:
336 ; ZVFH: # %bb.0:
337 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
338 ; ZVFH-NEXT: vfwnmacc.vv v10, v8, v9
339 ; ZVFH-NEXT: vmv2r.v v8, v10
340 ; ZVFH-NEXT: ret
341 ;
342 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv4f32_unmasked:
343 ; ZVFHMIN: # %bb.0:
344 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
345 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8
346 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9
347 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
348 ; ZVFHMIN-NEXT: vfnmadd.vv v12, v14, v10
349 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
350 ; ZVFHMIN-NEXT: ret
351 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
352 %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
353 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
354 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
355 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
356 ret <vscale x 4 x float> %v
357 }
359 define <vscale x 4 x float> @vfnmacc_vf_nxv4f32(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
360 ; ZVFH-LABEL: vfnmacc_vf_nxv4f32:
361 ; ZVFH: # %bb.0:
362 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
363 ; ZVFH-NEXT: vfwnmacc.vf v10, fa0, v8, v0.t
364 ; ZVFH-NEXT: vmv2r.v v8, v10
365 ; ZVFH-NEXT: ret
366 ;
367 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32:
368 ; ZVFHMIN: # %bb.0:
369 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
370 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma
371 ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5
372 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma
373 ; ZVFHMIN-NEXT: vfncvt.f.f.w v14, v12
374 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
375 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t
376 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v14, v0.t
377 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
378 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v12, v10, v0.t
379 ; ZVFHMIN-NEXT: ret
380 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
381 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
382 %splat = insertelement <vscale x 4 x i1> poison, i1 -1, i32 0
383 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
384 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
385 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
386 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
387 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
388 ret <vscale x 4 x float> %v
389 }
391 define <vscale x 4 x float> @vfnmacc_vf_nxv4f32_commute(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
392 ; ZVFH-LABEL: vfnmacc_vf_nxv4f32_commute:
393 ; ZVFH: # %bb.0:
394 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
395 ; ZVFH-NEXT: vfwnmacc.vf v10, fa0, v8, v0.t
396 ; ZVFH-NEXT: vmv2r.v v8, v10
397 ; ZVFH-NEXT: ret
398 ;
399 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32_commute:
400 ; ZVFHMIN: # %bb.0:
401 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
402 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma
403 ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5
404 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma
405 ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v12
406 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
407 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t
408 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9, v0.t
409 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
410 ; ZVFHMIN-NEXT: vfnmadd.vv v12, v14, v10, v0.t
411 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
412 ; ZVFHMIN-NEXT: ret
413 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
414 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
415 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
416 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
417 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
418 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
419 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vbext, <vscale x 4 x float> %nega, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
420 ret <vscale x 4 x float> %v
421 }
423 define <vscale x 4 x float> @vfnmacc_vf_nxv4f32_unmasked(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
424 ; ZVFH-LABEL: vfnmacc_vf_nxv4f32_unmasked:
425 ; ZVFH: # %bb.0:
426 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
427 ; ZVFH-NEXT: vfwnmacc.vf v10, fa0, v8
428 ; ZVFH-NEXT: vmv2r.v v8, v10
429 ; ZVFH-NEXT: ret
430 ;
431 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv4f32_unmasked:
432 ; ZVFHMIN: # %bb.0:
433 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
434 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma
435 ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5
436 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma
437 ; ZVFHMIN-NEXT: vfncvt.f.f.w v14, v12
438 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
439 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
440 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v14
441 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
442 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v12, v10
443 ; ZVFHMIN-NEXT: ret
444 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
445 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
446 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
447 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
448 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
449 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
450 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
451 ret <vscale x 4 x float> %v
452 }
454 declare <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x i1>, i32)
455 declare <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
456 declare <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
458 define <vscale x 8 x float> @vfnmacc_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
459 ; ZVFH-LABEL: vfnmacc_vv_nxv8f32:
460 ; ZVFH: # %bb.0:
461 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
462 ; ZVFH-NEXT: vfwnmacc.vv v12, v8, v10, v0.t
463 ; ZVFH-NEXT: vmv4r.v v8, v12
464 ; ZVFH-NEXT: ret
465 ;
466 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv8f32:
467 ; ZVFHMIN: # %bb.0:
468 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
469 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t
470 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t
471 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
472 ; ZVFHMIN-NEXT: vfnmadd.vv v16, v20, v12, v0.t
473 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
474 ; ZVFHMIN-NEXT: ret
475 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
476 %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
477 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
478 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
479 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
480 ret <vscale x 8 x float> %v
481 }
483 define <vscale x 8 x float> @vfnmacc_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
484 ; ZVFH-LABEL: vfnmacc_vv_nxv8f32_unmasked:
485 ; ZVFH: # %bb.0:
486 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
487 ; ZVFH-NEXT: vfwnmacc.vv v12, v8, v10
488 ; ZVFH-NEXT: vmv4r.v v8, v12
489 ; ZVFH-NEXT: ret
490 ;
491 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv8f32_unmasked:
492 ; ZVFHMIN: # %bb.0:
493 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
494 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8
495 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10
496 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
497 ; ZVFHMIN-NEXT: vfnmadd.vv v16, v20, v12
498 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
499 ; ZVFHMIN-NEXT: ret
500 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
501 %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
502 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
503 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
504 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
505 ret <vscale x 8 x float> %v
506 }
508 define <vscale x 8 x float> @vfnmacc_vf_nxv8f32(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
509 ; ZVFH-LABEL: vfnmacc_vf_nxv8f32:
510 ; ZVFH: # %bb.0:
511 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
512 ; ZVFH-NEXT: vfwnmacc.vf v12, fa0, v8, v0.t
513 ; ZVFH-NEXT: vmv4r.v v8, v12
514 ; ZVFH-NEXT: ret
515 ;
516 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32:
517 ; ZVFHMIN: # %bb.0:
518 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
519 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma
520 ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5
521 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma
522 ; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v16
523 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
524 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t
525 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t
526 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
527 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v16, v12, v0.t
528 ; ZVFHMIN-NEXT: ret
529 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
530 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
531 %splat = insertelement <vscale x 8 x i1> poison, i1 -1, i32 0
532 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
533 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
534 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
535 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
536 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
537 ret <vscale x 8 x float> %v
538 }
540 define <vscale x 8 x float> @vfnmacc_vf_nxv8f32_commute(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
541 ; ZVFH-LABEL: vfnmacc_vf_nxv8f32_commute:
542 ; ZVFH: # %bb.0:
543 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
544 ; ZVFH-NEXT: vfwnmacc.vf v12, fa0, v8, v0.t
545 ; ZVFH-NEXT: vmv4r.v v8, v12
546 ; ZVFH-NEXT: ret
547 ;
548 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32_commute:
549 ; ZVFHMIN: # %bb.0:
550 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
551 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma
552 ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5
553 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma
554 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v16
555 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
556 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t
557 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v10, v0.t
558 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
559 ; ZVFHMIN-NEXT: vfnmadd.vv v16, v20, v12, v0.t
560 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
561 ; ZVFHMIN-NEXT: ret
562 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
563 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
564 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
565 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
566 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
567 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
568 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vbext, <vscale x 8 x float> %nega, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
569 ret <vscale x 8 x float> %v
570 }
572 define <vscale x 8 x float> @vfnmacc_vf_nxv8f32_unmasked(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
573 ; ZVFH-LABEL: vfnmacc_vf_nxv8f32_unmasked:
574 ; ZVFH: # %bb.0:
575 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
576 ; ZVFH-NEXT: vfwnmacc.vf v12, fa0, v8
577 ; ZVFH-NEXT: vmv4r.v v8, v12
578 ; ZVFH-NEXT: ret
579 ;
580 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv8f32_unmasked:
581 ; ZVFHMIN: # %bb.0:
582 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
583 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma
584 ; ZVFHMIN-NEXT: vfmv.v.f v16, fa5
585 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma
586 ; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v16
587 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
588 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8
589 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20
590 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
591 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v16, v12
592 ; ZVFHMIN-NEXT: ret
593 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
594 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
595 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
596 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
597 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
598 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
599 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
600 ret <vscale x 8 x float> %v
601 }
603 declare <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x i1>, i32)
604 declare <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float>, <vscale x 16 x i1>, i32)
605 declare <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half>, <vscale x 16 x i1>, i32)
607 define <vscale x 16 x float> @vfnmacc_vv_nxv16f32(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
608 ; ZVFH-LABEL: vfnmacc_vv_nxv16f32:
609 ; ZVFH: # %bb.0:
610 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
611 ; ZVFH-NEXT: vfwnmacc.vv v16, v8, v12, v0.t
612 ; ZVFH-NEXT: vmv8r.v v8, v16
613 ; ZVFH-NEXT: ret
614 ;
615 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv16f32:
616 ; ZVFHMIN: # %bb.0:
617 ; ZVFHMIN-NEXT: addi sp, sp, -16
618 ; ZVFHMIN-NEXT: .cfi_def_cfa_offset 16
619 ; ZVFHMIN-NEXT: csrr a1, vlenb
620 ; ZVFHMIN-NEXT: slli a1, a1, 3
621 ; ZVFHMIN-NEXT: sub sp, sp, a1
622 ; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
623 ; ZVFHMIN-NEXT: addi a1, sp, 16
624 ; ZVFHMIN-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill
625 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
626 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t
627 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t
628 ; ZVFHMIN-NEXT: addi a0, sp, 16
629 ; ZVFHMIN-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
630 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
631 ; ZVFHMIN-NEXT: vfnmadd.vv v24, v16, v8, v0.t
632 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
633 ; ZVFHMIN-NEXT: csrr a0, vlenb
634 ; ZVFHMIN-NEXT: slli a0, a0, 3
635 ; ZVFHMIN-NEXT: add sp, sp, a0
636 ; ZVFHMIN-NEXT: addi sp, sp, 16
637 ; ZVFHMIN-NEXT: ret
638 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
639 %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
640 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
641 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
642 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
643 ret <vscale x 16 x float> %v
644 }
646 define <vscale x 16 x float> @vfnmacc_vv_nxv16f32_unmasked(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
647 ; ZVFH-LABEL: vfnmacc_vv_nxv16f32_unmasked:
648 ; ZVFH: # %bb.0:
649 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
650 ; ZVFH-NEXT: vfwnmacc.vv v16, v8, v12
651 ; ZVFH-NEXT: vmv8r.v v8, v16
652 ; ZVFH-NEXT: ret
653 ;
654 ; ZVFHMIN-LABEL: vfnmacc_vv_nxv16f32_unmasked:
655 ; ZVFHMIN: # %bb.0:
656 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
657 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8
658 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12
659 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
660 ; ZVFHMIN-NEXT: vfnmadd.vv v24, v0, v16
661 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
662 ; ZVFHMIN-NEXT: ret
663 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
664 %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
665 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
666 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
667 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
668 ret <vscale x 16 x float> %v
669 }
671 define <vscale x 16 x float> @vfnmacc_vf_nxv16f32(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
672 ; ZVFH-LABEL: vfnmacc_vf_nxv16f32:
673 ; ZVFH: # %bb.0:
674 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
675 ; ZVFH-NEXT: vfwnmacc.vf v16, fa0, v8, v0.t
676 ; ZVFH-NEXT: vmv8r.v v8, v16
677 ; ZVFH-NEXT: ret
678 ;
679 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32:
680 ; ZVFHMIN: # %bb.0:
681 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
682 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma
683 ; ZVFHMIN-NEXT: vfmv.v.f v24, fa5
684 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma
685 ; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24
686 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
687 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t
688 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t
689 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
690 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v24, v16, v0.t
691 ; ZVFHMIN-NEXT: ret
692 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
693 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
694 %splat = insertelement <vscale x 16 x i1> poison, i1 -1, i32 0
695 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
696 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
697 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
698 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
699 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
700 ret <vscale x 16 x float> %v
701 }
703 define <vscale x 16 x float> @vfnmacc_vf_nxv16f32_commute(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
704 ; ZVFH-LABEL: vfnmacc_vf_nxv16f32_commute:
705 ; ZVFH: # %bb.0:
706 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
707 ; ZVFH-NEXT: vfwnmacc.vf v16, fa0, v8, v0.t
708 ; ZVFH-NEXT: vmv8r.v v8, v16
709 ; ZVFH-NEXT: ret
710 ;
711 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32_commute:
712 ; ZVFHMIN: # %bb.0:
713 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
714 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma
715 ; ZVFHMIN-NEXT: vfmv.v.f v24, fa5
716 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma
717 ; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24
718 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
719 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t
720 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t
721 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
722 ; ZVFHMIN-NEXT: vfnmadd.vv v24, v8, v16, v0.t
723 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
724 ; ZVFHMIN-NEXT: ret
725 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
726 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
727 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
728 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
729 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
730 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
731 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vbext, <vscale x 16 x float> %nega, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)
732 ret <vscale x 16 x float> %v
733 }
735 define <vscale x 16 x float> @vfnmacc_vf_nxv16f32_unmasked(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
736 ; ZVFH-LABEL: vfnmacc_vf_nxv16f32_unmasked:
737 ; ZVFH: # %bb.0:
738 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
739 ; ZVFH-NEXT: vfwnmacc.vf v16, fa0, v8
740 ; ZVFH-NEXT: vmv8r.v v8, v16
741 ; ZVFH-NEXT: ret
742 ;
743 ; ZVFHMIN-LABEL: vfnmacc_vf_nxv16f32_unmasked:
744 ; ZVFHMIN: # %bb.0:
745 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
746 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m8, ta, ma
747 ; ZVFHMIN-NEXT: vfmv.v.f v24, fa5
748 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma
749 ; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24
750 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
751 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8
752 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4
753 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
754 ; ZVFHMIN-NEXT: vfnmadd.vv v8, v24, v16
755 ; ZVFHMIN-NEXT: ret
756 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
757 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
758 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
759 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
760 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
761 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
762 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
763 ret <vscale x 16 x float> %v
764 }
766 declare <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x i1>, i32)
767 declare <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double>, <vscale x 1 x i1>, i32)
768 declare <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
770 define <vscale x 1 x double> @vfnmacc_vv_nxv1f64(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
771 ; CHECK-LABEL: vfnmacc_vv_nxv1f64:
772 ; CHECK: # %bb.0:
773 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
774 ; CHECK-NEXT: vfwnmacc.vv v10, v8, v9, v0.t
775 ; CHECK-NEXT: vmv1r.v v8, v10
776 ; CHECK-NEXT: ret
777 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
778 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
779 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
780 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
781 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
782 ret <vscale x 1 x double> %v
783 }
785 define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_unmasked(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
786 ; CHECK-LABEL: vfnmacc_vv_nxv1f64_unmasked:
787 ; CHECK: # %bb.0:
788 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
789 ; CHECK-NEXT: vfwnmacc.vv v10, v8, v9
790 ; CHECK-NEXT: vmv1r.v v8, v10
791 ; CHECK-NEXT: ret
792 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
793 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
794 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
795 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
796 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
797 ret <vscale x 1 x double> %v
798 }
800 define <vscale x 1 x double> @vfnmacc_vf_nxv1f64(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
801 ; CHECK-LABEL: vfnmacc_vf_nxv1f64:
802 ; CHECK: # %bb.0:
803 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
804 ; CHECK-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
805 ; CHECK-NEXT: vmv1r.v v8, v9
806 ; CHECK-NEXT: ret
807 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
808 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
809 %splat = insertelement <vscale x 1 x i1> poison, i1 -1, i32 0
810 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
811 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
812 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
813 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
814 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
815 ret <vscale x 1 x double> %v
816 }
818 define <vscale x 1 x double> @vfnmacc_vf_nxv1f64_commute(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
819 ; CHECK-LABEL: vfnmacc_vf_nxv1f64_commute:
820 ; CHECK: # %bb.0:
821 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
822 ; CHECK-NEXT: vfwnmacc.vf v9, fa0, v8, v0.t
823 ; CHECK-NEXT: vmv1r.v v8, v9
824 ; CHECK-NEXT: ret
825 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
826 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
827 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
828 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
829 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
830 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
831 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vbext, <vscale x 1 x double> %nega, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
832 ret <vscale x 1 x double> %v
833 }
835 define <vscale x 1 x double> @vfnmacc_vf_nxv1f64_unmasked(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
836 ; CHECK-LABEL: vfnmacc_vf_nxv1f64_unmasked:
837 ; CHECK: # %bb.0:
838 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
839 ; CHECK-NEXT: vfwnmacc.vf v9, fa0, v8
840 ; CHECK-NEXT: vmv1r.v v8, v9
841 ; CHECK-NEXT: ret
842 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
843 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
844 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
845 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
846 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
847 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
848 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
849 ret <vscale x 1 x double> %v
850 }
852 declare <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, i32)
853 declare <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
854 declare <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
856 define <vscale x 2 x double> @vfnmacc_vv_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
857 ; CHECK-LABEL: vfnmacc_vv_nxv2f64:
858 ; CHECK: # %bb.0:
859 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
860 ; CHECK-NEXT: vfwnmacc.vv v10, v8, v9, v0.t
861 ; CHECK-NEXT: vmv2r.v v8, v10
862 ; CHECK-NEXT: ret
863 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
864 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
865 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
866 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
867 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
868 ret <vscale x 2 x double> %v
869 }
871 define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_unmasked(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
872 ; CHECK-LABEL: vfnmacc_vv_nxv2f64_unmasked:
873 ; CHECK: # %bb.0:
874 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
875 ; CHECK-NEXT: vfwnmacc.vv v10, v8, v9
876 ; CHECK-NEXT: vmv2r.v v8, v10
877 ; CHECK-NEXT: ret
878 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
879 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
880 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
881 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
882 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
883 ret <vscale x 2 x double> %v
884 }
886 define <vscale x 2 x double> @vfnmacc_vf_nxv2f64(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
887 ; CHECK-LABEL: vfnmacc_vf_nxv2f64:
888 ; CHECK: # %bb.0:
889 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
890 ; CHECK-NEXT: vfwnmacc.vf v10, fa0, v8, v0.t
891 ; CHECK-NEXT: vmv2r.v v8, v10
892 ; CHECK-NEXT: ret
893 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
894 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
895 %splat = insertelement <vscale x 2 x i1> poison, i1 -1, i32 0
896 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
897 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
898 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
899 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
900 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
901 ret <vscale x 2 x double> %v
902 }
904 define <vscale x 2 x double> @vfnmacc_vf_nxv2f64_commute(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
905 ; CHECK-LABEL: vfnmacc_vf_nxv2f64_commute:
906 ; CHECK: # %bb.0:
907 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
908 ; CHECK-NEXT: vfwnmacc.vf v10, fa0, v8, v0.t
909 ; CHECK-NEXT: vmv2r.v v8, v10
910 ; CHECK-NEXT: ret
911 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
912 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
913 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
914 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
915 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
916 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
917 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vbext, <vscale x 2 x double> %nega, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
918 ret <vscale x 2 x double> %v
919 }
921 define <vscale x 2 x double> @vfnmacc_vf_nxv2f64_unmasked(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
922 ; CHECK-LABEL: vfnmacc_vf_nxv2f64_unmasked:
923 ; CHECK: # %bb.0:
924 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
925 ; CHECK-NEXT: vfwnmacc.vf v10, fa0, v8
926 ; CHECK-NEXT: vmv2r.v v8, v10
927 ; CHECK-NEXT: ret
928 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
929 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
930 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
931 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
932 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
933 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
934 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
935 ret <vscale x 2 x double> %v
936 }
938 declare <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x i1>, i32)
939 declare <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double>, <vscale x 4 x i1>, i32)
940 declare <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
942 define <vscale x 4 x double> @vfnmacc_vv_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
943 ; CHECK-LABEL: vfnmacc_vv_nxv4f64:
944 ; CHECK: # %bb.0:
945 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
946 ; CHECK-NEXT: vfwnmacc.vv v12, v8, v10, v0.t
947 ; CHECK-NEXT: vmv4r.v v8, v12
948 ; CHECK-NEXT: ret
949 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
950 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
951 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
952 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
953 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
954 ret <vscale x 4 x double> %v
955 }
957 define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_unmasked(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
958 ; CHECK-LABEL: vfnmacc_vv_nxv4f64_unmasked:
959 ; CHECK: # %bb.0:
960 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
961 ; CHECK-NEXT: vfwnmacc.vv v12, v8, v10
962 ; CHECK-NEXT: vmv4r.v v8, v12
963 ; CHECK-NEXT: ret
964 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
965 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
966 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
967 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
968 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
969 ret <vscale x 4 x double> %v
970 }
972 define <vscale x 4 x double> @vfnmacc_vf_nxv4f64(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
973 ; CHECK-LABEL: vfnmacc_vf_nxv4f64:
974 ; CHECK: # %bb.0:
975 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
976 ; CHECK-NEXT: vfwnmacc.vf v12, fa0, v8, v0.t
977 ; CHECK-NEXT: vmv4r.v v8, v12
978 ; CHECK-NEXT: ret
979 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
980 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
981 %splat = insertelement <vscale x 4 x i1> poison, i1 -1, i32 0
982 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
983 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
984 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
985 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
986 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
987 ret <vscale x 4 x double> %v
988 }
990 define <vscale x 4 x double> @vfnmacc_vf_nxv4f64_commute(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
991 ; CHECK-LABEL: vfnmacc_vf_nxv4f64_commute:
992 ; CHECK: # %bb.0:
993 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
994 ; CHECK-NEXT: vfwnmacc.vf v12, fa0, v8, v0.t
995 ; CHECK-NEXT: vmv4r.v v8, v12
996 ; CHECK-NEXT: ret
997 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
998 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
999 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
1000 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
1001 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
1002 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
1003 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vbext, <vscale x 4 x double> %nega, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
1004 ret <vscale x 4 x double> %v
1005 }
1007 define <vscale x 4 x double> @vfnmacc_vf_nxv4f64_unmasked(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
1008 ; CHECK-LABEL: vfnmacc_vf_nxv4f64_unmasked:
1009 ; CHECK: # %bb.0:
1010 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
1011 ; CHECK-NEXT: vfwnmacc.vf v12, fa0, v8
1012 ; CHECK-NEXT: vmv4r.v v8, v12
1013 ; CHECK-NEXT: ret
1014 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
1015 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
1016 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1017 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1018 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1019 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1020 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1021 ret <vscale x 4 x double> %v
1022 }
1024 declare <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x i1>, i32)
1025 declare <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double>, <vscale x 8 x i1>, i32)
1026 declare <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
1028 define <vscale x 8 x double> @vfnmacc_vv_nxv8f64(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1029 ; CHECK-LABEL: vfnmacc_vv_nxv8f64:
1030 ; CHECK: # %bb.0:
1031 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1032 ; CHECK-NEXT: vfwnmacc.vv v16, v8, v12, v0.t
1033 ; CHECK-NEXT: vmv8r.v v8, v16
1034 ; CHECK-NEXT: ret
1035 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
1036 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
1037 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
1038 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
1039 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
1040 ret <vscale x 8 x double> %v
1041 }
1043 define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_unmasked(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
1044 ; CHECK-LABEL: vfnmacc_vv_nxv8f64_unmasked:
1045 ; CHECK: # %bb.0:
1046 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1047 ; CHECK-NEXT: vfwnmacc.vv v16, v8, v12
1048 ; CHECK-NEXT: vmv8r.v v8, v16
1049 ; CHECK-NEXT: ret
1050 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1051 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1052 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1053 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1054 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1055 ret <vscale x 8 x double> %v
1056 }
1058 define <vscale x 8 x double> @vfnmacc_vf_nxv8f64(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1059 ; CHECK-LABEL: vfnmacc_vf_nxv8f64:
1060 ; CHECK: # %bb.0:
1061 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1062 ; CHECK-NEXT: vfwnmacc.vf v16, fa0, v8, v0.t
1063 ; CHECK-NEXT: vmv8r.v v8, v16
1064 ; CHECK-NEXT: ret
1065 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1066 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1067 %splat = insertelement <vscale x 8 x i1> poison, i1 -1, i32 0
1068 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
1069 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
1070 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
1071 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
1072 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
1073 ret <vscale x 8 x double> %v
1074 }
1076 define <vscale x 8 x double> @vfnmacc_vf_nxv8f64_commute(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1077 ; CHECK-LABEL: vfnmacc_vf_nxv8f64_commute:
1078 ; CHECK: # %bb.0:
1079 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1080 ; CHECK-NEXT: vfwnmacc.vf v16, fa0, v8, v0.t
1081 ; CHECK-NEXT: vmv8r.v v8, v16
1082 ; CHECK-NEXT: ret
1083 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1084 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1085 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
1086 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
1087 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
1088 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
1089 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vbext, <vscale x 8 x double> %nega, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
1090 ret <vscale x 8 x double> %v
1091 }
1093 define <vscale x 8 x double> @vfnmacc_vf_nxv8f64_unmasked(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
1094 ; CHECK-LABEL: vfnmacc_vf_nxv8f64_unmasked:
1095 ; CHECK: # %bb.0:
1096 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1097 ; CHECK-NEXT: vfwnmacc.vf v16, fa0, v8
1098 ; CHECK-NEXT: vmv8r.v v8, v16
1099 ; CHECK-NEXT: ret
1100 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1101 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1102 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1103 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1104 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1105 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1106 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1107 ret <vscale x 8 x double> %v
1108 }
1110 declare <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
1112 define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1113 ; CHECK-LABEL: vfnmacc_vv_nxv1f64_nxv1f16:
1114 ; CHECK: # %bb.0:
1115 ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
1116 ; CHECK-NEXT: vfwcvt.f.f.v v11, v8, v0.t
1117 ; CHECK-NEXT: vfwcvt.f.f.v v8, v9, v0.t
1118 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
1119 ; CHECK-NEXT: vfwnmacc.vv v10, v11, v8, v0.t
1120 ; CHECK-NEXT: vmv1r.v v8, v10
1121 ; CHECK-NEXT: ret
1122 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
1123 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
1124 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
1125 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
1126 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)
1127 ret <vscale x 1 x double> %v
1128 }
1130 define <vscale x 1 x double> @vfnmacc_vv_nxv1f64_nxv1f16_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
1131 ; CHECK-LABEL: vfnmacc_vv_nxv1f64_nxv1f16_unmasked:
1132 ; CHECK: # %bb.0:
1133 ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
1134 ; CHECK-NEXT: vfwcvt.f.f.v v11, v8
1135 ; CHECK-NEXT: vfwcvt.f.f.v v8, v9
1136 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
1137 ; CHECK-NEXT: vfwnmacc.vv v10, v11, v8
1138 ; CHECK-NEXT: vmv1r.v v8, v10
1139 ; CHECK-NEXT: ret
1140 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
1141 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
1142 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
1143 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
1144 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
1145 ret <vscale x 1 x double> %v
1146 }
1148 declare <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
1150 define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1151 ; CHECK-LABEL: vfnmacc_vv_nxv2f64_nxv2f16:
1152 ; CHECK: # %bb.0:
1153 ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
1154 ; CHECK-NEXT: vfwcvt.f.f.v v12, v8, v0.t
1155 ; CHECK-NEXT: vfwcvt.f.f.v v8, v9, v0.t
1156 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
1157 ; CHECK-NEXT: vfwnmacc.vv v10, v12, v8, v0.t
1158 ; CHECK-NEXT: vmv2r.v v8, v10
1159 ; CHECK-NEXT: ret
1160 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
1161 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
1162 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
1163 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
1164 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)
1165 ret <vscale x 2 x double> %v
1166 }
1168 define <vscale x 2 x double> @vfnmacc_vv_nxv2f64_nxv2f16_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
1169 ; CHECK-LABEL: vfnmacc_vv_nxv2f64_nxv2f16_unmasked:
1170 ; CHECK: # %bb.0:
1171 ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
1172 ; CHECK-NEXT: vfwcvt.f.f.v v12, v8
1173 ; CHECK-NEXT: vfwcvt.f.f.v v8, v9
1174 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
1175 ; CHECK-NEXT: vfwnmacc.vv v10, v12, v8
1176 ; CHECK-NEXT: vmv2r.v v8, v10
1177 ; CHECK-NEXT: ret
1178 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
1179 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
1180 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
1181 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
1182 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
1183 ret <vscale x 2 x double> %v
1184 }
1186 declare <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
1188 define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1189 ; CHECK-LABEL: vfnmacc_vv_nxv4f64_nxv4f16:
1190 ; CHECK: # %bb.0:
1191 ; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma
1192 ; CHECK-NEXT: vfwcvt.f.f.v v10, v8, v0.t
1193 ; CHECK-NEXT: vfwcvt.f.f.v v16, v9, v0.t
1194 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
1195 ; CHECK-NEXT: vfwnmacc.vv v12, v10, v16, v0.t
1196 ; CHECK-NEXT: vmv4r.v v8, v12
1197 ; CHECK-NEXT: ret
1198 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
1199 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
1200 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
1201 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
1202 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)
1203 ret <vscale x 4 x double> %v
1204 }
1206 define <vscale x 4 x double> @vfnmacc_vv_nxv4f64_nxv4f16_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
1207 ; CHECK-LABEL: vfnmacc_vv_nxv4f64_nxv4f16_unmasked:
1208 ; CHECK: # %bb.0:
1209 ; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma
1210 ; CHECK-NEXT: vfwcvt.f.f.v v10, v8
1211 ; CHECK-NEXT: vfwcvt.f.f.v v16, v9
1212 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
1213 ; CHECK-NEXT: vfwnmacc.vv v12, v10, v16
1214 ; CHECK-NEXT: vmv4r.v v8, v12
1215 ; CHECK-NEXT: ret
1216 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1217 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1218 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1219 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1220 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
1221 ret <vscale x 4 x double> %v
1222 }
1224 declare <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
1226 define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_nxv4f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1227 ; CHECK-LABEL: vfnmacc_vv_nxv8f64_nxv4f16:
1228 ; CHECK: # %bb.0:
1229 ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma
1230 ; CHECK-NEXT: vfwcvt.f.f.v v12, v8, v0.t
1231 ; CHECK-NEXT: vfwcvt.f.f.v v24, v10, v0.t
1232 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma
1233 ; CHECK-NEXT: vfwnmacc.vv v16, v12, v24, v0.t
1234 ; CHECK-NEXT: vmv8r.v v8, v16
1235 ; CHECK-NEXT: ret
1236 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
1237 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
1238 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
1239 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
1240 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)
1241 ret <vscale x 8 x double> %v
1242 }
1244 define <vscale x 8 x double> @vfnmacc_vv_nxv8f64_nxv4f16_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
1245 ; CHECK-LABEL: vfnmacc_vv_nxv8f64_nxv4f16_unmasked:
1246 ; CHECK: # %bb.0:
1247 ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma
1248 ; CHECK-NEXT: vfwcvt.f.f.v v12, v8
1249 ; CHECK-NEXT: vfwcvt.f.f.v v24, v10
1250 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma
1251 ; CHECK-NEXT: vfwnmacc.vv v16, v12, v24
1252 ; CHECK-NEXT: vmv8r.v v8, v16
1253 ; CHECK-NEXT: ret
1254 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1255 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1256 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1257 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1258 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1259 ret <vscale x 8 x double> %v
1260 }