1 # RUN: llc -mtriple riscv64 -mattr=+m,+v -run-pass=prologepilog \
2 # RUN: -riscv-v-vector-bits-min=512 -o - %s | FileCheck %s
4 # Stack layout of this program
5 # |--------------------------| -- <-- Incoming SP
7 # | ------------------------ | -- <-- New SP + vlenb + 72
9 # | ------------------------ | -- <-- New SP + vlenb + 64
10 # | ra (Callee-saved reg) |
11 # | ------------------------ | -- <-- New SP + vlenb + 56
12 # | s0 (Callee-saved reg) |
13 # | ------------------------ | -- <-- New SP + vlenb + 48
14 # | s1 (Callee-saved reg) |
15 # | ------------------------ | -- <-- New SP + vlenb + 40
16 # | 8 bytes of padding |
17 # | ------------------------ | -- <-- New SP + vlenb
18 # | v8 (RVV objects) |
19 # | ------------------------ | -- <-- New SP + 32
21 # |--------------------------| -- <-- New SP + 16
23 # |--------------------------| -- <-- New SP + 8
25 # |--------------------------| -- <-- New SP
28 ; ModuleID = 'wrong-stack-offset-for-rvv-object.ll'
29 source_filename = "wrong-stack-offset-for-rvv-object.ll"
30 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
31 target triple = "riscv64"
33 %struct = type { i32 }
35 define void @asm_fprintf(%struct %file, ptr %p, ptr %buf, ptr %arrayidx3, ptr %0, ptr %1, ...) #0 {
37 %buf1 = alloca [10 x i8], i32 0, align 8
38 %arrayidx32 = getelementptr inbounds [10 x i8], ptr %buf, i64 0, i64 1
41 while.cond: ; preds = %while.cond, %sw.bb, %entry
42 %incdec.ptr = getelementptr inbounds i8, ptr undef, i64 1
43 %2 = load i8, ptr null, align 1
45 %cond = icmp eq i64 %3, 0
46 br i1 %cond, label %sw.bb, label %while.cond
48 sw.bb: ; preds = %while.cond
49 %4 = load i8, ptr null, align 1
50 store <2 x i8> zeroinitializer, ptr %0, align 1
51 %call = call i32 (ptr, ...) @fprintf(ptr %p)
55 declare i32 @fprintf(ptr, ...) #0
57 attributes #0 = { "target-features"="+m,+v" }
63 exposesReturnsTwice: false
65 regBankSelected: false
68 tracksRegLiveness: true
70 failsVerification: false
71 tracksDebugUserValues: true
74 - { reg: '$x11', virtual-reg: '' }
75 - { reg: '$x14', virtual-reg: '' }
76 - { reg: '$x16', virtual-reg: '' }
77 - { reg: '$x17', virtual-reg: '' }
79 isFrameAddressTaken: false
80 isReturnAddressTaken: false
89 maxCallFrameSize: 4294967295
90 cvBytesOfCalleeSavedRegisters: 0
91 hasOpaqueSPAdjustment: false
93 hasMustTailInVarArgFunc: false
99 - { id: 0, type: default, offset: -8, size: 8, alignment: 8, stack-id: default,
100 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
101 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
102 - { id: 1, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,
103 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
104 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
105 - { id: 2, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,
106 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
107 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
109 - { id: 0, name: buf1, type: default, offset: 0, size: 1, alignment: 8,
110 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
111 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
112 - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
113 stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true,
114 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
116 debugValueSubstitutions: []
119 varArgsFrameIndex: -1
122 ; CHECK-LABEL: name: asm_fprintf
124 ; CHECK-NEXT: - { id: 0, name: buf1, type: default, offset: -48, size: 1, alignment: 8,
125 ; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
126 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
127 ; CHECK-NEXT: - { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
128 ; CHECK-NEXT: stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true,
129 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
130 ; CHECK-NEXT: - { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
131 ; CHECK-NEXT: stack-id: default, callee-saved-register: '$x1', callee-saved-restored: true,
132 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
133 ; CHECK-NEXT: - { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
134 ; CHECK-NEXT: stack-id: default, callee-saved-register: '$x8', callee-saved-restored: true,
135 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
136 ; CHECK-NEXT: - { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
137 ; CHECK-NEXT: stack-id: default, callee-saved-register: '$x9', callee-saved-restored: true,
138 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
139 ; CHECK-NEXT: - { id: 5, name: '', type: default, offset: -56, size: 8, alignment: 8,
140 ; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
141 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
142 ; CHECK-NEXT: - { id: 6, name: '', type: default, offset: -64, size: 8, alignment: 8,
143 ; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
144 ; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
146 ; CHECK-NEXT: successors: %bb.1(0x80000000)
147 ; CHECK-NEXT: liveins: $x11, $x14, $x16, $x17, $x1, $x8, $x9
149 ; CHECK-NEXT: $x2 = frame-setup ADDI $x2, -80
150 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 80
151 ; CHECK-NEXT: SD killed $x1, $x2, 56 :: (store (s64) into %stack.2)
152 ; CHECK-NEXT: SD killed $x8, $x2, 48 :: (store (s64) into %stack.3)
153 ; CHECK-NEXT: SD killed $x9, $x2, 40 :: (store (s64) into %stack.4)
154 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -24
155 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x8, -32
156 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $x9, -40
157 ; CHECK-NEXT: $x10 = frame-setup PseudoReadVLENB
158 ; CHECK-NEXT: $x10 = frame-setup SLLI killed $x10, 1
159 ; CHECK-NEXT: $x2 = frame-setup SUB $x2, killed $x10
160 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xd0, 0x00, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22
161 ; CHECK-NEXT: renamable $x8 = COPY $x14
162 ; CHECK-NEXT: renamable $x9 = COPY $x11
163 ; CHECK-NEXT: $x10 = PseudoReadVLENB
164 ; CHECK-NEXT: $x10 = SLLI killed $x10, 1
165 ; CHECK-NEXT: $x10 = ADD $x2, killed $x10
166 ; CHECK-NEXT: SD killed renamable $x17, killed $x10, 72 :: (store (s64))
167 ; CHECK-NEXT: $x10 = PseudoReadVLENB
168 ; CHECK-NEXT: $x10 = SLLI killed $x10, 1
169 ; CHECK-NEXT: $x10 = ADD $x2, killed $x10
170 ; CHECK-NEXT: SD killed renamable $x16, killed $x10, 64 :: (store (s64) into %fixed-stack.1, align 16)
171 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 2, 69 /* e8, mf8, ta, mu */, implicit-def $vl, implicit-def $vtype
172 ; CHECK-NEXT: renamable $v8 = PseudoVMV_V_I_MF8 undef $v8, 0, 2, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
173 ; CHECK-NEXT: $x10 = ADDI $x2, 32
174 ; CHECK-NEXT: VS1R_V killed renamable $v8, killed $x10 :: (store unknown-size into %stack.1, align 8)
176 ; CHECK-NEXT: bb.1.while.cond:
177 ; CHECK-NEXT: successors: %bb.2(0x30000000), %bb.1(0x50000000)
178 ; CHECK-NEXT: liveins: $x8, $x9
180 ; CHECK-NEXT: BNE $x0, $x0, %bb.1
181 ; CHECK-NEXT: PseudoBR %bb.2
183 ; CHECK-NEXT: bb.2.sw.bb:
184 ; CHECK-NEXT: successors: %bb.1(0x80000000)
185 ; CHECK-NEXT: liveins: $x8, $x9
187 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 2, 69 /* e8, mf8, ta, mu */, implicit-def $vl, implicit-def $vtype
188 ; CHECK-NEXT: $x10 = ADDI $x2, 32
189 ; CHECK-NEXT: renamable $v8 = VL1RE8_V killed $x10 :: (load unknown-size from %stack.1, align 8)
190 ; CHECK-NEXT: PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3 /* e8 */, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)
191 ; CHECK-NEXT: $x10 = COPY renamable $x9
192 ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
193 ; CHECK-NEXT: PseudoBR %bb.1
195 successors: %bb.1(0x80000000)
196 liveins: $x11, $x14, $x16, $x17
198 renamable $x8 = COPY $x14
199 renamable $x9 = COPY $x11
200 SD killed renamable $x17, %fixed-stack.0, 0 :: (store (s64))
201 SD killed renamable $x16, %fixed-stack.1, 0 :: (store (s64) into %fixed-stack.1, align 16)
202 dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype
203 renamable $v8 = PseudoVMV_V_I_MF8 undef $v8, 0, 2, 3, 0, implicit $vl, implicit $vtype
204 VS1R_V killed renamable $v8, %stack.1 :: (store unknown-size into %stack.1, align 8)
207 successors: %bb.2(0x30000000), %bb.1(0x50000000)
214 successors: %bb.1(0x80000000)
217 dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype
218 renamable $v8 = VL1RE8_V %stack.1 :: (load unknown-size from %stack.1, align 8)
219 PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)
220 ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
221 $x10 = COPY renamable $x9
222 PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
223 ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2