1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
4 declare void @llvm.vp.scatter.v256i64.v256p0(<256 x i64>, <256 x ptr>, <256 x i1>, i32 %avl)
6 ; Function Attrs: nounwind
7 define fastcc void @vp_mscatter_v256i64(<256 x i64> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl) {
8 ; CHECK-LABEL: vp_mscatter_v256i64:
10 ; CHECK-NEXT: and %s0, %s0, (32)0
12 ; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
13 ; CHECK-NEXT: b.l.t (, %s10)
14 call void @llvm.vp.scatter.v256i64.v256p0(<256 x i64> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl)
18 declare void @llvm.vp.scatter.v256f64.v256p0(<256 x double>, <256 x ptr>, <256 x i1>, i32 %avl)
20 ; Function Attrs: nounwind
21 define fastcc void @vp_mscatter_v256f64(<256 x double> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl) {
22 ; CHECK-LABEL: vp_mscatter_v256f64:
24 ; CHECK-NEXT: and %s0, %s0, (32)0
26 ; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
27 ; CHECK-NEXT: b.l.t (, %s10)
28 call void @llvm.vp.scatter.v256f64.v256p0(<256 x double> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl)
32 declare void @llvm.vp.scatter.v256f32.v256p0(<256 x float>, <256 x ptr>, <256 x i1>, i32 %avl)
34 ; Function Attrs: nounwind
35 define fastcc void @vp_mscatter_v256f32(<256 x float> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl) {
36 ; CHECK-LABEL: vp_mscatter_v256f32:
38 ; CHECK-NEXT: and %s0, %s0, (32)0
40 ; CHECK-NEXT: vscu %v0, %v1, 0, 0, %vm1
41 ; CHECK-NEXT: b.l.t (, %s10)
42 call void @llvm.vp.scatter.v256f32.v256p0(<256 x float> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl)
46 declare void @llvm.vp.scatter.v256i32.v256p0(<256 x i32>, <256 x ptr>, <256 x i1>, i32 %avl)
48 ; Function Attrs: nounwind
49 define fastcc void @vp_mscatter_v256i32(<256 x i32> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl) {
50 ; CHECK-LABEL: vp_mscatter_v256i32:
52 ; CHECK-NEXT: and %s0, %s0, (32)0
54 ; CHECK-NEXT: vscl %v0, %v1, 0, 0, %vm1
55 ; CHECK-NEXT: b.l.t (, %s10)
56 call void @llvm.vp.scatter.v256i32.v256p0(<256 x i32> %V, <256 x ptr> %P, <256 x i1> %M, i32 %avl)