1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; Without list-burr scheduling we may not see the difference in codegen here.
3 ; Use a subtarget that has post-RA scheduling enabled because the anti-dependency
4 ; breaker requires liveness information to be kept.
5 ; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none | FileCheck %s --check-prefix=none
6 ; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical | FileCheck %s --check-prefix=critical
8 define void @goo(ptr %r, ptr %p, ptr %q) nounwind {
10 ; none: # %bb.0: # %entry
11 ; none-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
12 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
13 ; none-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
14 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
15 ; none-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
16 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
17 ; none-NEXT: cvttsd2si %xmm0, %eax
18 ; none-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
19 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
20 ; none-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
21 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
22 ; none-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
23 ; none-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
24 ; none-NEXT: cvttsd2si %xmm0, %ecx
25 ; none-NEXT: cmpl %eax, %ecx
26 ; none-NEXT: jge .LBB0_2
27 ; none-NEXT: # %bb.1: # %bb
28 ; none-NEXT: movabsq $4621425052621576602, %rax # imm = 0x402299999999999A
29 ; none-NEXT: movq %rax, (%rdx)
30 ; none-NEXT: .LBB0_2: # %return
33 ; critical-LABEL: goo:
34 ; critical: # %bb.0: # %entry
35 ; critical-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
36 ; critical-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
37 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
38 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
39 ; critical-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
40 ; critical-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
41 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
42 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
43 ; critical-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
44 ; critical-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
45 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
46 ; critical-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
47 ; critical-NEXT: cvttsd2si %xmm0, %eax
48 ; critical-NEXT: cvttsd2si %xmm1, %ecx
49 ; critical-NEXT: cmpl %ecx, %eax
50 ; critical-NEXT: jge .LBB0_2
51 ; critical-NEXT: # %bb.1: # %bb
52 ; critical-NEXT: movabsq $4621425052621576602, %rax # imm = 0x402299999999999A
53 ; critical-NEXT: movq %rax, (%rdx)
54 ; critical-NEXT: .LBB0_2: # %return
57 %0 = load double, ptr %p, align 8
58 %1 = fadd double %0, 1.100000e+00
59 %2 = fmul double %1, 1.200000e+00
60 %3 = fadd double %2, 1.300000e+00
61 %4 = fmul double %3, 1.400000e+00
62 %5 = fadd double %4, 1.500000e+00
63 %6 = fptosi double %5 to i32
64 %7 = load double, ptr %r, align 8
65 %8 = fadd double %7, 7.100000e+00
66 %9 = fmul double %8, 7.200000e+00
67 %10 = fadd double %9, 7.300000e+00
68 %11 = fmul double %10, 7.400000e+00
69 %12 = fadd double %11, 7.500000e+00
70 %13 = fptosi double %12 to i32
71 %14 = icmp slt i32 %6, %13
72 br i1 %14, label %bb, label %return
75 store double 9.300000e+00, ptr %q, align 8