| blob | e183bbc15617d5074db71f1556ddf9dbf8f6d652 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
4 ; Use common transform of:
5 ; (X & Y) == Y -> (X & Y) != 0 iff Y is non-zero power of 2 to test.
6 ; (X & Y) != Y -> (X & Y) == 0 iff Y is non-zero power of 2 to test.
8 declare i32 @llvm.umin.i32(i32, i32)
9 declare i32 @llvm.umax.i32(i32, i32)
10 declare i32 @llvm.smin.i32(i32, i32)
11 declare i32 @llvm.smax.i32(i32, i32)
12 declare i32 @llvm.fshl.i32(i32, i32, i32)
13 declare i32 @llvm.fshr.i32(i32, i32, i32)
15 define <4 x i32> @pow2_non_splat_vec(<4 x i32> %x) {
16 ; CHECK-LABEL: pow2_non_splat_vec:
17 ; CHECK: # %bb.0:
18 ; CHECK-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
19 ; CHECK-NEXT: retq
20 %r = urem <4 x i32> %x, <i32 8, i32 4, i32 16, i32 64>
21 ret <4 x i32> %r
22 }
24 define <4 x i32> @pow2_non_splat_vec_fail0(<4 x i32> %x) {
25 ; CHECK-LABEL: pow2_non_splat_vec_fail0:
26 ; CHECK: # %bb.0:
27 ; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [954437177,1073741824,268435456,67108864]
28 ; CHECK-NEXT: pmuludq %xmm0, %xmm1
29 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
30 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
31 ; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
32 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]
33 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
34 ; CHECK-NEXT: movdqa %xmm1, %xmm3
35 ; CHECK-NEXT: psrld $1, %xmm3
36 ; CHECK-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,1],xmm1[2,3]
37 ; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
38 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
39 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
40 ; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
41 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
42 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
43 ; CHECK-NEXT: psubd %xmm1, %xmm0
44 ; CHECK-NEXT: retq
45 %r = urem <4 x i32> %x, <i32 9, i32 4, i32 16, i32 64>
46 ret <4 x i32> %r
47 }
49 define i1 @pow2_shl(i32 %x, i32 %y) {
50 ; CHECK-LABEL: pow2_shl:
51 ; CHECK: # %bb.0:
52 ; CHECK-NEXT: movl %esi, %ecx
53 ; CHECK-NEXT: movl %edi, %eax
54 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
55 ; CHECK-NEXT: shrl %cl, %eax
56 ; CHECK-NEXT: andl $4, %eax
57 ; CHECK-NEXT: shrl $2, %eax
58 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
59 ; CHECK-NEXT: retq
60 %d = shl nuw nsw i32 4, %y
61 %and = and i32 %x, %d
62 %r = icmp eq i32 %and, %d
63 ret i1 %r
64 }
66 define i1 @pow2_shl_fail0(i32 %x, i32 %y) {
67 ; CHECK-LABEL: pow2_shl_fail0:
68 ; CHECK: # %bb.0:
69 ; CHECK-NEXT: movl %esi, %ecx
70 ; CHECK-NEXT: notl %edi
71 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
72 ; CHECK-NEXT: shrl %cl, %edi
73 ; CHECK-NEXT: testb $3, %dil
74 ; CHECK-NEXT: sete %al
75 ; CHECK-NEXT: retq
76 %d = shl i32 3, %y
77 %and = and i32 %x, %d
78 %r = icmp eq i32 %and, %d
79 ret i1 %r
80 }
82 define i1 @pow2_shl_fail1(i32 %x, i32 %y) {
83 ; CHECK-LABEL: pow2_shl_fail1:
84 ; CHECK: # %bb.0:
85 ; CHECK-NEXT: movl %esi, %ecx
86 ; CHECK-NEXT: notl %edi
87 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
88 ; CHECK-NEXT: shrl %cl, %edi
89 ; CHECK-NEXT: testb $4, %dil
90 ; CHECK-NEXT: sete %al
91 ; CHECK-NEXT: retq
92 %d = shl i32 4, %y
93 %and = and i32 %x, %d
94 %r = icmp eq i32 %and, %d
95 ret i1 %r
96 }
98 define i1 @pow2_srl(i32 %x, i32 %y) {
99 ; CHECK-LABEL: pow2_srl:
100 ; CHECK: # %bb.0:
101 ; CHECK-NEXT: movl %esi, %ecx
102 ; CHECK-NEXT: movl %edi, %eax
103 ; CHECK-NEXT: andb $7, %cl
104 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
105 ; CHECK-NEXT: shll %cl, %eax
106 ; CHECK-NEXT: shrl $20, %eax
107 ; CHECK-NEXT: andl $1, %eax
108 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
109 ; CHECK-NEXT: retq
110 %yy = and i32 %y, 7
111 %d = lshr i32 1048576, %yy
112 %and = and i32 %x, %d
113 %r = icmp eq i32 %and, %d
114 ret i1 %r
115 }
117 define i1 @pow2_srl_fail0(i32 %x, i32 %y) {
118 ; CHECK-LABEL: pow2_srl_fail0:
119 ; CHECK: # %bb.0:
120 ; CHECK-NEXT: movl %esi, %ecx
121 ; CHECK-NEXT: andb $30, %cl
122 ; CHECK-NEXT: notl %edi
123 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
124 ; CHECK-NEXT: shll %cl, %edi
125 ; CHECK-NEXT: testl $1048576, %edi # imm = 0x100000
126 ; CHECK-NEXT: sete %al
127 ; CHECK-NEXT: retq
128 %yy = and i32 %y, 30
129 %d = lshr i32 1048576, %yy
130 %and = and i32 %x, %d
131 %r = icmp eq i32 %and, %d
132 ret i1 %r
133 }
135 define i1 @pow2_srl_fail1(i32 %x, i32 %y) {
136 ; CHECK-LABEL: pow2_srl_fail1:
137 ; CHECK: # %bb.0:
138 ; CHECK-NEXT: movl %esi, %ecx
139 ; CHECK-NEXT: andb $7, %cl
140 ; CHECK-NEXT: notl %edi
141 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
142 ; CHECK-NEXT: shll %cl, %edi
143 ; CHECK-NEXT: testl $1048577, %edi # imm = 0x100001
144 ; CHECK-NEXT: sete %al
145 ; CHECK-NEXT: retq
146 %yy = and i32 %y, 7
147 %d = lshr i32 1048577, %yy
148 %and = and i32 %x, %d
149 %r = icmp eq i32 %and, %d
150 ret i1 %r
151 }
153 define i1 @pow2_rotl(i32 %x, i32 %y) {
154 ; CHECK-LABEL: pow2_rotl:
155 ; CHECK: # %bb.0:
156 ; CHECK-NEXT: movl %esi, %ecx
157 ; CHECK-NEXT: movl $1048576, %eax # imm = 0x100000
158 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
159 ; CHECK-NEXT: roll %cl, %eax
160 ; CHECK-NEXT: testl %eax, %edi
161 ; CHECK-NEXT: setne %al
162 ; CHECK-NEXT: retq
163 %d = call i32 @llvm.fshl.i32(i32 1048576, i32 1048576, i32 %y)
164 %and = and i32 %x, %d
165 %r = icmp eq i32 %and, %d
166 ret i1 %r
167 }
169 define i1 @pow2_rotl_fail0(i32 %x, i32 %y) {
170 ; CHECK-LABEL: pow2_rotl_fail0:
171 ; CHECK: # %bb.0:
172 ; CHECK-NEXT: movl %esi, %ecx
173 ; CHECK-NEXT: movl $1048576, %eax # imm = 0x100000
174 ; CHECK-NEXT: movl $512, %edx # imm = 0x200
175 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
176 ; CHECK-NEXT: shldl %cl, %eax, %edx
177 ; CHECK-NEXT: notl %edi
178 ; CHECK-NEXT: testl %edi, %edx
179 ; CHECK-NEXT: sete %al
180 ; CHECK-NEXT: retq
181 %d = call i32 @llvm.fshl.i32(i32 512, i32 1048576, i32 %y)
182 %and = and i32 %x, %d
183 %r = icmp eq i32 %and, %d
184 ret i1 %r
185 }
187 define i1 @pow2_rotl_fail1(i32 %x, i32 %y) {
188 ; CHECK-LABEL: pow2_rotl_fail1:
189 ; CHECK: # %bb.0:
190 ; CHECK-NEXT: movl %esi, %ecx
191 ; CHECK-NEXT: movl $511, %eax # imm = 0x1FF
192 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
193 ; CHECK-NEXT: roll %cl, %eax
194 ; CHECK-NEXT: notl %edi
195 ; CHECK-NEXT: testl %edi, %eax
196 ; CHECK-NEXT: sete %al
197 ; CHECK-NEXT: retq
198 %d = call i32 @llvm.fshl.i32(i32 511, i32 511, i32 %y)
199 %and = and i32 %x, %d
200 %r = icmp eq i32 %and, %d
201 ret i1 %r
202 }
204 define i1 @pow2_rotr(i32 %x, i32 %y) {
205 ; CHECK-LABEL: pow2_rotr:
206 ; CHECK: # %bb.0:
207 ; CHECK-NEXT: movl %esi, %ecx
208 ; CHECK-NEXT: movl $1048576, %eax # imm = 0x100000
209 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
210 ; CHECK-NEXT: rorl %cl, %eax
211 ; CHECK-NEXT: testl %eax, %edi
212 ; CHECK-NEXT: setne %al
213 ; CHECK-NEXT: retq
214 %d = call i32 @llvm.fshr.i32(i32 1048576, i32 1048576, i32 %y)
215 %and = and i32 %x, %d
216 %r = icmp eq i32 %and, %d
217 ret i1 %r
218 }
220 define i1 @pow2_rotr_fail0(i32 %x, i32 %y) {
221 ; CHECK-LABEL: pow2_rotr_fail0:
222 ; CHECK: # %bb.0:
223 ; CHECK-NEXT: movl %esi, %ecx
224 ; CHECK-NEXT: movl $512, %eax # imm = 0x200
225 ; CHECK-NEXT: movl $1048576, %edx # imm = 0x100000
226 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
227 ; CHECK-NEXT: shrdl %cl, %eax, %edx
228 ; CHECK-NEXT: notl %edi
229 ; CHECK-NEXT: testl %edi, %edx
230 ; CHECK-NEXT: sete %al
231 ; CHECK-NEXT: retq
232 %d = call i32 @llvm.fshr.i32(i32 512, i32 1048576, i32 %y)
233 %and = and i32 %x, %d
234 %r = icmp eq i32 %and, %d
235 ret i1 %r
236 }
238 define i1 @pow2_rotr_fail1(i32 %x, i32 %y) {
239 ; CHECK-LABEL: pow2_rotr_fail1:
240 ; CHECK: # %bb.0:
241 ; CHECK-NEXT: movl %esi, %ecx
242 ; CHECK-NEXT: movl $511, %eax # imm = 0x1FF
243 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
244 ; CHECK-NEXT: rorl %cl, %eax
245 ; CHECK-NEXT: notl %edi
246 ; CHECK-NEXT: testl %edi, %eax
247 ; CHECK-NEXT: sete %al
248 ; CHECK-NEXT: retq
249 %d = call i32 @llvm.fshr.i32(i32 511, i32 511, i32 %y)
250 %and = and i32 %x, %d
251 %r = icmp eq i32 %and, %d
252 ret i1 %r
253 }
255 define i1 @pow2_umin(i32 %x, i32 %y) {
256 ; CHECK-LABEL: pow2_umin:
257 ; CHECK: # %bb.0:
258 ; CHECK-NEXT: movl %esi, %ecx
259 ; CHECK-NEXT: movl $1, %eax
260 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
261 ; CHECK-NEXT: shll %cl, %eax
262 ; CHECK-NEXT: cmpl $262144, %eax # imm = 0x40000
263 ; CHECK-NEXT: movl $262144, %ecx # imm = 0x40000
264 ; CHECK-NEXT: cmovbl %eax, %ecx
265 ; CHECK-NEXT: testl %ecx, %edi
266 ; CHECK-NEXT: setne %al
267 ; CHECK-NEXT: retq
268 %yy = shl i32 1, %y
269 %d = call i32 @llvm.umin.i32(i32 %yy, i32 262144)
270 %and = and i32 %x, %d
271 %r = icmp eq i32 %and, %d
272 ret i1 %r
273 }
275 define i1 @pow2_umin_fail0(i32 %x, i32 %y) {
276 ; CHECK-LABEL: pow2_umin_fail0:
277 ; CHECK: # %bb.0:
278 ; CHECK-NEXT: movl %esi, %ecx
279 ; CHECK-NEXT: movl $4, %eax
280 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
281 ; CHECK-NEXT: shll %cl, %eax
282 ; CHECK-NEXT: cmpl $262144, %eax # imm = 0x40000
283 ; CHECK-NEXT: movl $262144, %ecx # imm = 0x40000
284 ; CHECK-NEXT: cmovbl %eax, %ecx
285 ; CHECK-NEXT: notl %edi
286 ; CHECK-NEXT: testl %edi, %ecx
287 ; CHECK-NEXT: sete %al
288 ; CHECK-NEXT: retq
289 %yy = shl i32 4, %y
290 %d = call i32 @llvm.umin.i32(i32 %yy, i32 262144)
291 %and = and i32 %x, %d
292 %r = icmp eq i32 %and, %d
293 ret i1 %r
294 }
296 define i1 @pow2_umin_fail1(i32 %x, i32 %y) {
297 ; CHECK-LABEL: pow2_umin_fail1:
298 ; CHECK: # %bb.0:
299 ; CHECK-NEXT: movl %esi, %ecx
300 ; CHECK-NEXT: movl $1, %eax
301 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
302 ; CHECK-NEXT: shll %cl, %eax
303 ; CHECK-NEXT: cmpl $12345, %eax # imm = 0x3039
304 ; CHECK-NEXT: movl $12345, %ecx # imm = 0x3039
305 ; CHECK-NEXT: cmovbl %eax, %ecx
306 ; CHECK-NEXT: notl %edi
307 ; CHECK-NEXT: testl %edi, %ecx
308 ; CHECK-NEXT: sete %al
309 ; CHECK-NEXT: retq
310 %yy = shl i32 1, %y
311 %d = call i32 @llvm.umin.i32(i32 %yy, i32 12345)
312 %and = and i32 %x, %d
313 %r = icmp eq i32 %and, %d
314 ret i1 %r
315 }
317 define i1 @pow2_umax(i32 %x, i32 %y, i32 %z) {
318 ; CHECK-LABEL: pow2_umax:
319 ; CHECK: # %bb.0:
320 ; CHECK-NEXT: movl %esi, %ecx
321 ; CHECK-NEXT: movl $1, %eax
322 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
323 ; CHECK-NEXT: shll %cl, %eax
324 ; CHECK-NEXT: movl $-2147483648, %esi # imm = 0x80000000
325 ; CHECK-NEXT: movl %edx, %ecx
326 ; CHECK-NEXT: shrl %cl, %esi
327 ; CHECK-NEXT: cmpl %esi, %eax
328 ; CHECK-NEXT: cmoval %eax, %esi
329 ; CHECK-NEXT: testl %esi, %edi
330 ; CHECK-NEXT: setne %al
331 ; CHECK-NEXT: retq
332 %yy = shl i32 1, %y
333 %zz = lshr i32 2147483648, %z
334 %d = call i32 @llvm.umax.i32(i32 %yy, i32 %zz)
335 %and = and i32 %x, %d
336 %r = icmp eq i32 %and, %d
337 ret i1 %r
338 }
340 define i1 @pow2_umax_fail0(i32 %x, i32 %y, i32 %z) {
341 ; CHECK-LABEL: pow2_umax_fail0:
342 ; CHECK: # %bb.0:
343 ; CHECK-NEXT: movl %esi, %ecx
344 ; CHECK-NEXT: movl $1, %eax
345 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
346 ; CHECK-NEXT: shll %cl, %eax
347 ; CHECK-NEXT: movl $1073741824, %esi # imm = 0x40000000
348 ; CHECK-NEXT: movl %edx, %ecx
349 ; CHECK-NEXT: shrl %cl, %esi
350 ; CHECK-NEXT: cmpl %esi, %eax
351 ; CHECK-NEXT: cmoval %eax, %esi
352 ; CHECK-NEXT: notl %edi
353 ; CHECK-NEXT: testl %edi, %esi
354 ; CHECK-NEXT: sete %al
355 ; CHECK-NEXT: retq
356 %yy = shl i32 1, %y
357 %zz = lshr i32 1073741824, %z
358 %d = call i32 @llvm.umax.i32(i32 %yy, i32 %zz)
359 %and = and i32 %x, %d
360 %r = icmp eq i32 %and, %d
361 ret i1 %r
362 }
364 define i1 @pow2_umax_fail1(i32 %x, i32 %y, i32 %z) {
365 ; CHECK-LABEL: pow2_umax_fail1:
366 ; CHECK: # %bb.0:
367 ; CHECK-NEXT: movl %esi, %ecx
368 ; CHECK-NEXT: movl $4, %eax
369 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
370 ; CHECK-NEXT: shll %cl, %eax
371 ; CHECK-NEXT: movl $-2147483648, %esi # imm = 0x80000000
372 ; CHECK-NEXT: movl %edx, %ecx
373 ; CHECK-NEXT: shrl %cl, %esi
374 ; CHECK-NEXT: cmpl %esi, %eax
375 ; CHECK-NEXT: cmoval %eax, %esi
376 ; CHECK-NEXT: notl %edi
377 ; CHECK-NEXT: testl %edi, %esi
378 ; CHECK-NEXT: sete %al
379 ; CHECK-NEXT: retq
380 %yy = shl i32 4, %y
381 %zz = lshr i32 2147483648, %z
382 %d = call i32 @llvm.umax.i32(i32 %yy, i32 %zz)
383 %and = and i32 %x, %d
384 %r = icmp eq i32 %and, %d
385 ret i1 %r
386 }
388 define i1 @pow2_smin(i32 %x, i32 %y) {
389 ; CHECK-LABEL: pow2_smin:
390 ; CHECK: # %bb.0:
391 ; CHECK-NEXT: movl %esi, %ecx
392 ; CHECK-NEXT: movl $1, %eax
393 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
394 ; CHECK-NEXT: shll %cl, %eax
395 ; CHECK-NEXT: cmpl $262144, %eax # imm = 0x40000
396 ; CHECK-NEXT: movl $262144, %ecx # imm = 0x40000
397 ; CHECK-NEXT: cmovll %eax, %ecx
398 ; CHECK-NEXT: testl %ecx, %edi
399 ; CHECK-NEXT: setne %al
400 ; CHECK-NEXT: retq
401 %yy = shl i32 1, %y
402 %d = call i32 @llvm.smin.i32(i32 %yy, i32 262144)
403 %and = and i32 %x, %d
404 %r = icmp eq i32 %and, %d
405 ret i1 %r
406 }
408 define i1 @pow2_smin_fail0(i32 %x, i32 %y) {
409 ; CHECK-LABEL: pow2_smin_fail0:
410 ; CHECK: # %bb.0:
411 ; CHECK-NEXT: movl %esi, %ecx
412 ; CHECK-NEXT: movl $4, %eax
413 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
414 ; CHECK-NEXT: shll %cl, %eax
415 ; CHECK-NEXT: cmpl $262144, %eax # imm = 0x40000
416 ; CHECK-NEXT: movl $262144, %ecx # imm = 0x40000
417 ; CHECK-NEXT: cmovll %eax, %ecx
418 ; CHECK-NEXT: notl %edi
419 ; CHECK-NEXT: testl %edi, %ecx
420 ; CHECK-NEXT: sete %al
421 ; CHECK-NEXT: retq
422 %yy = shl i32 4, %y
423 %d = call i32 @llvm.smin.i32(i32 %yy, i32 262144)
424 %and = and i32 %x, %d
425 %r = icmp eq i32 %and, %d
426 ret i1 %r
427 }
429 define i1 @pow2_smin_fail1(i32 %x, i32 %y) {
430 ; CHECK-LABEL: pow2_smin_fail1:
431 ; CHECK: # %bb.0:
432 ; CHECK-NEXT: movl %esi, %ecx
433 ; CHECK-NEXT: movl $1, %eax
434 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
435 ; CHECK-NEXT: shll %cl, %eax
436 ; CHECK-NEXT: cmpl $12345, %eax # imm = 0x3039
437 ; CHECK-NEXT: movl $12345, %ecx # imm = 0x3039
438 ; CHECK-NEXT: cmovll %eax, %ecx
439 ; CHECK-NEXT: notl %edi
440 ; CHECK-NEXT: testl %edi, %ecx
441 ; CHECK-NEXT: sete %al
442 ; CHECK-NEXT: retq
443 %yy = shl i32 1, %y
444 %d = call i32 @llvm.smin.i32(i32 %yy, i32 12345)
445 %and = and i32 %x, %d
446 %r = icmp eq i32 %and, %d
447 ret i1 %r
448 }
450 define i1 @pow2_smax(i32 %x, i32 %y, i32 %z) {
451 ; CHECK-LABEL: pow2_smax:
452 ; CHECK: # %bb.0:
453 ; CHECK-NEXT: movl %esi, %ecx
454 ; CHECK-NEXT: movl $1, %eax
455 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
456 ; CHECK-NEXT: shll %cl, %eax
457 ; CHECK-NEXT: movl $-2147483648, %esi # imm = 0x80000000
458 ; CHECK-NEXT: movl %edx, %ecx
459 ; CHECK-NEXT: shrl %cl, %esi
460 ; CHECK-NEXT: cmpl %esi, %eax
461 ; CHECK-NEXT: cmovgl %eax, %esi
462 ; CHECK-NEXT: testl %esi, %edi
463 ; CHECK-NEXT: setne %al
464 ; CHECK-NEXT: retq
465 %yy = shl i32 1, %y
466 %zz = lshr i32 2147483648, %z
467 %d = call i32 @llvm.smax.i32(i32 %yy, i32 %zz)
468 %and = and i32 %x, %d
469 %r = icmp eq i32 %and, %d
470 ret i1 %r
471 }
473 define i1 @pow2_smax_fail0(i32 %x, i32 %y, i32 %z) {
474 ; CHECK-LABEL: pow2_smax_fail0:
475 ; CHECK: # %bb.0:
476 ; CHECK-NEXT: movl %esi, %ecx
477 ; CHECK-NEXT: movl $1, %eax
478 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
479 ; CHECK-NEXT: shll %cl, %eax
480 ; CHECK-NEXT: movl $1073741824, %esi # imm = 0x40000000
481 ; CHECK-NEXT: movl %edx, %ecx
482 ; CHECK-NEXT: shrl %cl, %esi
483 ; CHECK-NEXT: cmpl %esi, %eax
484 ; CHECK-NEXT: cmovgl %eax, %esi
485 ; CHECK-NEXT: notl %edi
486 ; CHECK-NEXT: testl %edi, %esi
487 ; CHECK-NEXT: sete %al
488 ; CHECK-NEXT: retq
489 %yy = shl i32 1, %y
490 %zz = lshr i32 1073741824, %z
491 %d = call i32 @llvm.smax.i32(i32 %yy, i32 %zz)
492 %and = and i32 %x, %d
493 %r = icmp eq i32 %and, %d
494 ret i1 %r
495 }
497 define i1 @pow2_smax_fail1(i32 %x, i32 %y, i32 %z) {
498 ; CHECK-LABEL: pow2_smax_fail1:
499 ; CHECK: # %bb.0:
500 ; CHECK-NEXT: movl %esi, %ecx
501 ; CHECK-NEXT: movl $4, %eax
502 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
503 ; CHECK-NEXT: shll %cl, %eax
504 ; CHECK-NEXT: movl $-2147483648, %esi # imm = 0x80000000
505 ; CHECK-NEXT: movl %edx, %ecx
506 ; CHECK-NEXT: shrl %cl, %esi
507 ; CHECK-NEXT: cmpl %esi, %eax
508 ; CHECK-NEXT: cmovgl %eax, %esi
509 ; CHECK-NEXT: notl %edi
510 ; CHECK-NEXT: testl %edi, %esi
511 ; CHECK-NEXT: sete %al
512 ; CHECK-NEXT: retq
513 %yy = shl i32 4, %y
514 %zz = lshr i32 2147483648, %z
515 %d = call i32 @llvm.smax.i32(i32 %yy, i32 %zz)
516 %and = and i32 %x, %d
517 %r = icmp eq i32 %and, %d
518 ret i1 %r
519 }
521 define i1 @pow2_select(i1 %c, i32 %x, i32 %y, i32 %z) {
522 ; CHECK-LABEL: pow2_select:
523 ; CHECK: # %bb.0:
524 ; CHECK-NEXT: movl %ecx, %eax
525 ; CHECK-NEXT: movl %edx, %ecx
526 ; CHECK-NEXT: movl $1, %edx
527 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
528 ; CHECK-NEXT: shll %cl, %edx
529 ; CHECK-NEXT: movl $-2147483648, %r8d # imm = 0x80000000
530 ; CHECK-NEXT: movl %eax, %ecx
531 ; CHECK-NEXT: shrl %cl, %r8d
532 ; CHECK-NEXT: testb $1, %dil
533 ; CHECK-NEXT: cmovnel %edx, %r8d
534 ; CHECK-NEXT: testl %r8d, %esi
535 ; CHECK-NEXT: setne %al
536 ; CHECK-NEXT: retq
537 %yy = shl i32 1, %y
538 %zz = lshr i32 2147483648, %z
539 %d = select i1 %c, i32 %yy, i32 %zz
540 %and = and i32 %x, %d
541 %r = icmp eq i32 %and, %d
542 ret i1 %r
543 }
545 define i1 @pow2_select_fail0(i1 %c, i32 %x, i32 %y, i32 %z) {
546 ; CHECK-LABEL: pow2_select_fail0:
547 ; CHECK: # %bb.0:
548 ; CHECK-NEXT: movl %ecx, %eax
549 ; CHECK-NEXT: movl %edx, %ecx
550 ; CHECK-NEXT: movl $1, %edx
551 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
552 ; CHECK-NEXT: shll %cl, %edx
553 ; CHECK-NEXT: movl $1073741824, %r8d # imm = 0x40000000
554 ; CHECK-NEXT: movl %eax, %ecx
555 ; CHECK-NEXT: shrl %cl, %r8d
556 ; CHECK-NEXT: testb $1, %dil
557 ; CHECK-NEXT: cmovnel %edx, %r8d
558 ; CHECK-NEXT: notl %esi
559 ; CHECK-NEXT: testl %esi, %r8d
560 ; CHECK-NEXT: sete %al
561 ; CHECK-NEXT: retq
562 %yy = shl i32 1, %y
563 %zz = lshr i32 1073741824, %z
564 %d = select i1 %c, i32 %yy, i32 %zz
565 %and = and i32 %x, %d
566 %r = icmp eq i32 %and, %d
567 ret i1 %r
568 }
570 define i1 @pow2_select_fail2(i1 %c, i32 %x, i32 %y, i32 %z) {
571 ; CHECK-LABEL: pow2_select_fail2:
572 ; CHECK: # %bb.0:
573 ; CHECK-NEXT: movl %ecx, %eax
574 ; CHECK-NEXT: movl %edx, %ecx
575 ; CHECK-NEXT: movl $4, %edx
576 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
577 ; CHECK-NEXT: shll %cl, %edx
578 ; CHECK-NEXT: movl $-2147483648, %r8d # imm = 0x80000000
579 ; CHECK-NEXT: movl %eax, %ecx
580 ; CHECK-NEXT: shrl %cl, %r8d
581 ; CHECK-NEXT: testb $1, %dil
582 ; CHECK-NEXT: cmovnel %edx, %r8d
583 ; CHECK-NEXT: notl %esi
584 ; CHECK-NEXT: testl %esi, %r8d
585 ; CHECK-NEXT: sete %al
586 ; CHECK-NEXT: retq
587 %yy = shl i32 4, %y
588 %zz = lshr i32 2147483648, %z
589 %d = select i1 %c, i32 %yy, i32 %zz
590 %and = and i32 %x, %d
591 %r = icmp eq i32 %and, %d
592 ret i1 %r
593 }
595 define <4 x i1> @pow2_vselect_eq(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
596 ; CHECK-LABEL: pow2_vselect_eq:
597 ; CHECK: # %bb.0:
598 ; CHECK-NEXT: pslld $31, %xmm0
599 ; CHECK-NEXT: psrad $31, %xmm0
600 ; CHECK-NEXT: pslld $23, %xmm2
601 ; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
602 ; CHECK-NEXT: cvttps2dq %xmm2, %xmm2
603 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
604 ; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
605 ; CHECK-NEXT: movdqa %xmm5, %xmm6
606 ; CHECK-NEXT: psrld %xmm4, %xmm6
607 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[0,1,1,1,4,5,6,7]
608 ; CHECK-NEXT: movdqa %xmm5, %xmm7
609 ; CHECK-NEXT: psrld %xmm4, %xmm7
610 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0]
611 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
612 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
613 ; CHECK-NEXT: movdqa %xmm5, %xmm6
614 ; CHECK-NEXT: psrld %xmm4, %xmm6
615 ; CHECK-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7]
616 ; CHECK-NEXT: psrld %xmm3, %xmm5
617 ; CHECK-NEXT: punpckhqdq {{.*#+}} xmm5 = xmm5[1],xmm6[1]
618 ; CHECK-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,3],xmm5[0,3]
619 ; CHECK-NEXT: pand %xmm0, %xmm2
620 ; CHECK-NEXT: pandn %xmm7, %xmm0
621 ; CHECK-NEXT: por %xmm2, %xmm0
622 ; CHECK-NEXT: pand %xmm0, %xmm1
623 ; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
624 ; CHECK-NEXT: retq
625 %yy = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
626 %zz = lshr <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>, %z
627 %d = select <4 x i1> %c, <4 x i32> %yy, <4 x i32> %zz
628 %and = and <4 x i32> %x, %d
629 %r = icmp eq <4 x i32> %and, %d
630 ret <4 x i1> %r
631 }
633 define <4 x i1> @pow2_vselect_ne(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
634 ; CHECK-LABEL: pow2_vselect_ne:
635 ; CHECK: # %bb.0:
636 ; CHECK-NEXT: pslld $31, %xmm0
637 ; CHECK-NEXT: psrad $31, %xmm0
638 ; CHECK-NEXT: pslld $23, %xmm2
639 ; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
640 ; CHECK-NEXT: cvttps2dq %xmm2, %xmm2
641 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
642 ; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
643 ; CHECK-NEXT: movdqa %xmm5, %xmm6
644 ; CHECK-NEXT: psrld %xmm4, %xmm6
645 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[0,1,1,1,4,5,6,7]
646 ; CHECK-NEXT: movdqa %xmm5, %xmm7
647 ; CHECK-NEXT: psrld %xmm4, %xmm7
648 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0]
649 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
650 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
651 ; CHECK-NEXT: movdqa %xmm5, %xmm6
652 ; CHECK-NEXT: psrld %xmm4, %xmm6
653 ; CHECK-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7]
654 ; CHECK-NEXT: psrld %xmm3, %xmm5
655 ; CHECK-NEXT: punpckhqdq {{.*#+}} xmm5 = xmm5[1],xmm6[1]
656 ; CHECK-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,3],xmm5[0,3]
657 ; CHECK-NEXT: pand %xmm0, %xmm2
658 ; CHECK-NEXT: pandn %xmm7, %xmm0
659 ; CHECK-NEXT: por %xmm2, %xmm0
660 ; CHECK-NEXT: pand %xmm1, %xmm0
661 ; CHECK-NEXT: pxor %xmm1, %xmm1
662 ; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
663 ; CHECK-NEXT: retq
664 %yy = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
665 %zz = lshr <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>, %z
666 %d = select <4 x i1> %c, <4 x i32> %yy, <4 x i32> %zz
667 %and = and <4 x i32> %x, %d
668 %r = icmp ne <4 x i32> %and, %d
669 ret <4 x i1> %r
670 }
672 define <4 x i1> @pow2_vselect_fail0_ne(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
673 ; CHECK-LABEL: pow2_vselect_fail0_ne:
674 ; CHECK: # %bb.0:
675 ; CHECK-NEXT: pslld $31, %xmm0
676 ; CHECK-NEXT: psrad $31, %xmm0
677 ; CHECK-NEXT: pslld $23, %xmm2
678 ; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
679 ; CHECK-NEXT: cvttps2dq %xmm2, %xmm2
680 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
681 ; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [1073741824,1073741824,1073741824,1073741824]
682 ; CHECK-NEXT: movdqa %xmm5, %xmm6
683 ; CHECK-NEXT: psrld %xmm4, %xmm6
684 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[0,1,1,1,4,5,6,7]
685 ; CHECK-NEXT: movdqa %xmm5, %xmm7
686 ; CHECK-NEXT: psrld %xmm4, %xmm7
687 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0]
688 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
689 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
690 ; CHECK-NEXT: movdqa %xmm5, %xmm6
691 ; CHECK-NEXT: psrld %xmm4, %xmm6
692 ; CHECK-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7]
693 ; CHECK-NEXT: psrld %xmm3, %xmm5
694 ; CHECK-NEXT: punpckhqdq {{.*#+}} xmm5 = xmm5[1],xmm6[1]
695 ; CHECK-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,3],xmm5[0,3]
696 ; CHECK-NEXT: pand %xmm0, %xmm2
697 ; CHECK-NEXT: pandn %xmm7, %xmm0
698 ; CHECK-NEXT: por %xmm2, %xmm0
699 ; CHECK-NEXT: pcmpeqd %xmm2, %xmm2
700 ; CHECK-NEXT: pand %xmm0, %xmm1
701 ; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
702 ; CHECK-NEXT: pxor %xmm2, %xmm0
703 ; CHECK-NEXT: retq
704 %yy = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
705 %zz = lshr <4 x i32> <i32 1073741824, i32 1073741824, i32 1073741824, i32 1073741824>, %z
706 %d = select <4 x i1> %c, <4 x i32> %yy, <4 x i32> %zz
707 %and = and <4 x i32> %x, %d
708 %r = icmp ne <4 x i32> %and, %d
709 ret <4 x i1> %r
710 }
712 define <4 x i1> @pow2_vselect_fail2_ne(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
713 ; CHECK-LABEL: pow2_vselect_fail2_ne:
714 ; CHECK: # %bb.0:
715 ; CHECK-NEXT: pslld $31, %xmm0
716 ; CHECK-NEXT: psrad $31, %xmm0
717 ; CHECK-NEXT: pslld $23, %xmm2
718 ; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
719 ; CHECK-NEXT: cvttps2dq %xmm2, %xmm2
720 ; CHECK-NEXT: movdqa {{.*#+}} xmm4 = [4,4,4,4]
721 ; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
722 ; CHECK-NEXT: pmuludq %xmm4, %xmm2
723 ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
724 ; CHECK-NEXT: pmuludq %xmm4, %xmm5
725 ; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3]
726 ; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
727 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
728 ; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
729 ; CHECK-NEXT: movdqa %xmm5, %xmm6
730 ; CHECK-NEXT: psrld %xmm4, %xmm6
731 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[0,1,1,1,4,5,6,7]
732 ; CHECK-NEXT: movdqa %xmm5, %xmm7
733 ; CHECK-NEXT: psrld %xmm4, %xmm7
734 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0]
735 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
736 ; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7]
737 ; CHECK-NEXT: movdqa %xmm5, %xmm6
738 ; CHECK-NEXT: psrld %xmm4, %xmm6
739 ; CHECK-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7]
740 ; CHECK-NEXT: psrld %xmm3, %xmm5
741 ; CHECK-NEXT: punpckhqdq {{.*#+}} xmm5 = xmm5[1],xmm6[1]
742 ; CHECK-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,3],xmm5[0,3]
743 ; CHECK-NEXT: pand %xmm0, %xmm2
744 ; CHECK-NEXT: pandn %xmm7, %xmm0
745 ; CHECK-NEXT: por %xmm2, %xmm0
746 ; CHECK-NEXT: pcmpeqd %xmm2, %xmm2
747 ; CHECK-NEXT: pand %xmm0, %xmm1
748 ; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
749 ; CHECK-NEXT: pxor %xmm2, %xmm0
750 ; CHECK-NEXT: retq
751 %yy = shl <4 x i32> <i32 4, i32 4, i32 4, i32 4>, %y
752 %zz = lshr <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>, %z
753 %d = select <4 x i1> %c, <4 x i32> %yy, <4 x i32> %zz
754 %and = and <4 x i32> %x, %d
755 %r = icmp ne <4 x i32> %and, %d
756 ret <4 x i1> %r
757 }
759 define i1 @pow2_and(i32 %x, i32 %y) {
760 ; CHECK-LABEL: pow2_and:
761 ; CHECK: # %bb.0:
762 ; CHECK-NEXT: movl %esi, %ecx
763 ; CHECK-NEXT: movl $4, %eax
764 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
765 ; CHECK-NEXT: shll %cl, %eax
766 ; CHECK-NEXT: movl %eax, %ecx
767 ; CHECK-NEXT: negl %ecx
768 ; CHECK-NEXT: andl %eax, %ecx
769 ; CHECK-NEXT: testl %ecx, %edi
770 ; CHECK-NEXT: setne %al
771 ; CHECK-NEXT: retq
772 %yy = shl nuw nsw i32 4, %y
773 %nyy = sub i32 0, %yy
774 %d = and i32 %yy, %nyy
775 %and = and i32 %x, %d
776 %r = icmp eq i32 %and, %d
777 ret i1 %r
778 }
780 define i1 @pow2_and_fail0(i32 %x, i32 %y) {
781 ; CHECK-LABEL: pow2_and_fail0:
782 ; CHECK: # %bb.0:
783 ; CHECK-NEXT: movl %esi, %ecx
784 ; CHECK-NEXT: movl $4, %eax
785 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
786 ; CHECK-NEXT: shll %cl, %eax
787 ; CHECK-NEXT: movl %eax, %ecx
788 ; CHECK-NEXT: negl %ecx
789 ; CHECK-NEXT: andl %eax, %ecx
790 ; CHECK-NEXT: notl %edi
791 ; CHECK-NEXT: testl %edi, %ecx
792 ; CHECK-NEXT: sete %al
793 ; CHECK-NEXT: retq
794 %yy = shl i32 4, %y
795 %nyy = sub i32 0, %yy
796 %d = and i32 %yy, %nyy
797 %and = and i32 %x, %d
798 %r = icmp eq i32 %and, %d
799 ret i1 %r
800 }
802 define i1 @pow2_and_fail1(i32 %x, i32 %y) {
803 ; CHECK-LABEL: pow2_and_fail1:
804 ; CHECK: # %bb.0:
805 ; CHECK-NEXT: movl %esi, %ecx
806 ; CHECK-NEXT: movl $1, %eax
807 ; CHECK-NEXT: movl $1, %edx
808 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
809 ; CHECK-NEXT: shll %cl, %edx
810 ; CHECK-NEXT: subl %edx, %eax
811 ; CHECK-NEXT: andl %edx, %eax
812 ; CHECK-NEXT: notl %edi
813 ; CHECK-NEXT: testl %edi, %eax
814 ; CHECK-NEXT: sete %al
815 ; CHECK-NEXT: retq
816 %yy = shl i32 1, %y
817 %nyy = sub i32 1, %yy
818 %d = and i32 %yy, %nyy
819 %and = and i32 %x, %d
820 %r = icmp eq i32 %and, %d
821 ret i1 %r
822 }
824 define i1 @pow2_and_fail2(i32 %x, i32 %y, i32 %z) {
825 ; CHECK-LABEL: pow2_and_fail2:
826 ; CHECK: # %bb.0:
827 ; CHECK-NEXT: movl %esi, %ecx
828 ; CHECK-NEXT: movl $1, %eax
829 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
830 ; CHECK-NEXT: shll %cl, %eax
831 ; CHECK-NEXT: andl %edx, %eax
832 ; CHECK-NEXT: notl %edi
833 ; CHECK-NEXT: testl %edi, %eax
834 ; CHECK-NEXT: sete %al
835 ; CHECK-NEXT: retq
836 %yy = shl i32 1, %y
837 %d = and i32 %yy, %z
838 %and = and i32 %x, %d
839 %r = icmp eq i32 %and, %d
840 ret i1 %r
841 }
843 define i1 @pow2_though_zext(i32 %x, i16 %y) {
844 ; CHECK-LABEL: pow2_though_zext:
845 ; CHECK: # %bb.0:
846 ; CHECK-NEXT: movl %esi, %ecx
847 ; CHECK-NEXT: movl $4, %eax
848 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
849 ; CHECK-NEXT: shll %cl, %eax
850 ; CHECK-NEXT: andl %edi, %eax
851 ; CHECK-NEXT: testl $65535, %eax # imm = 0xFFFF
852 ; CHECK-NEXT: setne %al
853 ; CHECK-NEXT: retq
854 %dd = shl nuw nsw i16 4, %y
855 %d = zext i16 %dd to i32
856 %and = and i32 %x, %d
857 %r = icmp eq i32 %and, %d
858 ret i1 %r
859 }