| blob | 8d3d0d0799c269e2568f37fedefa9d9913436772 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
3 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
7 define i32 @f(<4 x float> %A, ptr %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4 x i32> %F, <8 x i16> %G, <16 x i8> %H, i64 %I, ptr %loadptr) nounwind {
8 ; X86-SSE-LABEL: f:
9 ; X86-SSE: # %bb.0:
10 ; X86-SSE-NEXT: pushl %ebp
11 ; X86-SSE-NEXT: movl %esp, %ebp
12 ; X86-SSE-NEXT: pushl %esi
13 ; X86-SSE-NEXT: andl $-16, %esp
14 ; X86-SSE-NEXT: subl $16, %esp
15 ; X86-SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
16 ; X86-SSE-NEXT: movl 12(%ebp), %ecx
17 ; X86-SSE-NEXT: movdqa 56(%ebp), %xmm4
18 ; X86-SSE-NEXT: movdqa 40(%ebp), %xmm5
19 ; X86-SSE-NEXT: movdqa 24(%ebp), %xmm6
20 ; X86-SSE-NEXT: movl 8(%ebp), %esi
21 ; X86-SSE-NEXT: movl 80(%ebp), %edx
22 ; X86-SSE-NEXT: movl (%edx), %eax
23 ; X86-SSE-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
24 ; X86-SSE-NEXT: movntps %xmm0, (%esi)
25 ; X86-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2
26 ; X86-SSE-NEXT: addl (%edx), %eax
27 ; X86-SSE-NEXT: movntdq %xmm2, (%esi)
28 ; X86-SSE-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
29 ; X86-SSE-NEXT: addl (%edx), %eax
30 ; X86-SSE-NEXT: movntpd %xmm1, (%esi)
31 ; X86-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm6
32 ; X86-SSE-NEXT: addl (%edx), %eax
33 ; X86-SSE-NEXT: movntdq %xmm6, (%esi)
34 ; X86-SSE-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm5
35 ; X86-SSE-NEXT: addl (%edx), %eax
36 ; X86-SSE-NEXT: movntdq %xmm5, (%esi)
37 ; X86-SSE-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}, %xmm4
38 ; X86-SSE-NEXT: addl (%edx), %eax
39 ; X86-SSE-NEXT: movntdq %xmm4, (%esi)
40 ; X86-SSE-NEXT: addl (%edx), %eax
41 ; X86-SSE-NEXT: movntil %ecx, (%esi)
42 ; X86-SSE-NEXT: addl (%edx), %eax
43 ; X86-SSE-NEXT: movsd %xmm3, (%esi)
44 ; X86-SSE-NEXT: addl (%edx), %eax
45 ; X86-SSE-NEXT: leal -4(%ebp), %esp
46 ; X86-SSE-NEXT: popl %esi
47 ; X86-SSE-NEXT: popl %ebp
48 ; X86-SSE-NEXT: retl
49 ;
50 ; X86-AVX-LABEL: f:
51 ; X86-AVX: # %bb.0:
52 ; X86-AVX-NEXT: pushl %ebp
53 ; X86-AVX-NEXT: movl %esp, %ebp
54 ; X86-AVX-NEXT: pushl %esi
55 ; X86-AVX-NEXT: andl $-16, %esp
56 ; X86-AVX-NEXT: subl $16, %esp
57 ; X86-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
58 ; X86-AVX-NEXT: movl 12(%ebp), %ecx
59 ; X86-AVX-NEXT: vmovdqa 56(%ebp), %xmm4
60 ; X86-AVX-NEXT: vmovdqa 40(%ebp), %xmm5
61 ; X86-AVX-NEXT: vmovdqa 24(%ebp), %xmm6
62 ; X86-AVX-NEXT: movl 8(%ebp), %esi
63 ; X86-AVX-NEXT: movl 80(%ebp), %edx
64 ; X86-AVX-NEXT: movl (%edx), %eax
65 ; X86-AVX-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
66 ; X86-AVX-NEXT: vmovntps %xmm0, (%esi)
67 ; X86-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm0
68 ; X86-AVX-NEXT: addl (%edx), %eax
69 ; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)
70 ; X86-AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm0
71 ; X86-AVX-NEXT: addl (%edx), %eax
72 ; X86-AVX-NEXT: vmovntpd %xmm0, (%esi)
73 ; X86-AVX-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm6, %xmm0
74 ; X86-AVX-NEXT: addl (%edx), %eax
75 ; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)
76 ; X86-AVX-NEXT: vpaddw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm5, %xmm0
77 ; X86-AVX-NEXT: addl (%edx), %eax
78 ; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)
79 ; X86-AVX-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}, %xmm4, %xmm0
80 ; X86-AVX-NEXT: addl (%edx), %eax
81 ; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)
82 ; X86-AVX-NEXT: addl (%edx), %eax
83 ; X86-AVX-NEXT: movntil %ecx, (%esi)
84 ; X86-AVX-NEXT: addl (%edx), %eax
85 ; X86-AVX-NEXT: vmovsd %xmm3, (%esi)
86 ; X86-AVX-NEXT: addl (%edx), %eax
87 ; X86-AVX-NEXT: leal -4(%ebp), %esp
88 ; X86-AVX-NEXT: popl %esi
89 ; X86-AVX-NEXT: popl %ebp
90 ; X86-AVX-NEXT: retl
91 ;
92 ; X64-SSE-LABEL: f:
93 ; X64-SSE: # %bb.0:
94 ; X64-SSE-NEXT: movl (%rcx), %eax
95 ; X64-SSE-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
96 ; X64-SSE-NEXT: movntps %xmm0, (%rdi)
97 ; X64-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
98 ; X64-SSE-NEXT: addl (%rcx), %eax
99 ; X64-SSE-NEXT: movntdq %xmm2, (%rdi)
100 ; X64-SSE-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
101 ; X64-SSE-NEXT: addl (%rcx), %eax
102 ; X64-SSE-NEXT: movntpd %xmm1, (%rdi)
103 ; X64-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
104 ; X64-SSE-NEXT: addl (%rcx), %eax
105 ; X64-SSE-NEXT: movntdq %xmm3, (%rdi)
106 ; X64-SSE-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
107 ; X64-SSE-NEXT: addl (%rcx), %eax
108 ; X64-SSE-NEXT: movntdq %xmm4, (%rdi)
109 ; X64-SSE-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
110 ; X64-SSE-NEXT: addl (%rcx), %eax
111 ; X64-SSE-NEXT: movntdq %xmm5, (%rdi)
112 ; X64-SSE-NEXT: addl (%rcx), %eax
113 ; X64-SSE-NEXT: movntil %esi, (%rdi)
114 ; X64-SSE-NEXT: addl (%rcx), %eax
115 ; X64-SSE-NEXT: movntiq %rdx, (%rdi)
116 ; X64-SSE-NEXT: addl (%rcx), %eax
117 ; X64-SSE-NEXT: retq
118 ;
119 ; X64-AVX-LABEL: f:
120 ; X64-AVX: # %bb.0:
121 ; X64-AVX-NEXT: movl (%rcx), %eax
122 ; X64-AVX-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
123 ; X64-AVX-NEXT: vmovntps %xmm0, (%rdi)
124 ; X64-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
125 ; X64-AVX-NEXT: addl (%rcx), %eax
126 ; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)
127 ; X64-AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
128 ; X64-AVX-NEXT: addl (%rcx), %eax
129 ; X64-AVX-NEXT: vmovntpd %xmm0, (%rdi)
130 ; X64-AVX-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm0
131 ; X64-AVX-NEXT: addl (%rcx), %eax
132 ; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)
133 ; X64-AVX-NEXT: vpaddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm0
134 ; X64-AVX-NEXT: addl (%rcx), %eax
135 ; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)
136 ; X64-AVX-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5, %xmm0
137 ; X64-AVX-NEXT: addl (%rcx), %eax
138 ; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)
139 ; X64-AVX-NEXT: addl (%rcx), %eax
140 ; X64-AVX-NEXT: movntil %esi, (%rdi)
141 ; X64-AVX-NEXT: addl (%rcx), %eax
142 ; X64-AVX-NEXT: movntiq %rdx, (%rdi)
143 ; X64-AVX-NEXT: addl (%rcx), %eax
144 ; X64-AVX-NEXT: retq
145 %v0 = load i32, ptr %loadptr, align 1
146 %A2 = fadd <4 x float> %A, <float 1.0, float 2.0, float 3.0, float 4.0>
147 store <4 x float> %A2, ptr %B, align 16, !nontemporal !0
148 %v1 = load i32, ptr %loadptr, align 1
149 %E2 = add <2 x i64> %E, <i64 1, i64 2>
150 store <2 x i64> %E2, ptr %B, align 16, !nontemporal !0
151 %v2 = load i32, ptr %loadptr, align 1
152 %C2 = fadd <2 x double> %C, <double 1.0, double 2.0>
153 store <2 x double> %C2, ptr %B, align 16, !nontemporal !0
154 %v3 = load i32, ptr %loadptr, align 1
155 %F2 = add <4 x i32> %F, <i32 1, i32 2, i32 3, i32 4>
156 store <4 x i32> %F2, ptr %B, align 16, !nontemporal !0
157 %v4 = load i32, ptr %loadptr, align 1
158 %G2 = add <8 x i16> %G, <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>
159 store <8 x i16> %G2, ptr %B, align 16, !nontemporal !0
160 %v5 = load i32, ptr %loadptr, align 1
161 %H2 = add <16 x i8> %H, <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>
162 store <16 x i8> %H2, ptr %B, align 16, !nontemporal !0
163 %v6 = load i32, ptr %loadptr, align 1
164 store i32 %D, ptr %B, align 1, !nontemporal !0
165 %v7 = load i32, ptr %loadptr, align 1
166 store i64 %I, ptr %B, align 1, !nontemporal !0
167 %v8 = load i32, ptr %loadptr, align 1
168 %sum1 = add i32 %v0, %v1
169 %sum2 = add i32 %sum1, %v2
170 %sum3 = add i32 %sum2, %v3
171 %sum4 = add i32 %sum3, %v4
172 %sum5 = add i32 %sum4, %v5
173 %sum6 = add i32 %sum5, %v6
174 %sum7 = add i32 %sum6, %v7
175 %sum8 = add i32 %sum7, %v8
176 ret i32 %sum8
177 }
179 !0 = !{i32 1}