llvm/test/TableGen/HasNoUse.td

   1 // RUN: llvm-tblgen -gen-dag-isel -I %p/../../include -I %p/Common %s -o - < %s | FileCheck -check-prefix=SDAG %s
   2 // RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -I %p/../../include -I %p/Common %s -o - < %s | FileCheck -check-prefix=GISEL %s
   3
   4 include "llvm/Target/Target.td"
   5 include "GlobalISelEmitterCommon.td"
   6
   7 // Test the HasNoUse predicate
   8
   9 def NO_RET_ATOMIC_ADD : I<(outs), (ins GPR32Op:$src0, GPR32Op:$src1), []>;
  10
  11 // SDAG: case 0: {
  12 // SDAG-NEXT: // Predicate_atomic_load_add_no_ret_i32
  13 // SDAG-NEXT: SDNode *N = Node;
  14 // SDAG-NEXT: (void)N;
  15 // SDAG-NEXT: if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false;
  16 // SDAG-NEXT: if (!SDValue(N, 0).use_empty()) return false;
  17 // SDAG-NEXT: return true;
  18
  19 // GISEL: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_ATOMICRMW_ADD),
  20 // GISEL-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
  21 // GISEL-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
  22 // GISEL-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
  23 // GISEL-NEXT: GIM_CheckHasNoUse, /*MI*/0,
  24 // GISEL-NEXT: // MIs[0] src0
  25 // GISEL-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
  26 // GISEL-NEXT: // (atomic_load_add:{ *:[i32] } iPTR:{ *:[iPTR] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_add_no_ret_i32>>  =>  (NO_RET_ATOMIC_ADD GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)
  27 // GISEL-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::NO_RET_ATOMIC_ADD),
  28 // GISEL-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // src0
  29 // GISEL-NEXT: GIR_RootToRootCopy, /*OpIdx*/2, // src1
  30 // GISEL-NEXT: GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
  31 // GISEL-NEXT: GIR_RootConstrainSelectedInstOperands,
  32 // GISEL-NEXT: // GIR_Coverage, 0,
  33 // GISEL-NEXT: GIR_EraseRootFromParent_Done,
  34 let HasNoUse = true in
  35 defm atomic_load_add_no_ret : binary_atomic_op<atomic_load_add>;
  36
  37 def : Pat <
  38   (atomic_load_add_no_ret_i32 iPTR:$src0, i32:$src1),
  39   (NO_RET_ATOMIC_ADD GPR32:$src0, GPR32:$src1)
  40 >;