1 // RUN: llvm-tblgen -gen-emitter -I %p/../../include %s | FileCheck %s
3 // Verify VarLenCodeEmitterGen using EncodingInfos with different HwModes.
5 include "llvm/Target/Target.td"
7 def ArchInstrInfo : InstrInfo { }
10 let InstructionSet = ArchInstrInfo;
13 def Reg : Register<"reg">;
15 def RegClass : RegisterClass<"foo", [i64], 0, (add Reg)>;
17 def GR64 : RegisterOperand<RegClass>;
19 def HasA : Predicate<"Subtarget->hasA()">;
20 def HasB : Predicate<"Subtarget->hasB()">;
22 def ModeA : HwMode<"+a", [HasA]>;
23 def ModeB : HwMode<"+b", [HasB]>;
25 def fooTypeEncA : InstructionEncoding {
33 def fooTypeEncB : InstructionEncoding {
41 def fooTypeEncC : InstructionEncoding {
49 class VarLenInst : Instruction {
50 let AsmString = "foo $src, $dst";
51 let OutOperandList = (outs GR64:$dst);
52 let InOperandList = (ins GR64:$src);
55 // Defined in both HwModes
56 def foo : VarLenInst {
57 let EncodingInfos = EncodingByHwMode<
59 [fooTypeEncA, fooTypeEncB]
63 // Same encoding in any HwMode
64 def bar : VarLenInst {
72 // Only defined in HwMode B.
73 def baz : VarLenInst {
74 let EncodingInfos = EncodingByHwMode<
80 // CHECK: static const uint64_t InstBits_ModeA[] = {
81 // CHECK: UINT64_C(3), // bar
82 // CHECK: UINT64_C(1), // foo
84 // CHECK: static const uint64_t InstBits_ModeB[] = {
85 // CHECK: UINT64_C(3), // bar
86 // CHECK: UINT64_C(4), // baz
87 // CHECK: UINT64_C(2), // foo
89 // CHECK: auto getInstBits_ModeA =
90 // CHECK: Idx = Index_ModeA
92 // CHECK: auto getInstBits_ModeB =
93 // CHECK: Idx = Index_ModeB
95 // CHECK: case ::bar: {
96 // CHECK-NOT: switch (Mode) {
97 // CHECK: Inst = getInstBits_ModeA
99 // CHECK: case ::foo: {
100 // CHECK: switch (Mode) {
102 // CHECK: Inst = getInstBits_ModeA
104 // CHECK: Inst = getInstBits_ModeB
106 // CHECK: case ::baz: {
108 // CHECK: llvm_unreachable("Undefined encoding in this mode");
110 // CHECK: Inst = getInstBits_ModeB