1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -expand-memcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64_1LD
3 ; RUN: opt -S -expand-memcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64_2LD
4 ; RUN: opt -S -passes=expand-memcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64_1LD
5 ; RUN: opt -S -passes=expand-memcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64_2LD
7 declare i32 @memcmp(ptr nocapture, ptr nocapture, i64)
9 define i32 @cmp2(ptr nocapture readonly %x, ptr nocapture readonly %y) {
11 ; X64-NEXT: [[TMP3:%.*]] = load i16, ptr [[X:%.*]], align 1
12 ; X64-NEXT: [[TMP4:%.*]] = load i16, ptr [[Y:%.*]], align 1
13 ; X64-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
14 ; X64-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
15 ; X64-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
16 ; X64-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32
17 ; X64-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]]
18 ; X64-NEXT: ret i32 [[TMP9]]
20 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)
24 define i32 @cmp2_align2(ptr nocapture readonly align 2 %x, ptr nocapture readonly align 2 %y) {
25 ; X64-LABEL: @cmp2_align2(
26 ; X64-NEXT: [[TMP3:%.*]] = load i16, ptr [[X:%.*]], align 2
27 ; X64-NEXT: [[TMP4:%.*]] = load i16, ptr [[Y:%.*]], align 2
28 ; X64-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
29 ; X64-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
30 ; X64-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
31 ; X64-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32
32 ; X64-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]]
33 ; X64-NEXT: ret i32 [[TMP9]]
35 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)
39 define i32 @cmp3(ptr nocapture readonly %x, ptr nocapture readonly %y) {
41 ; X64-NEXT: br label [[LOADBB:%.*]]
43 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i16 [[TMP7:%.*]], [[TMP8:%.*]]
44 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
45 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
47 ; X64-NEXT: [[TMP5:%.*]] = load i16, ptr [[X:%.*]], align 1
48 ; X64-NEXT: [[TMP6:%.*]] = load i16, ptr [[Y:%.*]], align 1
49 ; X64-NEXT: [[TMP7]] = call i16 @llvm.bswap.i16(i16 [[TMP5]])
50 ; X64-NEXT: [[TMP8]] = call i16 @llvm.bswap.i16(i16 [[TMP6]])
51 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i16 [[TMP7]], [[TMP8]]
52 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
54 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 2
55 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 2
56 ; X64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
57 ; X64-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP11]], align 1
58 ; X64-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
59 ; X64-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
60 ; X64-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
61 ; X64-NEXT: br label [[ENDBLOCK]]
63 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
64 ; X64-NEXT: ret i32 [[PHI_RES]]
66 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 3)
70 define i32 @cmp4(ptr nocapture readonly %x, ptr nocapture readonly %y) {
72 ; X64-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
73 ; X64-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
74 ; X64-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
75 ; X64-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])
76 ; X64-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
77 ; X64-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]
78 ; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
79 ; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
80 ; X64-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]]
81 ; X64-NEXT: ret i32 [[TMP11]]
83 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 4)
87 define i32 @cmp5(ptr nocapture readonly %x, ptr nocapture readonly %y) {
89 ; X64-NEXT: br label [[LOADBB:%.*]]
91 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP7:%.*]], [[TMP8:%.*]]
92 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
93 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
95 ; X64-NEXT: [[TMP5:%.*]] = load i32, ptr [[X:%.*]], align 1
96 ; X64-NEXT: [[TMP6:%.*]] = load i32, ptr [[Y:%.*]], align 1
97 ; X64-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
98 ; X64-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
99 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
100 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
102 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 4
103 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 4
104 ; X64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
105 ; X64-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP11]], align 1
106 ; X64-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
107 ; X64-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
108 ; X64-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
109 ; X64-NEXT: br label [[ENDBLOCK]]
111 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
112 ; X64-NEXT: ret i32 [[PHI_RES]]
114 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 5)
118 define i32 @cmp6(ptr nocapture readonly %x, ptr nocapture readonly %y) {
120 ; X64-NEXT: br label [[LOADBB:%.*]]
122 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
123 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
124 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
125 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
126 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
128 ; X64-NEXT: [[TMP5:%.*]] = load i32, ptr [[X:%.*]], align 1
129 ; X64-NEXT: [[TMP6:%.*]] = load i32, ptr [[Y:%.*]], align 1
130 ; X64-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
131 ; X64-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
132 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
133 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
135 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 4
136 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 4
137 ; X64-NEXT: [[TMP14:%.*]] = load i16, ptr [[TMP10]], align 1
138 ; X64-NEXT: [[TMP15:%.*]] = load i16, ptr [[TMP11]], align 1
139 ; X64-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
140 ; X64-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]])
141 ; X64-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i32
142 ; X64-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i32
143 ; X64-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP18]], [[TMP19]]
144 ; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
146 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
147 ; X64-NEXT: ret i32 [[PHI_RES]]
149 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)
153 define i32 @cmp7(ptr nocapture readonly %x, ptr nocapture readonly %y) {
155 ; X64-NEXT: br label [[LOADBB:%.*]]
157 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
158 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
159 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
160 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
161 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
163 ; X64-NEXT: [[TMP5:%.*]] = load i32, ptr [[X:%.*]], align 1
164 ; X64-NEXT: [[TMP6:%.*]] = load i32, ptr [[Y:%.*]], align 1
165 ; X64-NEXT: [[TMP7]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
166 ; X64-NEXT: [[TMP8]] = call i32 @llvm.bswap.i32(i32 [[TMP6]])
167 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP7]], [[TMP8]]
168 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
170 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 3
171 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 3
172 ; X64-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP10]], align 1
173 ; X64-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 1
174 ; X64-NEXT: [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
175 ; X64-NEXT: [[TMP17]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])
176 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP16]], [[TMP17]]
177 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
179 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
180 ; X64-NEXT: ret i32 [[PHI_RES]]
182 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 7)
186 define i32 @cmp8(ptr nocapture readonly %x, ptr nocapture readonly %y) {
188 ; X64-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
189 ; X64-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
190 ; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
191 ; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])
192 ; X64-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]]
193 ; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]
194 ; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
195 ; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
196 ; X64-NEXT: [[TMP11:%.*]] = sub i32 [[TMP9]], [[TMP10]]
197 ; X64-NEXT: ret i32 [[TMP11]]
199 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 8)
203 define i32 @cmp9(ptr nocapture readonly %x, ptr nocapture readonly %y) {
205 ; X64-NEXT: br label [[LOADBB:%.*]]
207 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP7:%.*]], [[TMP8:%.*]]
208 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
209 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
211 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
212 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
213 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
214 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
215 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
216 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
218 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 8
219 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 8
220 ; X64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
221 ; X64-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP11]], align 1
222 ; X64-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
223 ; X64-NEXT: [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
224 ; X64-NEXT: [[TMP16:%.*]] = sub i32 [[TMP14]], [[TMP15]]
225 ; X64-NEXT: br label [[ENDBLOCK]]
227 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP16]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
228 ; X64-NEXT: ret i32 [[PHI_RES]]
230 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 9)
234 define i32 @cmp10(ptr nocapture readonly %x, ptr nocapture readonly %y) {
236 ; X64-NEXT: br label [[LOADBB:%.*]]
238 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
239 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
240 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
241 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
242 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
244 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
245 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
246 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
247 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
248 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
249 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
251 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 8
252 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 8
253 ; X64-NEXT: [[TMP14:%.*]] = load i16, ptr [[TMP10]], align 1
254 ; X64-NEXT: [[TMP15:%.*]] = load i16, ptr [[TMP11]], align 1
255 ; X64-NEXT: [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
256 ; X64-NEXT: [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]])
257 ; X64-NEXT: [[TMP18]] = zext i16 [[TMP16]] to i64
258 ; X64-NEXT: [[TMP19]] = zext i16 [[TMP17]] to i64
259 ; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]]
260 ; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
262 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
263 ; X64-NEXT: ret i32 [[PHI_RES]]
265 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 10)
269 define i32 @cmp11(ptr nocapture readonly %x, ptr nocapture readonly %y) {
271 ; X64-NEXT: br label [[LOADBB:%.*]]
273 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
274 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
275 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
276 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
277 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
279 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
280 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
281 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
282 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
283 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
284 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
286 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 3
287 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 3
288 ; X64-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP10]], align 1
289 ; X64-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP11]], align 1
290 ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
291 ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
292 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
293 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
295 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
296 ; X64-NEXT: ret i32 [[PHI_RES]]
298 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 11)
302 define i32 @cmp12(ptr nocapture readonly %x, ptr nocapture readonly %y) {
304 ; X64-NEXT: br label [[LOADBB:%.*]]
306 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1:%.*]] ]
307 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
308 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
309 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
310 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
312 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
313 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
314 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
315 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
316 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
317 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
319 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 8
320 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 8
321 ; X64-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP10]], align 1
322 ; X64-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 1
323 ; X64-NEXT: [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
324 ; X64-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])
325 ; X64-NEXT: [[TMP18]] = zext i32 [[TMP16]] to i64
326 ; X64-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64
327 ; X64-NEXT: [[TMP20:%.*]] = icmp eq i64 [[TMP18]], [[TMP19]]
328 ; X64-NEXT: br i1 [[TMP20]], label [[ENDBLOCK]], label [[RES_BLOCK]]
330 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
331 ; X64-NEXT: ret i32 [[PHI_RES]]
333 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 12)
337 define i32 @cmp13(ptr nocapture readonly %x, ptr nocapture readonly %y) {
339 ; X64-NEXT: br label [[LOADBB:%.*]]
341 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
342 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
343 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
344 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
345 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
347 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
348 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
349 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
350 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
351 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
352 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
354 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 5
355 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 5
356 ; X64-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP10]], align 1
357 ; X64-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP11]], align 1
358 ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
359 ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
360 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
361 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
363 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
364 ; X64-NEXT: ret i32 [[PHI_RES]]
366 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 13)
370 define i32 @cmp14(ptr nocapture readonly %x, ptr nocapture readonly %y) {
372 ; X64-NEXT: br label [[LOADBB:%.*]]
374 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
375 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
376 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
377 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
378 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
380 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
381 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
382 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
383 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
384 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
385 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
387 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 6
388 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 6
389 ; X64-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP10]], align 1
390 ; X64-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP11]], align 1
391 ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
392 ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
393 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
394 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
396 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
397 ; X64-NEXT: ret i32 [[PHI_RES]]
399 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 14)
403 define i32 @cmp15(ptr nocapture readonly %x, ptr nocapture readonly %y) {
405 ; X64-NEXT: br label [[LOADBB:%.*]]
407 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
408 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
409 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
410 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
411 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
413 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
414 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
415 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
416 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
417 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
418 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
420 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 7
421 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 7
422 ; X64-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP10]], align 1
423 ; X64-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP11]], align 1
424 ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
425 ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
426 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
427 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
429 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
430 ; X64-NEXT: ret i32 [[PHI_RES]]
432 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 15)
436 define i32 @cmp16(ptr nocapture readonly %x, ptr nocapture readonly %y) {
438 ; X64-NEXT: br label [[LOADBB:%.*]]
440 ; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1:%.*]] ]
441 ; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
442 ; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
443 ; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
444 ; X64-NEXT: br label [[ENDBLOCK:%.*]]
446 ; X64-NEXT: [[TMP5:%.*]] = load i64, ptr [[X:%.*]], align 1
447 ; X64-NEXT: [[TMP6:%.*]] = load i64, ptr [[Y:%.*]], align 1
448 ; X64-NEXT: [[TMP7]] = call i64 @llvm.bswap.i64(i64 [[TMP5]])
449 ; X64-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
450 ; X64-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP7]], [[TMP8]]
451 ; X64-NEXT: br i1 [[TMP9]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
453 ; X64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i64 8
454 ; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[Y]], i64 8
455 ; X64-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP10]], align 1
456 ; X64-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP11]], align 1
457 ; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
458 ; X64-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
459 ; X64-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP16]], [[TMP17]]
460 ; X64-NEXT: br i1 [[TMP18]], label [[ENDBLOCK]], label [[RES_BLOCK]]
462 ; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]
463 ; X64-NEXT: ret i32 [[PHI_RES]]
465 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 16)
469 define i32 @cmp_eq2(ptr nocapture readonly %x, ptr nocapture readonly %y) {
470 ; X64-LABEL: @cmp_eq2(
471 ; X64-NEXT: [[TMP3:%.*]] = load i16, ptr [[X:%.*]], align 1
472 ; X64-NEXT: [[TMP4:%.*]] = load i16, ptr [[Y:%.*]], align 1
473 ; X64-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
474 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
475 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
476 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
477 ; X64-NEXT: ret i32 [[CONV]]
479 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)
480 %cmp = icmp eq i32 %call, 0
481 %conv = zext i1 %cmp to i32
485 define i32 @cmp_eq3(ptr nocapture readonly %x, ptr nocapture readonly %y) {
486 ; X64_1LD-LABEL: @cmp_eq3(
487 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
488 ; X64_1LD: res_block:
489 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
491 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i16, ptr [[X:%.*]], align 1
492 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i16, ptr [[Y:%.*]], align 1
493 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
494 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
496 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 2
497 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 2
498 ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
499 ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
500 ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
501 ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
503 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
504 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
505 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
506 ; X64_1LD-NEXT: ret i32 [[CONV]]
508 ; X64_2LD-LABEL: @cmp_eq3(
509 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i16, ptr [[X:%.*]], align 1
510 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i16, ptr [[Y:%.*]], align 1
511 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]]
512 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 2
513 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 2
514 ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
515 ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
516 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i16
517 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i16
518 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]]
519 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i16 [[TMP5]], [[TMP12]]
520 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i16 [[TMP13]], 0
521 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
522 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
523 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
524 ; X64_2LD-NEXT: ret i32 [[CONV]]
526 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 3)
527 %cmp = icmp eq i32 %call, 0
528 %conv = zext i1 %cmp to i32
532 define i32 @cmp_eq4(ptr nocapture readonly %x, ptr nocapture readonly %y) {
533 ; X64-LABEL: @cmp_eq4(
534 ; X64-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
535 ; X64-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
536 ; X64-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
537 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
538 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
539 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
540 ; X64-NEXT: ret i32 [[CONV]]
542 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 4)
543 %cmp = icmp eq i32 %call, 0
544 %conv = zext i1 %cmp to i32
548 define i32 @cmp_eq5(ptr nocapture readonly %x, ptr nocapture readonly %y) {
549 ; X64_1LD-LABEL: @cmp_eq5(
550 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
551 ; X64_1LD: res_block:
552 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
554 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
555 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
556 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
557 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
559 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
560 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
561 ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
562 ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
563 ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
564 ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
566 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
567 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
568 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
569 ; X64_1LD-NEXT: ret i32 [[CONV]]
571 ; X64_2LD-LABEL: @cmp_eq5(
572 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
573 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
574 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
575 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
576 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
577 ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
578 ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
579 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i32
580 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i32
581 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
582 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
583 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
584 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
585 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
586 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
587 ; X64_2LD-NEXT: ret i32 [[CONV]]
589 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 5)
590 %cmp = icmp eq i32 %call, 0
591 %conv = zext i1 %cmp to i32
595 define i32 @cmp_eq6(ptr nocapture readonly %x, ptr nocapture readonly %y) {
596 ; X64_1LD-LABEL: @cmp_eq6(
597 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
598 ; X64_1LD: res_block:
599 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
601 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
602 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
603 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
604 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
606 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
607 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
608 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 1
609 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 1
610 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
611 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
613 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
614 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
615 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
616 ; X64_1LD-NEXT: ret i32 [[CONV]]
618 ; X64_2LD-LABEL: @cmp_eq6(
619 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
620 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
621 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
622 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
623 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
624 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 1
625 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 1
626 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
627 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
628 ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
629 ; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
630 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
631 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
632 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
633 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
634 ; X64_2LD-NEXT: ret i32 [[CONV]]
636 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)
637 %cmp = icmp eq i32 %call, 0
638 %conv = zext i1 %cmp to i32
642 define i32 @cmp_eq6_align4(ptr nocapture readonly align 4 %x, ptr nocapture readonly align 4 %y) {
643 ; X64_1LD-LABEL: @cmp_eq6_align4(
644 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
645 ; X64_1LD: res_block:
646 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
648 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 4
649 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 4
650 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
651 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
653 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
654 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
655 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 4
656 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 4
657 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
658 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
660 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
661 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
662 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
663 ; X64_1LD-NEXT: ret i32 [[CONV]]
665 ; X64_2LD-LABEL: @cmp_eq6_align4(
666 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 4
667 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 4
668 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
669 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 4
670 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 4
671 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 4
672 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 4
673 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i32
674 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i32
675 ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i32 [[TMP12]], [[TMP13]]
676 ; X64_2LD-NEXT: [[TMP15:%.*]] = or i32 [[TMP5]], [[TMP14]]
677 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
678 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
679 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
680 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
681 ; X64_2LD-NEXT: ret i32 [[CONV]]
683 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)
684 %cmp = icmp eq i32 %call, 0
685 %conv = zext i1 %cmp to i32
689 define i32 @cmp_eq7(ptr nocapture readonly %x, ptr nocapture readonly %y) {
690 ; X64_1LD-LABEL: @cmp_eq7(
691 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
692 ; X64_1LD: res_block:
693 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
695 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
696 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
697 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
698 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
700 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 3
701 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 3
702 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 1
703 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 1
704 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]]
705 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
707 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
708 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
709 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
710 ; X64_1LD-NEXT: ret i32 [[CONV]]
712 ; X64_2LD-LABEL: @cmp_eq7(
713 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i32, ptr [[X:%.*]], align 1
714 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y:%.*]], align 1
715 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]
716 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 3
717 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 3
718 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 1
719 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 1
720 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]
721 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i32 [[TMP5]], [[TMP12]]
722 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
723 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
724 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
725 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
726 ; X64_2LD-NEXT: ret i32 [[CONV]]
728 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 7)
729 %cmp = icmp eq i32 %call, 0
730 %conv = zext i1 %cmp to i32
734 define i32 @cmp_eq8(ptr nocapture readonly %x, ptr nocapture readonly %y) {
735 ; X64-LABEL: @cmp_eq8(
736 ; X64-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
737 ; X64-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
738 ; X64-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
739 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
740 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
741 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
742 ; X64-NEXT: ret i32 [[CONV]]
744 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 8)
745 %cmp = icmp eq i32 %call, 0
746 %conv = zext i1 %cmp to i32
750 define i32 @cmp_eq9(ptr nocapture readonly %x, ptr nocapture readonly %y) {
751 ; X64_1LD-LABEL: @cmp_eq9(
752 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
753 ; X64_1LD: res_block:
754 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
756 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
757 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
758 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
759 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
761 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
762 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
763 ; X64_1LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
764 ; X64_1LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
765 ; X64_1LD-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP8]], [[TMP9]]
766 ; X64_1LD-NEXT: br i1 [[TMP10]], label [[RES_BLOCK]], label [[ENDBLOCK]]
768 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
769 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
770 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
771 ; X64_1LD-NEXT: ret i32 [[CONV]]
773 ; X64_2LD-LABEL: @cmp_eq9(
774 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
775 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
776 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
777 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
778 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
779 ; X64_2LD-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP6]], align 1
780 ; X64_2LD-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP7]], align 1
781 ; X64_2LD-NEXT: [[TMP10:%.*]] = zext i8 [[TMP8]] to i64
782 ; X64_2LD-NEXT: [[TMP11:%.*]] = zext i8 [[TMP9]] to i64
783 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
784 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
785 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
786 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
787 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
788 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
789 ; X64_2LD-NEXT: ret i32 [[CONV]]
791 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 9)
792 %cmp = icmp eq i32 %call, 0
793 %conv = zext i1 %cmp to i32
797 define i32 @cmp_eq10(ptr nocapture readonly %x, ptr nocapture readonly %y) {
798 ; X64_1LD-LABEL: @cmp_eq10(
799 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
800 ; X64_1LD: res_block:
801 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
803 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
804 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
805 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
806 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
808 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
809 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
810 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 1
811 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 1
812 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i16 [[TMP10]], [[TMP11]]
813 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
815 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
816 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
817 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
818 ; X64_1LD-NEXT: ret i32 [[CONV]]
820 ; X64_2LD-LABEL: @cmp_eq10(
821 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
822 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
823 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
824 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
825 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
826 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP6]], align 1
827 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP7]], align 1
828 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i16 [[TMP10]] to i64
829 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i16 [[TMP11]] to i64
830 ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]]
831 ; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]]
832 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0
833 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
834 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
835 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
836 ; X64_2LD-NEXT: ret i32 [[CONV]]
838 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 10)
839 %cmp = icmp eq i32 %call, 0
840 %conv = zext i1 %cmp to i32
844 define i32 @cmp_eq11(ptr nocapture readonly %x, ptr nocapture readonly %y) {
845 ; X64_1LD-LABEL: @cmp_eq11(
846 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
847 ; X64_1LD: res_block:
848 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
850 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
851 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
852 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
853 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
855 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 3
856 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 3
857 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
858 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
859 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
860 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
862 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
863 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
864 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
865 ; X64_1LD-NEXT: ret i32 [[CONV]]
867 ; X64_2LD-LABEL: @cmp_eq11(
868 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
869 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
870 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
871 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 3
872 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 3
873 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
874 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
875 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
876 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
877 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
878 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
879 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
880 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
881 ; X64_2LD-NEXT: ret i32 [[CONV]]
883 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 11)
884 %cmp = icmp eq i32 %call, 0
885 %conv = zext i1 %cmp to i32
889 define i32 @cmp_eq12(ptr nocapture readonly %x, ptr nocapture readonly %y) {
890 ; X64_1LD-LABEL: @cmp_eq12(
891 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
892 ; X64_1LD: res_block:
893 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
895 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
896 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
897 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
898 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
900 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
901 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
902 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 1
903 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 1
904 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP10]], [[TMP11]]
905 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
907 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
908 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
909 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
910 ; X64_1LD-NEXT: ret i32 [[CONV]]
912 ; X64_2LD-LABEL: @cmp_eq12(
913 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
914 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
915 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
916 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 8
917 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 8
918 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP6]], align 1
919 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 1
920 ; X64_2LD-NEXT: [[TMP12:%.*]] = zext i32 [[TMP10]] to i64
921 ; X64_2LD-NEXT: [[TMP13:%.*]] = zext i32 [[TMP11]] to i64
922 ; X64_2LD-NEXT: [[TMP14:%.*]] = xor i64 [[TMP12]], [[TMP13]]
923 ; X64_2LD-NEXT: [[TMP15:%.*]] = or i64 [[TMP5]], [[TMP14]]
924 ; X64_2LD-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], 0
925 ; X64_2LD-NEXT: [[TMP17:%.*]] = zext i1 [[TMP16]] to i32
926 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP17]], 0
927 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
928 ; X64_2LD-NEXT: ret i32 [[CONV]]
930 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 12)
931 %cmp = icmp eq i32 %call, 0
932 %conv = zext i1 %cmp to i32
936 define i32 @cmp_eq13(ptr nocapture readonly %x, ptr nocapture readonly %y) {
937 ; X64_1LD-LABEL: @cmp_eq13(
938 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
939 ; X64_1LD: res_block:
940 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
942 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
943 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
944 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
945 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
947 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 5
948 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 5
949 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
950 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
951 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
952 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
954 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
955 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
956 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
957 ; X64_1LD-NEXT: ret i32 [[CONV]]
959 ; X64_2LD-LABEL: @cmp_eq13(
960 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
961 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
962 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
963 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 5
964 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 5
965 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
966 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
967 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
968 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
969 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
970 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
971 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
972 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
973 ; X64_2LD-NEXT: ret i32 [[CONV]]
975 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 13)
976 %cmp = icmp eq i32 %call, 0
977 %conv = zext i1 %cmp to i32
981 define i32 @cmp_eq14(ptr nocapture readonly %x, ptr nocapture readonly %y) {
982 ; X64_1LD-LABEL: @cmp_eq14(
983 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
984 ; X64_1LD: res_block:
985 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
987 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
988 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
989 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
990 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
992 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 6
993 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 6
994 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
995 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
996 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
997 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
999 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
1000 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
1001 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
1002 ; X64_1LD-NEXT: ret i32 [[CONV]]
1004 ; X64_2LD-LABEL: @cmp_eq14(
1005 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
1006 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
1007 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
1008 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 6
1009 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 6
1010 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
1011 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
1012 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
1013 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
1014 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
1015 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
1016 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
1017 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
1018 ; X64_2LD-NEXT: ret i32 [[CONV]]
1020 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 14)
1021 %cmp = icmp eq i32 %call, 0
1022 %conv = zext i1 %cmp to i32
1026 define i32 @cmp_eq15(ptr nocapture readonly %x, ptr nocapture readonly %y) {
1027 ; X64_1LD-LABEL: @cmp_eq15(
1028 ; X64_1LD-NEXT: br label [[LOADBB:%.*]]
1029 ; X64_1LD: res_block:
1030 ; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]
1032 ; X64_1LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
1033 ; X64_1LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
1034 ; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
1035 ; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
1037 ; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 7
1038 ; X64_1LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 7
1039 ; X64_1LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
1040 ; X64_1LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
1041 ; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP10]], [[TMP11]]
1042 ; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]
1043 ; X64_1LD: endblock:
1044 ; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
1045 ; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
1046 ; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
1047 ; X64_1LD-NEXT: ret i32 [[CONV]]
1049 ; X64_2LD-LABEL: @cmp_eq15(
1050 ; X64_2LD-NEXT: [[TMP3:%.*]] = load i64, ptr [[X:%.*]], align 1
1051 ; X64_2LD-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y:%.*]], align 1
1052 ; X64_2LD-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]
1053 ; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[X]], i64 7
1054 ; X64_2LD-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Y]], i64 7
1055 ; X64_2LD-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP6]], align 1
1056 ; X64_2LD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP7]], align 1
1057 ; X64_2LD-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]
1058 ; X64_2LD-NEXT: [[TMP13:%.*]] = or i64 [[TMP5]], [[TMP12]]
1059 ; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i64 [[TMP13]], 0
1060 ; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32
1061 ; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0
1062 ; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
1063 ; X64_2LD-NEXT: ret i32 [[CONV]]
1065 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 15)
1066 %cmp = icmp eq i32 %call, 0
1067 %conv = zext i1 %cmp to i32
1071 define i32 @cmp_eq16(ptr nocapture readonly %x, ptr nocapture readonly %y) {
1072 ; X64-LABEL: @cmp_eq16(
1073 ; X64-NEXT: [[TMP3:%.*]] = load i128, ptr [[X:%.*]], align 1
1074 ; X64-NEXT: [[TMP4:%.*]] = load i128, ptr [[Y:%.*]], align 1
1075 ; X64-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]]
1076 ; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
1077 ; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
1078 ; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
1079 ; X64-NEXT: ret i32 [[CONV]]
1081 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 16)
1082 %cmp = icmp eq i32 %call, 0
1083 %conv = zext i1 %cmp to i32