1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes='require<loops>,gvn' -enable-split-backedge-in-load-pre -S | FileCheck %s
4 define dso_local void @test1(ptr nocapture readonly %aa, ptr nocapture %bb) local_unnamed_addr {
7 ; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, ptr [[BB:%.*]], i64 1
8 ; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, ptr [[AA:%.*]], i64 1
9 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX2]], align 4
10 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[IDX]], align 4
11 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
13 ; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[DOTPRE:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE:%.*]] ]
14 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE]] ]
15 ; CHECK-NEXT: [[IDX4:%.*]] = getelementptr inbounds i32, ptr [[AA]], i64 [[INDVARS_IV]]
16 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[IDX4]], align 4, !llvm.access.group !0
17 ; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP1]], [[TMP2]]
18 ; CHECK-NEXT: store i32 [[MUL]], ptr [[IDX4]], align 4, !llvm.access.group !0
19 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
20 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
21 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY_FOR_BODY_CRIT_EDGE]], label [[FOR_END:%.*]]
22 ; CHECK: for.body.for.body_crit_edge:
23 ; CHECK-NEXT: [[DOTPRE]] = load i32, ptr [[IDX]], align 4, !llvm.access.group !0
24 ; CHECK-NEXT: br label [[FOR_BODY]]
26 ; CHECK-NEXT: ret void
29 %idx = getelementptr inbounds i32, ptr %bb, i64 1
30 %idx2 = getelementptr inbounds i32, ptr %aa, i64 1
31 %0 = load i32, ptr %idx2, align 4
32 store i32 %0, ptr %idx, align 4
36 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
37 %idx4 = getelementptr inbounds i32, ptr %aa, i64 %indvars.iv
38 %1 = load i32, ptr %idx4, align 4, !llvm.access.group !0
39 %2 = load i32, ptr %idx, align 4, !llvm.access.group !0
40 %mul = mul nsw i32 %2, %1
41 store i32 %mul, ptr %idx4, align 4, !llvm.access.group !0
42 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
43 %exitcond = icmp ne i64 %indvars.iv.next, 100
44 br i1 %exitcond, label %for.body, label %for.end
52 define dso_local void @test2(ptr nocapture readonly %aa, ptr nocapture %bb) local_unnamed_addr {
53 ; CHECK-LABEL: @test2(
55 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
57 ; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, ptr [[BB:%.*]], i64 1
58 ; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, ptr [[AA:%.*]], i64 1
59 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX2]], align 4
60 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[IDX]], align 4
61 ; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[AA]], align 4
62 ; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
64 ; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[FOR_BODY]] ], [ [[DOTPRE1:%.*]], [[FOR_BODY2_FOR_BODY2_CRIT_EDGE:%.*]] ]
65 ; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_BODY]] ], [ [[MUL:%.*]], [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]] ]
66 ; CHECK-NEXT: [[INDVARS2_IV:%.*]] = phi i64 [ 0, [[FOR_BODY]] ], [ 1, [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]] ]
67 ; CHECK-NEXT: [[MUL]] = mul nsw i32 [[TMP1]], [[TMP2]]
68 ; CHECK-NEXT: store i32 [[MUL]], ptr [[AA]], align 4, !llvm.access.group !1
69 ; CHECK-NEXT: br i1 true, label [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]], label [[FOR_END:%.*]]
70 ; CHECK: for.body2.for.body2_crit_edge:
71 ; CHECK-NEXT: [[DOTPRE1]] = load i32, ptr [[IDX]], align 4, !llvm.access.group !1
72 ; CHECK-NEXT: br label [[FOR_BODY2]]
74 ; CHECK-NEXT: br i1 false, label [[FOR_END_FOR_BODY_CRIT_EDGE:%.*]], label [[END:%.*]]
75 ; CHECK: for.end.for.body_crit_edge:
76 ; CHECK-NEXT: br label [[FOR_BODY]]
78 ; CHECK-NEXT: ret void
84 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.end ]
85 %idx = getelementptr inbounds i32, ptr %bb, i64 1
86 %idx2 = getelementptr inbounds i32, ptr %aa, i64 1
87 %0 = load i32, ptr %idx2, align 4
88 store i32 %0, ptr %idx, align 4
92 %indvars2.iv = phi i64 [ 0, %for.body ], [ %indvars2.iv.next, %for.body2 ]
93 %idx4 = getelementptr inbounds i32, ptr %aa, i64 %indvars.iv
94 %1 = load i32, ptr %idx4, align 4, !llvm.access.group !1
95 %2 = load i32, ptr %idx, align 4, !llvm.access.group !1
96 %mul = mul nsw i32 %2, %1
97 store i32 %mul, ptr %idx4, align 4, !llvm.access.group !1
98 %indvars2.iv.next = add nuw nsw i64 %indvars.iv, 1
99 %exitcond2 = icmp ne i64 %indvars2.iv.next, 100
100 br i1 %exitcond2, label %for.body2, label %for.end
103 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
104 %exitcond = icmp ne i64 %indvars.iv.next, 100
105 br i1 %exitcond, label %for.body, label %end